?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Fix non-ACPI Timer Interrupt Routing - v3
[qemu.git] / linux-user / main.c
blob1e95f02124a48baf398910616ea1ada5fa699536
1 /*
2 * qemu user main
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
19 * MA 02110-1301, USA.
20 */
21 #include <stdlib.h>
22 #include <stdio.h>
23 #include <stdarg.h>
24 #include <string.h>
25 #include <errno.h>
26 #include <unistd.h>
27 #include <sys/mman.h>
28 #include <sys/syscall.h>
29
30 #include "qemu.h"
31 #include "qemu-common.h"
32 #include "cache-utils.h"
33 /* For tb_lock */
34 #include "exec-all.h"
35
36
37 #include "envlist.h"
38
39 #define DEBUG_LOGFILE "/tmp/qemu.log"
40
41 char *exec_path;
42
43 int singlestep;
44
45 static const char *interp_prefix = CONFIG_QEMU_PREFIX;
46 const char *qemu_uname_release = CONFIG_UNAME_RELEASE;
47
48 #if defined(__i386__) && !defined(CONFIG_STATIC)
49 /* Force usage of an ELF interpreter even if it is an ELF shared
50 object ! */
51 const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
52 #endif
53
54 /* for recent libc, we add these dummy symbols which are not declared
55 when generating a linked object (bug in ld ?) */
56 #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC)
57 asm(".globl __preinit_array_start\n"
58 ".globl __preinit_array_end\n"
59 ".globl __init_array_start\n"
60 ".globl __init_array_end\n"
61 ".globl __fini_array_start\n"
62 ".globl __fini_array_end\n"
63 ".section \".rodata\"\n"
64 "__preinit_array_start:\n"
65 "__preinit_array_end:\n"
66 "__init_array_start:\n"
67 "__init_array_end:\n"
68 "__fini_array_start:\n"
69 "__fini_array_end:\n"
70 ".long 0\n"
71 ".previous\n");
72 #endif
73
74 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
75 we allocate a bigger stack. Need a better solution, for example
76 by remapping the process stack directly at the right place */
77 unsigned long x86_stack_size = 512 * 1024;
78
79 void gemu_log(const char *fmt, ...)
80 {
81 va_list ap;
82
83 va_start(ap, fmt);
84 vfprintf(stderr, fmt, ap);
85 va_end(ap);
86 }
87
88 #if defined(TARGET_I386)
89 int cpu_get_pic_interrupt(CPUState *env)
90 {
91 return -1;
92 }
93 #endif
94
95 /* timers for rdtsc */
96
97 #if 0
98
99 static uint64_t emu_time;
100
101 int64_t cpu_get_real_ticks(void)
102 {
103 return emu_time++;
104 }
105
106 #endif
107
108 #if defined(USE_NPTL)
109 /***********************************************************/
110 /* Helper routines for implementing atomic operations. */
111
112 /* To implement exclusive operations we force all cpus to syncronise.
113 We don't require a full sync, only that no cpus are executing guest code.
114 The alternative is to map target atomic ops onto host equivalents,
115 which requires quite a lot of per host/target work. */
116 static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
117 static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
118 static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
119 static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
120 static int pending_cpus;
121
122 /* Make sure everything is in a consistent state for calling fork(). */
123 void fork_start(void)
124 {
125 mmap_fork_start();
126 pthread_mutex_lock(&tb_lock);
127 pthread_mutex_lock(&exclusive_lock);
128 }
129
130 void fork_end(int child)
131 {
132 if (child) {
133 /* Child processes created by fork() only have a single thread.
134 Discard information about the parent threads. */
135 first_cpu = thread_env;
136 thread_env->next_cpu = NULL;
137 pending_cpus = 0;
138 pthread_mutex_init(&exclusive_lock, NULL);
139 pthread_mutex_init(&cpu_list_mutex, NULL);
140 pthread_cond_init(&exclusive_cond, NULL);
141 pthread_cond_init(&exclusive_resume, NULL);
142 pthread_mutex_init(&tb_lock, NULL);
143 gdbserver_fork(thread_env);
144 } else {
145 pthread_mutex_unlock(&exclusive_lock);
146 pthread_mutex_unlock(&tb_lock);
147 }
148 mmap_fork_end(child);
149 }
150
151 /* Wait for pending exclusive operations to complete. The exclusive lock
152 must be held. */
153 static inline void exclusive_idle(void)
154 {
155 while (pending_cpus) {
156 pthread_cond_wait(&exclusive_resume, &exclusive_lock);
157 }
158 }
159
160 /* Start an exclusive operation.
161 Must only be called from outside cpu_arm_exec. */
162 static inline void start_exclusive(void)
163 {
164 CPUState *other;
165 pthread_mutex_lock(&exclusive_lock);
166 exclusive_idle();
167
168 pending_cpus = 1;
169 /* Make all other cpus stop executing. */
170 for (other = first_cpu; other; other = other->next_cpu) {
171 if (other->running) {
172 pending_cpus++;
173 cpu_exit(other);
174 }
175 }
176 if (pending_cpus > 1) {
177 pthread_cond_wait(&exclusive_cond, &exclusive_lock);
178 }
179 }
180
181 /* Finish an exclusive operation. */
182 static inline void end_exclusive(void)
183 {
184 pending_cpus = 0;
185 pthread_cond_broadcast(&exclusive_resume);
186 pthread_mutex_unlock(&exclusive_lock);
187 }
188
189 /* Wait for exclusive ops to finish, and begin cpu execution. */
190 static inline void cpu_exec_start(CPUState *env)
191 {
192 pthread_mutex_lock(&exclusive_lock);
193 exclusive_idle();
194 env->running = 1;
195 pthread_mutex_unlock(&exclusive_lock);
196 }
197
198 /* Mark cpu as not executing, and release pending exclusive ops. */
199 static inline void cpu_exec_end(CPUState *env)
200 {
201 pthread_mutex_lock(&exclusive_lock);
202 env->running = 0;
203 if (pending_cpus > 1) {
204 pending_cpus--;
205 if (pending_cpus == 1) {
206 pthread_cond_signal(&exclusive_cond);
207 }
208 }
209 exclusive_idle();
210 pthread_mutex_unlock(&exclusive_lock);
211 }
212
213 void cpu_list_lock(void)
214 {
215 pthread_mutex_lock(&cpu_list_mutex);
216 }
217
218 void cpu_list_unlock(void)
219 {
220 pthread_mutex_unlock(&cpu_list_mutex);
221 }
222 #else /* if !USE_NPTL */
223 /* These are no-ops because we are not threadsafe. */
224 static inline void cpu_exec_start(CPUState *env)
225 {
226 }
227
228 static inline void cpu_exec_end(CPUState *env)
229 {
230 }
231
232 static inline void start_exclusive(void)
233 {
234 }
235
236 static inline void end_exclusive(void)
237 {
238 }
239
240 void fork_start(void)
241 {
242 }
243
244 void fork_end(int child)
245 {
246 if (child) {
247 gdbserver_fork(thread_env);
248 }
249 }
250
251 void cpu_list_lock(void)
252 {
253 }
254
255 void cpu_list_unlock(void)
256 {
257 }
258 #endif
259
260
261 #ifdef TARGET_I386
262 /***********************************************************/
263 /* CPUX86 core interface */
264
265 void cpu_smm_update(CPUState *env)
266 {
267 }
268
269 uint64_t cpu_get_tsc(CPUX86State *env)
270 {
271 return cpu_get_real_ticks();
272 }
273
274 static void write_dt(void *ptr, unsigned long addr, unsigned long limit,
275 int flags)
276 {
277 unsigned int e1, e2;
278 uint32_t *p;
279 e1 = (addr << 16) | (limit & 0xffff);
280 e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
281 e2 |= flags;
282 p = ptr;
283 p[0] = tswap32(e1);
284 p[1] = tswap32(e2);
285 }
286
287 static uint64_t *idt_table;
288 #ifdef TARGET_X86_64
289 static void set_gate64(void *ptr, unsigned int type, unsigned int dpl,
290 uint64_t addr, unsigned int sel)
291 {
292 uint32_t *p, e1, e2;
293 e1 = (addr & 0xffff) | (sel << 16);
294 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
295 p = ptr;
296 p[0] = tswap32(e1);
297 p[1] = tswap32(e2);
298 p[2] = tswap32(addr >> 32);
299 p[3] = 0;
300 }
301 /* only dpl matters as we do only user space emulation */
302 static void set_idt(int n, unsigned int dpl)
303 {
304 set_gate64(idt_table + n * 2, 0, dpl, 0, 0);
305 }
306 #else
307 static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
308 uint32_t addr, unsigned int sel)
309 {
310 uint32_t *p, e1, e2;
311 e1 = (addr & 0xffff) | (sel << 16);
312 e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
313 p = ptr;
314 p[0] = tswap32(e1);
315 p[1] = tswap32(e2);
316 }
317
318 /* only dpl matters as we do only user space emulation */
319 static void set_idt(int n, unsigned int dpl)
320 {
321 set_gate(idt_table + n, 0, dpl, 0, 0);
322 }
323 #endif
324
325 void cpu_loop(CPUX86State *env)
326 {
327 int trapnr;
328 abi_ulong pc;
329 target_siginfo_t info;
330
331 for(;;) {
332 trapnr = cpu_x86_exec(env);
333 switch(trapnr) {
334 case 0x80:
335 /* linux syscall from int $0x80 */
336 env->regs[R_EAX] = do_syscall(env,
337 env->regs[R_EAX],
338 env->regs[R_EBX],
339 env->regs[R_ECX],
340 env->regs[R_EDX],
341 env->regs[R_ESI],
342 env->regs[R_EDI],
343 env->regs[R_EBP]);
344 break;
345 #ifndef TARGET_ABI32
346 case EXCP_SYSCALL:
347 /* linux syscall from syscall intruction */
348 env->regs[R_EAX] = do_syscall(env,
349 env->regs[R_EAX],
350 env->regs[R_EDI],
351 env->regs[R_ESI],
352 env->regs[R_EDX],
353 env->regs[10],
354 env->regs[8],
355 env->regs[9]);
356 env->eip = env->exception_next_eip;
357 break;
358 #endif
359 case EXCP0B_NOSEG:
360 case EXCP0C_STACK:
361 info.si_signo = SIGBUS;
362 info.si_errno = 0;
363 info.si_code = TARGET_SI_KERNEL;
364 info._sifields._sigfault._addr = 0;
365 queue_signal(env, info.si_signo, &info);
366 break;
367 case EXCP0D_GPF:
368 /* XXX: potential problem if ABI32 */
369 #ifndef TARGET_X86_64
370 if (env->eflags & VM_MASK) {
371 handle_vm86_fault(env);
372 } else
373 #endif
374 {
375 info.si_signo = SIGSEGV;
376 info.si_errno = 0;
377 info.si_code = TARGET_SI_KERNEL;
378 info._sifields._sigfault._addr = 0;
379 queue_signal(env, info.si_signo, &info);
380 }
381 break;
382 case EXCP0E_PAGE:
383 info.si_signo = SIGSEGV;
384 info.si_errno = 0;
385 if (!(env->error_code & 1))
386 info.si_code = TARGET_SEGV_MAPERR;
387 else
388 info.si_code = TARGET_SEGV_ACCERR;
389 info._sifields._sigfault._addr = env->cr[2];
390 queue_signal(env, info.si_signo, &info);
391 break;
392 case EXCP00_DIVZ:
393 #ifndef TARGET_X86_64
394 if (env->eflags & VM_MASK) {
395 handle_vm86_trap(env, trapnr);
396 } else
397 #endif
398 {
399 /* division by zero */
400 info.si_signo = SIGFPE;
401 info.si_errno = 0;
402 info.si_code = TARGET_FPE_INTDIV;
403 info._sifields._sigfault._addr = env->eip;
404 queue_signal(env, info.si_signo, &info);
405 }
406 break;
407 case EXCP01_DB:
408 case EXCP03_INT3:
409 #ifndef TARGET_X86_64
410 if (env->eflags & VM_MASK) {
411 handle_vm86_trap(env, trapnr);
412 } else
413 #endif
414 {
415 info.si_signo = SIGTRAP;
416 info.si_errno = 0;
417 if (trapnr == EXCP01_DB) {
418 info.si_code = TARGET_TRAP_BRKPT;
419 info._sifields._sigfault._addr = env->eip;
420 } else {
421 info.si_code = TARGET_SI_KERNEL;
422 info._sifields._sigfault._addr = 0;
423 }
424 queue_signal(env, info.si_signo, &info);
425 }
426 break;
427 case EXCP04_INTO:
428 case EXCP05_BOUND:
429 #ifndef TARGET_X86_64
430 if (env->eflags & VM_MASK) {
431 handle_vm86_trap(env, trapnr);
432 } else
433 #endif
434 {
435 info.si_signo = SIGSEGV;
436 info.si_errno = 0;
437 info.si_code = TARGET_SI_KERNEL;
438 info._sifields._sigfault._addr = 0;
439 queue_signal(env, info.si_signo, &info);
440 }
441 break;
442 case EXCP06_ILLOP:
443 info.si_signo = SIGILL;
444 info.si_errno = 0;
445 info.si_code = TARGET_ILL_ILLOPN;
446 info._sifields._sigfault._addr = env->eip;
447 queue_signal(env, info.si_signo, &info);
448 break;
449 case EXCP_INTERRUPT:
450 /* just indicate that signals should be handled asap */
451 break;
452 case EXCP_DEBUG:
453 {
454 int sig;
455
456 sig = gdb_handlesig (env, TARGET_SIGTRAP);
457 if (sig)
458 {
459 info.si_signo = sig;
460 info.si_errno = 0;
461 info.si_code = TARGET_TRAP_BRKPT;
462 queue_signal(env, info.si_signo, &info);
463 }
464 }
465 break;
466 default:
467 pc = env->segs[R_CS].base + env->eip;
468 fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
469 (long)pc, trapnr);
470 abort();
471 }
472 process_pending_signals(env);
473 }
474 }
475 #endif
476
477 #ifdef TARGET_ARM
478
479 static void arm_cache_flush(abi_ulong start, abi_ulong last)
480 {
481 abi_ulong addr, last1;
482
483 if (last < start)
484 return;
485 addr = start;
486 for(;;) {
487 last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
488 if (last1 > last)
489 last1 = last;
490 tb_invalidate_page_range(addr, last1 + 1);
491 if (last1 == last)
492 break;
493 addr = last1 + 1;
494 }
495 }
496
497 /* Handle a jump to the kernel code page. */
498 static int
499 do_kernel_trap(CPUARMState *env)
500 {
501 uint32_t addr;
502 uint32_t cpsr;
503 uint32_t val;
504
505 switch (env->regs[15]) {
506 case 0xffff0fa0: /* __kernel_memory_barrier */
507 /* ??? No-op. Will need to do better for SMP. */
508 break;
509 case 0xffff0fc0: /* __kernel_cmpxchg */
510 /* XXX: This only works between threads, not between processes.
511 It's probably possible to implement this with native host
512 operations. However things like ldrex/strex are much harder so
513 there's not much point trying. */
514 start_exclusive();
515 cpsr = cpsr_read(env);
516 addr = env->regs[2];
517 /* FIXME: This should SEGV if the access fails. */
518 if (get_user_u32(val, addr))
519 val = ~env->regs[0];
520 if (val == env->regs[0]) {
521 val = env->regs[1];
522 /* FIXME: Check for segfaults. */
523 put_user_u32(val, addr);
524 env->regs[0] = 0;
525 cpsr |= CPSR_C;
526 } else {
527 env->regs[0] = -1;
528 cpsr &= ~CPSR_C;
529 }
530 cpsr_write(env, cpsr, CPSR_C);
531 end_exclusive();
532 break;
533 case 0xffff0fe0: /* __kernel_get_tls */
534 env->regs[0] = env->cp15.c13_tls2;
535 break;
536 default:
537 return 1;
538 }
539 /* Jump back to the caller. */
540 addr = env->regs[14];
541 if (addr & 1) {
542 env->thumb = 1;
543 addr &= ~1;
544 }
545 env->regs[15] = addr;
546
547 return 0;
548 }
549
550 void cpu_loop(CPUARMState *env)
551 {
552 int trapnr;
553 unsigned int n, insn;
554 target_siginfo_t info;
555 uint32_t addr;
556
557 for(;;) {
558 cpu_exec_start(env);
559 trapnr = cpu_arm_exec(env);
560 cpu_exec_end(env);
561 switch(trapnr) {
562 case EXCP_UDEF:
563 {
564 TaskState *ts = env->opaque;
565 uint32_t opcode;
566 int rc;
567
568 /* we handle the FPU emulation here, as Linux */
569 /* we get the opcode */
570 /* FIXME - what to do if get_user() fails? */
571 get_user_u32(opcode, env->regs[15]);
572
573 rc = EmulateAll(opcode, &ts->fpa, env);
574 if (rc == 0) { /* illegal instruction */
575 info.si_signo = SIGILL;
576 info.si_errno = 0;
577 info.si_code = TARGET_ILL_ILLOPN;
578 info._sifields._sigfault._addr = env->regs[15];
579 queue_signal(env, info.si_signo, &info);
580 } else if (rc < 0) { /* FP exception */
581 int arm_fpe=0;
582
583 /* translate softfloat flags to FPSR flags */
584 if (-rc & float_flag_invalid)
585 arm_fpe |= BIT_IOC;
586 if (-rc & float_flag_divbyzero)
587 arm_fpe |= BIT_DZC;
588 if (-rc & float_flag_overflow)
589 arm_fpe |= BIT_OFC;
590 if (-rc & float_flag_underflow)
591 arm_fpe |= BIT_UFC;
592 if (-rc & float_flag_inexact)
593 arm_fpe |= BIT_IXC;
594
595 FPSR fpsr = ts->fpa.fpsr;
596 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
597
598 if (fpsr & (arm_fpe << 16)) { /* exception enabled? */
599 info.si_signo = SIGFPE;
600 info.si_errno = 0;
601
602 /* ordered by priority, least first */
603 if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
604 if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
605 if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
606 if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
607 if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
608
609 info._sifields._sigfault._addr = env->regs[15];
610 queue_signal(env, info.si_signo, &info);
611 } else {
612 env->regs[15] += 4;
613 }
614
615 /* accumulate unenabled exceptions */
616 if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
617 fpsr |= BIT_IXC;
618 if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
619 fpsr |= BIT_UFC;
620 if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
621 fpsr |= BIT_OFC;
622 if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
623 fpsr |= BIT_DZC;
624 if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
625 fpsr |= BIT_IOC;
626 ts->fpa.fpsr=fpsr;
627 } else { /* everything OK */
628 /* increment PC */
629 env->regs[15] += 4;
630 }
631 }
632 break;
633 case EXCP_SWI:
634 case EXCP_BKPT:
635 {
636 env->eabi = 1;
637 /* system call */
638 if (trapnr == EXCP_BKPT) {
639 if (env->thumb) {
640 /* FIXME - what to do if get_user() fails? */
641 get_user_u16(insn, env->regs[15]);
642 n = insn & 0xff;
643 env->regs[15] += 2;
644 } else {
645 /* FIXME - what to do if get_user() fails? */
646 get_user_u32(insn, env->regs[15]);
647 n = (insn & 0xf) | ((insn >> 4) & 0xff0);
648 env->regs[15] += 4;
649 }
650 } else {
651 if (env->thumb) {
652 /* FIXME - what to do if get_user() fails? */
653 get_user_u16(insn, env->regs[15] - 2);
654 n = insn & 0xff;
655 } else {
656 /* FIXME - what to do if get_user() fails? */
657 get_user_u32(insn, env->regs[15] - 4);
658 n = insn & 0xffffff;
659 }
660 }
661
662 if (n == ARM_NR_cacheflush) {
663 arm_cache_flush(env->regs[0], env->regs[1]);
664 } else if (n == ARM_NR_semihosting
665 || n == ARM_NR_thumb_semihosting) {
666 env->regs[0] = do_arm_semihosting (env);
667 } else if (n == 0 || n >= ARM_SYSCALL_BASE
668 || (env->thumb && n == ARM_THUMB_SYSCALL)) {
669 /* linux syscall */
670 if (env->thumb || n == 0) {
671 n = env->regs[7];
672 } else {
673 n -= ARM_SYSCALL_BASE;
674 env->eabi = 0;
675 }
676 if ( n > ARM_NR_BASE) {
677 switch (n) {
678 case ARM_NR_cacheflush:
679 arm_cache_flush(env->regs[0], env->regs[1]);
680 break;
681 case ARM_NR_set_tls:
682 cpu_set_tls(env, env->regs[0]);
683 env->regs[0] = 0;
684 break;
685 default:
686 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
687 n);
688 env->regs[0] = -TARGET_ENOSYS;
689 break;
690 }
691 } else {
692 env->regs[0] = do_syscall(env,
693 n,
694 env->regs[0],
695 env->regs[1],
696 env->regs[2],
697 env->regs[3],
698 env->regs[4],
699 env->regs[5]);
700 }
701 } else {
702 goto error;
703 }
704 }
705 break;
706 case EXCP_INTERRUPT:
707 /* just indicate that signals should be handled asap */
708 break;
709 case EXCP_PREFETCH_ABORT:
710 addr = env->cp15.c6_insn;
711 goto do_segv;
712 case EXCP_DATA_ABORT:
713 addr = env->cp15.c6_data;
714 goto do_segv;
715 do_segv:
716 {
717 info.si_signo = SIGSEGV;
718 info.si_errno = 0;
719 /* XXX: check env->error_code */
720 info.si_code = TARGET_SEGV_MAPERR;
721 info._sifields._sigfault._addr = addr;
722 queue_signal(env, info.si_signo, &info);
723 }
724 break;
725 case EXCP_DEBUG:
726 {
727 int sig;
728
729 sig = gdb_handlesig (env, TARGET_SIGTRAP);
730 if (sig)
731 {
732 info.si_signo = sig;
733 info.si_errno = 0;
734 info.si_code = TARGET_TRAP_BRKPT;
735 queue_signal(env, info.si_signo, &info);
736 }
737 }
738 break;
739 case EXCP_KERNEL_TRAP:
740 if (do_kernel_trap(env))
741 goto error;
742 break;
743 default:
744 error:
745 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
746 trapnr);
747 cpu_dump_state(env, stderr, fprintf, 0);
748 abort();
749 }
750 process_pending_signals(env);
751 }
752 }
753
754 #endif
755
756 #ifdef TARGET_SPARC
757 #define SPARC64_STACK_BIAS 2047
758
759 //#define DEBUG_WIN
760
761 /* WARNING: dealing with register windows _is_ complicated. More info
762 can be found at http://www.sics.se/~psm/sparcstack.html */
763 static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
764 {
765 index = (index + cwp * 16) % (16 * env->nwindows);
766 /* wrap handling : if cwp is on the last window, then we use the
767 registers 'after' the end */
768 if (index < 8 && env->cwp == env->nwindows - 1)
769 index += 16 * env->nwindows;
770 return index;
771 }
772
773 /* save the register window 'cwp1' */
774 static inline void save_window_offset(CPUSPARCState *env, int cwp1)
775 {
776 unsigned int i;
777 abi_ulong sp_ptr;
778
779 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
780 #ifdef TARGET_SPARC64
781 if (sp_ptr & 3)
782 sp_ptr += SPARC64_STACK_BIAS;
783 #endif
784 #if defined(DEBUG_WIN)
785 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
786 sp_ptr, cwp1);
787 #endif
788 for(i = 0; i < 16; i++) {
789 /* FIXME - what to do if put_user() fails? */
790 put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
791 sp_ptr += sizeof(abi_ulong);
792 }
793 }
794
795 static void save_window(CPUSPARCState *env)
796 {
797 #ifndef TARGET_SPARC64
798 unsigned int new_wim;
799 new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
800 ((1LL << env->nwindows) - 1);
801 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
802 env->wim = new_wim;
803 #else
804 save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
805 env->cansave++;
806 env->canrestore--;
807 #endif
808 }
809
810 static void restore_window(CPUSPARCState *env)
811 {
812 #ifndef TARGET_SPARC64
813 unsigned int new_wim;
814 #endif
815 unsigned int i, cwp1;
816 abi_ulong sp_ptr;
817
818 #ifndef TARGET_SPARC64
819 new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
820 ((1LL << env->nwindows) - 1);
821 #endif
822
823 /* restore the invalid window */
824 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
825 sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
826 #ifdef TARGET_SPARC64
827 if (sp_ptr & 3)
828 sp_ptr += SPARC64_STACK_BIAS;
829 #endif
830 #if defined(DEBUG_WIN)
831 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
832 sp_ptr, cwp1);
833 #endif
834 for(i = 0; i < 16; i++) {
835 /* FIXME - what to do if get_user() fails? */
836 get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
837 sp_ptr += sizeof(abi_ulong);
838 }
839 #ifdef TARGET_SPARC64
840 env->canrestore++;
841 if (env->cleanwin < env->nwindows - 1)
842 env->cleanwin++;
843 env->cansave--;
844 #else
845 env->wim = new_wim;
846 #endif
847 }
848
849 static void flush_windows(CPUSPARCState *env)
850 {
851 int offset, cwp1;
852
853 offset = 1;
854 for(;;) {
855 /* if restore would invoke restore_window(), then we can stop */
856 cwp1 = cpu_cwp_inc(env, env->cwp + offset);
857 #ifndef TARGET_SPARC64
858 if (env->wim & (1 << cwp1))
859 break;
860 #else
861 if (env->canrestore == 0)
862 break;
863 env->cansave++;
864 env->canrestore--;
865 #endif
866 save_window_offset(env, cwp1);
867 offset++;
868 }
869 cwp1 = cpu_cwp_inc(env, env->cwp + 1);
870 #ifndef TARGET_SPARC64
871 /* set wim so that restore will reload the registers */
872 env->wim = 1 << cwp1;
873 #endif
874 #if defined(DEBUG_WIN)
875 printf("flush_windows: nb=%d\n", offset - 1);
876 #endif
877 }
878
879 void cpu_loop (CPUSPARCState *env)
880 {
881 int trapnr, ret;
882 target_siginfo_t info;
883
884 while (1) {
885 trapnr = cpu_sparc_exec (env);
886
887 switch (trapnr) {
888 #ifndef TARGET_SPARC64
889 case 0x88:
890 case 0x90:
891 #else
892 case 0x110:
893 case 0x16d:
894 #endif
895 ret = do_syscall (env, env->gregs[1],
896 env->regwptr[0], env->regwptr[1],
897 env->regwptr[2], env->regwptr[3],
898 env->regwptr[4], env->regwptr[5]);
899 if ((unsigned int)ret >= (unsigned int)(-515)) {
900 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
901 env->xcc |= PSR_CARRY;
902 #else
903 env->psr |= PSR_CARRY;
904 #endif
905 ret = -ret;
906 } else {
907 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
908 env->xcc &= ~PSR_CARRY;
909 #else
910 env->psr &= ~PSR_CARRY;
911 #endif
912 }
913 env->regwptr[0] = ret;
914 /* next instruction */
915 env->pc = env->npc;
916 env->npc = env->npc + 4;
917 break;
918 case 0x83: /* flush windows */
919 #ifdef TARGET_ABI32
920 case 0x103:
921 #endif
922 flush_windows(env);
923 /* next instruction */
924 env->pc = env->npc;
925 env->npc = env->npc + 4;
926 break;
927 #ifndef TARGET_SPARC64
928 case TT_WIN_OVF: /* window overflow */
929 save_window(env);
930 break;
931 case TT_WIN_UNF: /* window underflow */
932 restore_window(env);
933 break;
934 case TT_TFAULT:
935 case TT_DFAULT:
936 {
937 info.si_signo = SIGSEGV;
938 info.si_errno = 0;
939 /* XXX: check env->error_code */
940 info.si_code = TARGET_SEGV_MAPERR;
941 info._sifields._sigfault._addr = env->mmuregs[4];
942 queue_signal(env, info.si_signo, &info);
943 }
944 break;
945 #else
946 case TT_SPILL: /* window overflow */
947 save_window(env);
948 break;
949 case TT_FILL: /* window underflow */
950 restore_window(env);
951 break;
952 case TT_TFAULT:
953 case TT_DFAULT:
954 {
955 info.si_signo = SIGSEGV;
956 info.si_errno = 0;
957 /* XXX: check env->error_code */
958 info.si_code = TARGET_SEGV_MAPERR;
959 if (trapnr == TT_DFAULT)
960 info._sifields._sigfault._addr = env->dmmuregs[4];
961 else
962 info._sifields._sigfault._addr = env->tsptr->tpc;
963 queue_signal(env, info.si_signo, &info);
964 }
965 break;
966 #ifndef TARGET_ABI32
967 case 0x16e:
968 flush_windows(env);
969 sparc64_get_context(env);
970 break;
971 case 0x16f:
972 flush_windows(env);
973 sparc64_set_context(env);
974 break;
975 #endif
976 #endif
977 case EXCP_INTERRUPT:
978 /* just indicate that signals should be handled asap */
979 break;
980 case EXCP_DEBUG:
981 {
982 int sig;
983
984 sig = gdb_handlesig (env, TARGET_SIGTRAP);
985 if (sig)
986 {
987 info.si_signo = sig;
988 info.si_errno = 0;
989 info.si_code = TARGET_TRAP_BRKPT;
990 queue_signal(env, info.si_signo, &info);
991 }
992 }
993 break;
994 default:
995 printf ("Unhandled trap: 0x%x\n", trapnr);
996 cpu_dump_state(env, stderr, fprintf, 0);
997 exit (1);
998 }
999 process_pending_signals (env);
1000 }
1001 }
1002
1003 #endif
1004
1005 #ifdef TARGET_PPC
1006 static inline uint64_t cpu_ppc_get_tb (CPUState *env)
1007 {
1008 /* TO FIX */
1009 return 0;
1010 }
1011
1012 uint32_t cpu_ppc_load_tbl (CPUState *env)
1013 {
1014 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1015 }
1016
1017 uint32_t cpu_ppc_load_tbu (CPUState *env)
1018 {
1019 return cpu_ppc_get_tb(env) >> 32;
1020 }
1021
1022 uint32_t cpu_ppc_load_atbl (CPUState *env)
1023 {
1024 return cpu_ppc_get_tb(env) & 0xFFFFFFFF;
1025 }
1026
1027 uint32_t cpu_ppc_load_atbu (CPUState *env)
1028 {
1029 return cpu_ppc_get_tb(env) >> 32;
1030 }
1031
1032 uint32_t cpu_ppc601_load_rtcu (CPUState *env)
1033 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1034
1035 uint32_t cpu_ppc601_load_rtcl (CPUState *env)
1036 {
1037 return cpu_ppc_load_tbl(env) & 0x3FFFFF80;
1038 }
1039
1040 /* XXX: to be fixed */
1041 int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp)
1042 {
1043 return -1;
1044 }
1045
1046 int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val)
1047 {
1048 return -1;
1049 }
1050
1051 #define EXCP_DUMP(env, fmt, ...) \
1052 do { \
1053 fprintf(stderr, fmt , ## __VA_ARGS__); \
1054 cpu_dump_state(env, stderr, fprintf, 0); \
1055 qemu_log(fmt, ## __VA_ARGS__); \
1056 if (logfile) \
1057 log_cpu_state(env, 0); \
1058 } while (0)
1059
1060 void cpu_loop(CPUPPCState *env)
1061 {
1062 target_siginfo_t info;
1063 int trapnr;
1064 uint32_t ret;
1065
1066 for(;;) {
1067 trapnr = cpu_ppc_exec(env);
1068 switch(trapnr) {
1069 case POWERPC_EXCP_NONE:
1070 /* Just go on */
1071 break;
1072 case POWERPC_EXCP_CRITICAL: /* Critical input */
1073 cpu_abort(env, "Critical interrupt while in user mode. "
1074 "Aborting\n");
1075 break;
1076 case POWERPC_EXCP_MCHECK: /* Machine check exception */
1077 cpu_abort(env, "Machine check exception while in user mode. "
1078 "Aborting\n");
1079 break;
1080 case POWERPC_EXCP_DSI: /* Data storage exception */
1081 EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n",
1082 env->spr[SPR_DAR]);
1083 /* XXX: check this. Seems bugged */
1084 switch (env->error_code & 0xFF000000) {
1085 case 0x40000000:
1086 info.si_signo = TARGET_SIGSEGV;
1087 info.si_errno = 0;
1088 info.si_code = TARGET_SEGV_MAPERR;
1089 break;
1090 case 0x04000000:
1091 info.si_signo = TARGET_SIGILL;
1092 info.si_errno = 0;
1093 info.si_code = TARGET_ILL_ILLADR;
1094 break;
1095 case 0x08000000:
1096 info.si_signo = TARGET_SIGSEGV;
1097 info.si_errno = 0;
1098 info.si_code = TARGET_SEGV_ACCERR;
1099 break;
1100 default:
1101 /* Let's send a regular segfault... */
1102 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1103 env->error_code);
1104 info.si_signo = TARGET_SIGSEGV;
1105 info.si_errno = 0;
1106 info.si_code = TARGET_SEGV_MAPERR;
1107 break;
1108 }
1109 info._sifields._sigfault._addr = env->nip;
1110 queue_signal(env, info.si_signo, &info);
1111 break;
1112 case POWERPC_EXCP_ISI: /* Instruction storage exception */
1113 EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n",
1114 env->spr[SPR_SRR0]);
1115 /* XXX: check this */
1116 switch (env->error_code & 0xFF000000) {
1117 case 0x40000000:
1118 info.si_signo = TARGET_SIGSEGV;
1119 info.si_errno = 0;
1120 info.si_code = TARGET_SEGV_MAPERR;
1121 break;
1122 case 0x10000000:
1123 case 0x08000000:
1124 info.si_signo = TARGET_SIGSEGV;
1125 info.si_errno = 0;
1126 info.si_code = TARGET_SEGV_ACCERR;
1127 break;
1128 default:
1129 /* Let's send a regular segfault... */
1130 EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
1131 env->error_code);
1132 info.si_signo = TARGET_SIGSEGV;
1133 info.si_errno = 0;
1134 info.si_code = TARGET_SEGV_MAPERR;
1135 break;
1136 }
1137 info._sifields._sigfault._addr = env->nip - 4;
1138 queue_signal(env, info.si_signo, &info);
1139 break;
1140 case POWERPC_EXCP_EXTERNAL: /* External input */
1141 cpu_abort(env, "External interrupt while in user mode. "
1142 "Aborting\n");
1143 break;
1144 case POWERPC_EXCP_ALIGN: /* Alignment exception */
1145 EXCP_DUMP(env, "Unaligned memory access\n");
1146 /* XXX: check this */
1147 info.si_signo = TARGET_SIGBUS;
1148 info.si_errno = 0;
1149 info.si_code = TARGET_BUS_ADRALN;
1150 info._sifields._sigfault._addr = env->nip - 4;
1151 queue_signal(env, info.si_signo, &info);
1152 break;
1153 case POWERPC_EXCP_PROGRAM: /* Program exception */
1154 /* XXX: check this */
1155 switch (env->error_code & ~0xF) {
1156 case POWERPC_EXCP_FP:
1157 EXCP_DUMP(env, "Floating point program exception\n");
1158 info.si_signo = TARGET_SIGFPE;
1159 info.si_errno = 0;
1160 switch (env->error_code & 0xF) {
1161 case POWERPC_EXCP_FP_OX:
1162 info.si_code = TARGET_FPE_FLTOVF;
1163 break;
1164 case POWERPC_EXCP_FP_UX:
1165 info.si_code = TARGET_FPE_FLTUND;
1166 break;
1167 case POWERPC_EXCP_FP_ZX:
1168 case POWERPC_EXCP_FP_VXZDZ:
1169 info.si_code = TARGET_FPE_FLTDIV;
1170 break;
1171 case POWERPC_EXCP_FP_XX:
1172 info.si_code = TARGET_FPE_FLTRES;
1173 break;
1174 case POWERPC_EXCP_FP_VXSOFT:
1175 info.si_code = TARGET_FPE_FLTINV;
1176 break;
1177 case POWERPC_EXCP_FP_VXSNAN:
1178 case POWERPC_EXCP_FP_VXISI:
1179 case POWERPC_EXCP_FP_VXIDI:
1180 case POWERPC_EXCP_FP_VXIMZ:
1181 case POWERPC_EXCP_FP_VXVC:
1182 case POWERPC_EXCP_FP_VXSQRT:
1183 case POWERPC_EXCP_FP_VXCVI:
1184 info.si_code = TARGET_FPE_FLTSUB;
1185 break;
1186 default:
1187 EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
1188 env->error_code);
1189 break;
1190 }
1191 break;
1192 case POWERPC_EXCP_INVAL:
1193 EXCP_DUMP(env, "Invalid instruction\n");
1194 info.si_signo = TARGET_SIGILL;
1195 info.si_errno = 0;
1196 switch (env->error_code & 0xF) {
1197 case POWERPC_EXCP_INVAL_INVAL:
1198 info.si_code = TARGET_ILL_ILLOPC;
1199 break;
1200 case POWERPC_EXCP_INVAL_LSWX:
1201 info.si_code = TARGET_ILL_ILLOPN;
1202 break;
1203 case POWERPC_EXCP_INVAL_SPR:
1204 info.si_code = TARGET_ILL_PRVREG;
1205 break;
1206 case POWERPC_EXCP_INVAL_FP:
1207 info.si_code = TARGET_ILL_COPROC;
1208 break;
1209 default:
1210 EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
1211 env->error_code & 0xF);
1212 info.si_code = TARGET_ILL_ILLADR;
1213 break;
1214 }
1215 break;
1216 case POWERPC_EXCP_PRIV:
1217 EXCP_DUMP(env, "Privilege violation\n");
1218 info.si_signo = TARGET_SIGILL;
1219 info.si_errno = 0;
1220 switch (env->error_code & 0xF) {
1221 case POWERPC_EXCP_PRIV_OPC:
1222 info.si_code = TARGET_ILL_PRVOPC;
1223 break;
1224 case POWERPC_EXCP_PRIV_REG:
1225 info.si_code = TARGET_ILL_PRVREG;
1226 break;
1227 default:
1228 EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
1229 env->error_code & 0xF);
1230 info.si_code = TARGET_ILL_PRVOPC;
1231 break;
1232 }
1233 break;
1234 case POWERPC_EXCP_TRAP:
1235 cpu_abort(env, "Tried to call a TRAP\n");
1236 break;
1237 default:
1238 /* Should not happen ! */
1239 cpu_abort(env, "Unknown program exception (%02x)\n",
1240 env->error_code);
1241 break;
1242 }
1243 info._sifields._sigfault._addr = env->nip - 4;
1244 queue_signal(env, info.si_signo, &info);
1245 break;
1246 case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */
1247 EXCP_DUMP(env, "No floating point allowed\n");
1248 info.si_signo = TARGET_SIGILL;
1249 info.si_errno = 0;
1250 info.si_code = TARGET_ILL_COPROC;
1251 info._sifields._sigfault._addr = env->nip - 4;
1252 queue_signal(env, info.si_signo, &info);
1253 break;
1254 case POWERPC_EXCP_SYSCALL: /* System call exception */
1255 cpu_abort(env, "Syscall exception while in user mode. "
1256 "Aborting\n");
1257 break;
1258 case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */
1259 EXCP_DUMP(env, "No APU instruction allowed\n");
1260 info.si_signo = TARGET_SIGILL;
1261 info.si_errno = 0;
1262 info.si_code = TARGET_ILL_COPROC;
1263 info._sifields._sigfault._addr = env->nip - 4;
1264 queue_signal(env, info.si_signo, &info);
1265 break;
1266 case POWERPC_EXCP_DECR: /* Decrementer exception */
1267 cpu_abort(env, "Decrementer interrupt while in user mode. "
1268 "Aborting\n");
1269 break;
1270 case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */
1271 cpu_abort(env, "Fix interval timer interrupt while in user mode. "
1272 "Aborting\n");
1273 break;
1274 case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */
1275 cpu_abort(env, "Watchdog timer interrupt while in user mode. "
1276 "Aborting\n");
1277 break;
1278 case POWERPC_EXCP_DTLB: /* Data TLB error */
1279 cpu_abort(env, "Data TLB exception while in user mode. "
1280 "Aborting\n");
1281 break;
1282 case POWERPC_EXCP_ITLB: /* Instruction TLB error */
1283 cpu_abort(env, "Instruction TLB exception while in user mode. "
1284 "Aborting\n");
1285 break;
1286 case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */
1287 EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
1288 info.si_signo = TARGET_SIGILL;
1289 info.si_errno = 0;
1290 info.si_code = TARGET_ILL_COPROC;
1291 info._sifields._sigfault._addr = env->nip - 4;
1292 queue_signal(env, info.si_signo, &info);
1293 break;
1294 case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */
1295 cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
1296 break;
1297 case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */
1298 cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
1299 break;
1300 case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */
1301 cpu_abort(env, "Performance monitor exception not handled\n");
1302 break;
1303 case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */
1304 cpu_abort(env, "Doorbell interrupt while in user mode. "
1305 "Aborting\n");
1306 break;
1307 case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */
1308 cpu_abort(env, "Doorbell critical interrupt while in user mode. "
1309 "Aborting\n");
1310 break;
1311 case POWERPC_EXCP_RESET: /* System reset exception */
1312 cpu_abort(env, "Reset interrupt while in user mode. "
1313 "Aborting\n");
1314 break;
1315 case POWERPC_EXCP_DSEG: /* Data segment exception */
1316 cpu_abort(env, "Data segment exception while in user mode. "
1317 "Aborting\n");
1318 break;
1319 case POWERPC_EXCP_ISEG: /* Instruction segment exception */
1320 cpu_abort(env, "Instruction segment exception "
1321 "while in user mode. Aborting\n");
1322 break;
1323 /* PowerPC 64 with hypervisor mode support */
1324 case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */
1325 cpu_abort(env, "Hypervisor decrementer interrupt "
1326 "while in user mode. Aborting\n");
1327 break;
1328 case POWERPC_EXCP_TRACE: /* Trace exception */
1329 /* Nothing to do:
1330 * we use this exception to emulate step-by-step execution mode.
1331 */
1332 break;
1333 /* PowerPC 64 with hypervisor mode support */
1334 case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */
1335 cpu_abort(env, "Hypervisor data storage exception "
1336 "while in user mode. Aborting\n");
1337 break;
1338 case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */
1339 cpu_abort(env, "Hypervisor instruction storage exception "
1340 "while in user mode. Aborting\n");
1341 break;
1342 case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */
1343 cpu_abort(env, "Hypervisor data segment exception "
1344 "while in user mode. Aborting\n");
1345 break;
1346 case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */
1347 cpu_abort(env, "Hypervisor instruction segment exception "
1348 "while in user mode. Aborting\n");
1349 break;
1350 case POWERPC_EXCP_VPU: /* Vector unavailable exception */
1351 EXCP_DUMP(env, "No Altivec instructions allowed\n");
1352 info.si_signo = TARGET_SIGILL;
1353 info.si_errno = 0;
1354 info.si_code = TARGET_ILL_COPROC;
1355 info._sifields._sigfault._addr = env->nip - 4;
1356 queue_signal(env, info.si_signo, &info);
1357 break;
1358 case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */
1359 cpu_abort(env, "Programable interval timer interrupt "
1360 "while in user mode. Aborting\n");
1361 break;
1362 case POWERPC_EXCP_IO: /* IO error exception */
1363 cpu_abort(env, "IO error exception while in user mode. "
1364 "Aborting\n");
1365 break;
1366 case POWERPC_EXCP_RUNM: /* Run mode exception */
1367 cpu_abort(env, "Run mode exception while in user mode. "
1368 "Aborting\n");
1369 break;
1370 case POWERPC_EXCP_EMUL: /* Emulation trap exception */
1371 cpu_abort(env, "Emulation trap exception not handled\n");
1372 break;
1373 case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */
1374 cpu_abort(env, "Instruction fetch TLB exception "
1375 "while in user-mode. Aborting");
1376 break;
1377 case POWERPC_EXCP_DLTLB: /* Data load TLB miss */
1378 cpu_abort(env, "Data load TLB exception while in user-mode. "
1379 "Aborting");
1380 break;
1381 case POWERPC_EXCP_DSTLB: /* Data store TLB miss */
1382 cpu_abort(env, "Data store TLB exception while in user-mode. "
1383 "Aborting");
1384 break;
1385 case POWERPC_EXCP_FPA: /* Floating-point assist exception */
1386 cpu_abort(env, "Floating-point assist exception not handled\n");
1387 break;
1388 case POWERPC_EXCP_IABR: /* Instruction address breakpoint */
1389 cpu_abort(env, "Instruction address breakpoint exception "
1390 "not handled\n");
1391 break;
1392 case POWERPC_EXCP_SMI: /* System management interrupt */
1393 cpu_abort(env, "System management interrupt while in user mode. "
1394 "Aborting\n");
1395 break;
1396 case POWERPC_EXCP_THERM: /* Thermal interrupt */
1397 cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
1398 "Aborting\n");
1399 break;
1400 case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */
1401 cpu_abort(env, "Performance monitor exception not handled\n");
1402 break;
1403 case POWERPC_EXCP_VPUA: /* Vector assist exception */
1404 cpu_abort(env, "Vector assist exception not handled\n");
1405 break;
1406 case POWERPC_EXCP_SOFTP: /* Soft patch exception */
1407 cpu_abort(env, "Soft patch exception not handled\n");
1408 break;
1409 case POWERPC_EXCP_MAINT: /* Maintenance exception */
1410 cpu_abort(env, "Maintenance exception while in user mode. "
1411 "Aborting\n");
1412 break;
1413 case POWERPC_EXCP_STOP: /* stop translation */
1414 /* We did invalidate the instruction cache. Go on */
1415 break;
1416 case POWERPC_EXCP_BRANCH: /* branch instruction: */
1417 /* We just stopped because of a branch. Go on */
1418 break;
1419 case POWERPC_EXCP_SYSCALL_USER:
1420 /* system call in user-mode emulation */
1421 /* WARNING:
1422 * PPC ABI uses overflow flag in cr0 to signal an error
1423 * in syscalls.
1424 */
1425 #if 0
1426 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
1427 env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
1428 #endif
1429 env->crf[0] &= ~0x1;
1430 ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4],
1431 env->gpr[5], env->gpr[6], env->gpr[7],
1432 env->gpr[8]);
1433 if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
1434 /* Returning from a successful sigreturn syscall.
1435 Avoid corrupting register state. */
1436 break;
1437 }
1438 if (ret > (uint32_t)(-515)) {
1439 env->crf[0] |= 0x1;
1440 ret = -ret;
1441 }
1442 env->gpr[3] = ret;
1443 #if 0
1444 printf("syscall returned 0x%08x (%d)\n", ret, ret);
1445 #endif
1446 break;
1447 case EXCP_DEBUG:
1448 {
1449 int sig;
1450
1451 sig = gdb_handlesig(env, TARGET_SIGTRAP);
1452 if (sig) {
1453 info.si_signo = sig;
1454 info.si_errno = 0;
1455 info.si_code = TARGET_TRAP_BRKPT;
1456 queue_signal(env, info.si_signo, &info);
1457 }
1458 }
1459 break;
1460 case EXCP_INTERRUPT:
1461 /* just indicate that signals should be handled asap */
1462 break;
1463 default:
1464 cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
1465 break;
1466 }
1467 process_pending_signals(env);
1468 }
1469 }
1470 #endif
1471
1472 #ifdef TARGET_MIPS
1473
1474 #define MIPS_SYS(name, args) args,
1475
1476 static const uint8_t mips_syscall_args[] = {
1477 MIPS_SYS(sys_syscall , 0) /* 4000 */
1478 MIPS_SYS(sys_exit , 1)
1479 MIPS_SYS(sys_fork , 0)
1480 MIPS_SYS(sys_read , 3)
1481 MIPS_SYS(sys_write , 3)
1482 MIPS_SYS(sys_open , 3) /* 4005 */
1483 MIPS_SYS(sys_close , 1)
1484 MIPS_SYS(sys_waitpid , 3)
1485 MIPS_SYS(sys_creat , 2)
1486 MIPS_SYS(sys_link , 2)
1487 MIPS_SYS(sys_unlink , 1) /* 4010 */
1488 MIPS_SYS(sys_execve , 0)
1489 MIPS_SYS(sys_chdir , 1)
1490 MIPS_SYS(sys_time , 1)
1491 MIPS_SYS(sys_mknod , 3)
1492 MIPS_SYS(sys_chmod , 2) /* 4015 */
1493 MIPS_SYS(sys_lchown , 3)
1494 MIPS_SYS(sys_ni_syscall , 0)
1495 MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */
1496 MIPS_SYS(sys_lseek , 3)
1497 MIPS_SYS(sys_getpid , 0) /* 4020 */
1498 MIPS_SYS(sys_mount , 5)
1499 MIPS_SYS(sys_oldumount , 1)
1500 MIPS_SYS(sys_setuid , 1)
1501 MIPS_SYS(sys_getuid , 0)
1502 MIPS_SYS(sys_stime , 1) /* 4025 */
1503 MIPS_SYS(sys_ptrace , 4)
1504 MIPS_SYS(sys_alarm , 1)
1505 MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */
1506 MIPS_SYS(sys_pause , 0)
1507 MIPS_SYS(sys_utime , 2) /* 4030 */
1508 MIPS_SYS(sys_ni_syscall , 0)
1509 MIPS_SYS(sys_ni_syscall , 0)
1510 MIPS_SYS(sys_access , 2)
1511 MIPS_SYS(sys_nice , 1)
1512 MIPS_SYS(sys_ni_syscall , 0) /* 4035 */
1513 MIPS_SYS(sys_sync , 0)
1514 MIPS_SYS(sys_kill , 2)
1515 MIPS_SYS(sys_rename , 2)
1516 MIPS_SYS(sys_mkdir , 2)
1517 MIPS_SYS(sys_rmdir , 1) /* 4040 */
1518 MIPS_SYS(sys_dup , 1)
1519 MIPS_SYS(sys_pipe , 0)
1520 MIPS_SYS(sys_times , 1)
1521 MIPS_SYS(sys_ni_syscall , 0)
1522 MIPS_SYS(sys_brk , 1) /* 4045 */
1523 MIPS_SYS(sys_setgid , 1)
1524 MIPS_SYS(sys_getgid , 0)
1525 MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */
1526 MIPS_SYS(sys_geteuid , 0)
1527 MIPS_SYS(sys_getegid , 0) /* 4050 */
1528 MIPS_SYS(sys_acct , 0)
1529 MIPS_SYS(sys_umount , 2)
1530 MIPS_SYS(sys_ni_syscall , 0)
1531 MIPS_SYS(sys_ioctl , 3)
1532 MIPS_SYS(sys_fcntl , 3) /* 4055 */
1533 MIPS_SYS(sys_ni_syscall , 2)
1534 MIPS_SYS(sys_setpgid , 2)
1535 MIPS_SYS(sys_ni_syscall , 0)
1536 MIPS_SYS(sys_olduname , 1)
1537 MIPS_SYS(sys_umask , 1) /* 4060 */
1538 MIPS_SYS(sys_chroot , 1)
1539 MIPS_SYS(sys_ustat , 2)
1540 MIPS_SYS(sys_dup2 , 2)
1541 MIPS_SYS(sys_getppid , 0)
1542 MIPS_SYS(sys_getpgrp , 0) /* 4065 */
1543 MIPS_SYS(sys_setsid , 0)
1544 MIPS_SYS(sys_sigaction , 3)
1545 MIPS_SYS(sys_sgetmask , 0)
1546 MIPS_SYS(sys_ssetmask , 1)
1547 MIPS_SYS(sys_setreuid , 2) /* 4070 */
1548 MIPS_SYS(sys_setregid , 2)
1549 MIPS_SYS(sys_sigsuspend , 0)
1550 MIPS_SYS(sys_sigpending , 1)
1551 MIPS_SYS(sys_sethostname , 2)
1552 MIPS_SYS(sys_setrlimit , 2) /* 4075 */
1553 MIPS_SYS(sys_getrlimit , 2)
1554 MIPS_SYS(sys_getrusage , 2)
1555 MIPS_SYS(sys_gettimeofday, 2)
1556 MIPS_SYS(sys_settimeofday, 2)
1557 MIPS_SYS(sys_getgroups , 2) /* 4080 */
1558 MIPS_SYS(sys_setgroups , 2)
1559 MIPS_SYS(sys_ni_syscall , 0) /* old_select */
1560 MIPS_SYS(sys_symlink , 2)
1561 MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */
1562 MIPS_SYS(sys_readlink , 3) /* 4085 */
1563 MIPS_SYS(sys_uselib , 1)
1564 MIPS_SYS(sys_swapon , 2)
1565 MIPS_SYS(sys_reboot , 3)
1566 MIPS_SYS(old_readdir , 3)
1567 MIPS_SYS(old_mmap , 6) /* 4090 */
1568 MIPS_SYS(sys_munmap , 2)
1569 MIPS_SYS(sys_truncate , 2)
1570 MIPS_SYS(sys_ftruncate , 2)
1571 MIPS_SYS(sys_fchmod , 2)
1572 MIPS_SYS(sys_fchown , 3) /* 4095 */
1573 MIPS_SYS(sys_getpriority , 2)
1574 MIPS_SYS(sys_setpriority , 3)
1575 MIPS_SYS(sys_ni_syscall , 0)
1576 MIPS_SYS(sys_statfs , 2)
1577 MIPS_SYS(sys_fstatfs , 2) /* 4100 */
1578 MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */
1579 MIPS_SYS(sys_socketcall , 2)
1580 MIPS_SYS(sys_syslog , 3)
1581 MIPS_SYS(sys_setitimer , 3)
1582 MIPS_SYS(sys_getitimer , 2) /* 4105 */
1583 MIPS_SYS(sys_newstat , 2)
1584 MIPS_SYS(sys_newlstat , 2)
1585 MIPS_SYS(sys_newfstat , 2)
1586 MIPS_SYS(sys_uname , 1)
1587 MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */
1588 MIPS_SYS(sys_vhangup , 0)
1589 MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */
1590 MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */
1591 MIPS_SYS(sys_wait4 , 4)
1592 MIPS_SYS(sys_swapoff , 1) /* 4115 */
1593 MIPS_SYS(sys_sysinfo , 1)
1594 MIPS_SYS(sys_ipc , 6)
1595 MIPS_SYS(sys_fsync , 1)
1596 MIPS_SYS(sys_sigreturn , 0)
1597 MIPS_SYS(sys_clone , 6) /* 4120 */
1598 MIPS_SYS(sys_setdomainname, 2)
1599 MIPS_SYS(sys_newuname , 1)
1600 MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */
1601 MIPS_SYS(sys_adjtimex , 1)
1602 MIPS_SYS(sys_mprotect , 3) /* 4125 */
1603 MIPS_SYS(sys_sigprocmask , 3)
1604 MIPS_SYS(sys_ni_syscall , 0) /* was create_module */
1605 MIPS_SYS(sys_init_module , 5)
1606 MIPS_SYS(sys_delete_module, 1)
1607 MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */
1608 MIPS_SYS(sys_quotactl , 0)
1609 MIPS_SYS(sys_getpgid , 1)
1610 MIPS_SYS(sys_fchdir , 1)
1611 MIPS_SYS(sys_bdflush , 2)
1612 MIPS_SYS(sys_sysfs , 3) /* 4135 */
1613 MIPS_SYS(sys_personality , 1)
1614 MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */
1615 MIPS_SYS(sys_setfsuid , 1)
1616 MIPS_SYS(sys_setfsgid , 1)
1617 MIPS_SYS(sys_llseek , 5) /* 4140 */
1618 MIPS_SYS(sys_getdents , 3)
1619 MIPS_SYS(sys_select , 5)
1620 MIPS_SYS(sys_flock , 2)
1621 MIPS_SYS(sys_msync , 3)
1622 MIPS_SYS(sys_readv , 3) /* 4145 */
1623 MIPS_SYS(sys_writev , 3)
1624 MIPS_SYS(sys_cacheflush , 3)
1625 MIPS_SYS(sys_cachectl , 3)
1626 MIPS_SYS(sys_sysmips , 4)
1627 MIPS_SYS(sys_ni_syscall , 0) /* 4150 */
1628 MIPS_SYS(sys_getsid , 1)
1629 MIPS_SYS(sys_fdatasync , 0)
1630 MIPS_SYS(sys_sysctl , 1)
1631 MIPS_SYS(sys_mlock , 2)
1632 MIPS_SYS(sys_munlock , 2) /* 4155 */
1633 MIPS_SYS(sys_mlockall , 1)
1634 MIPS_SYS(sys_munlockall , 0)
1635 MIPS_SYS(sys_sched_setparam, 2)
1636 MIPS_SYS(sys_sched_getparam, 2)
1637 MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */
1638 MIPS_SYS(sys_sched_getscheduler, 1)
1639 MIPS_SYS(sys_sched_yield , 0)
1640 MIPS_SYS(sys_sched_get_priority_max, 1)
1641 MIPS_SYS(sys_sched_get_priority_min, 1)
1642 MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */
1643 MIPS_SYS(sys_nanosleep, 2)
1644 MIPS_SYS(sys_mremap , 4)
1645 MIPS_SYS(sys_accept , 3)
1646 MIPS_SYS(sys_bind , 3)
1647 MIPS_SYS(sys_connect , 3) /* 4170 */
1648 MIPS_SYS(sys_getpeername , 3)
1649 MIPS_SYS(sys_getsockname , 3)
1650 MIPS_SYS(sys_getsockopt , 5)
1651 MIPS_SYS(sys_listen , 2)
1652 MIPS_SYS(sys_recv , 4) /* 4175 */
1653 MIPS_SYS(sys_recvfrom , 6)
1654 MIPS_SYS(sys_recvmsg , 3)
1655 MIPS_SYS(sys_send , 4)
1656 MIPS_SYS(sys_sendmsg , 3)
1657 MIPS_SYS(sys_sendto , 6) /* 4180 */
1658 MIPS_SYS(sys_setsockopt , 5)
1659 MIPS_SYS(sys_shutdown , 2)
1660 MIPS_SYS(sys_socket , 3)
1661 MIPS_SYS(sys_socketpair , 4)
1662 MIPS_SYS(sys_setresuid , 3) /* 4185 */
1663 MIPS_SYS(sys_getresuid , 3)
1664 MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */
1665 MIPS_SYS(sys_poll , 3)
1666 MIPS_SYS(sys_nfsservctl , 3)
1667 MIPS_SYS(sys_setresgid , 3) /* 4190 */
1668 MIPS_SYS(sys_getresgid , 3)
1669 MIPS_SYS(sys_prctl , 5)
1670 MIPS_SYS(sys_rt_sigreturn, 0)
1671 MIPS_SYS(sys_rt_sigaction, 4)
1672 MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */
1673 MIPS_SYS(sys_rt_sigpending, 2)
1674 MIPS_SYS(sys_rt_sigtimedwait, 4)
1675 MIPS_SYS(sys_rt_sigqueueinfo, 3)
1676 MIPS_SYS(sys_rt_sigsuspend, 0)
1677 MIPS_SYS(sys_pread64 , 6) /* 4200 */
1678 MIPS_SYS(sys_pwrite64 , 6)
1679 MIPS_SYS(sys_chown , 3)
1680 MIPS_SYS(sys_getcwd , 2)
1681 MIPS_SYS(sys_capget , 2)
1682 MIPS_SYS(sys_capset , 2) /* 4205 */
1683 MIPS_SYS(sys_sigaltstack , 0)
1684 MIPS_SYS(sys_sendfile , 4)
1685 MIPS_SYS(sys_ni_syscall , 0)
1686 MIPS_SYS(sys_ni_syscall , 0)
1687 MIPS_SYS(sys_mmap2 , 6) /* 4210 */
1688 MIPS_SYS(sys_truncate64 , 4)
1689 MIPS_SYS(sys_ftruncate64 , 4)
1690 MIPS_SYS(sys_stat64 , 2)
1691 MIPS_SYS(sys_lstat64 , 2)
1692 MIPS_SYS(sys_fstat64 , 2) /* 4215 */
1693 MIPS_SYS(sys_pivot_root , 2)
1694 MIPS_SYS(sys_mincore , 3)
1695 MIPS_SYS(sys_madvise , 3)
1696 MIPS_SYS(sys_getdents64 , 3)
1697 MIPS_SYS(sys_fcntl64 , 3) /* 4220 */
1698 MIPS_SYS(sys_ni_syscall , 0)
1699 MIPS_SYS(sys_gettid , 0)
1700 MIPS_SYS(sys_readahead , 5)
1701 MIPS_SYS(sys_setxattr , 5)
1702 MIPS_SYS(sys_lsetxattr , 5) /* 4225 */
1703 MIPS_SYS(sys_fsetxattr , 5)
1704 MIPS_SYS(sys_getxattr , 4)
1705 MIPS_SYS(sys_lgetxattr , 4)
1706 MIPS_SYS(sys_fgetxattr , 4)
1707 MIPS_SYS(sys_listxattr , 3) /* 4230 */
1708 MIPS_SYS(sys_llistxattr , 3)
1709 MIPS_SYS(sys_flistxattr , 3)
1710 MIPS_SYS(sys_removexattr , 2)
1711 MIPS_SYS(sys_lremovexattr, 2)
1712 MIPS_SYS(sys_fremovexattr, 2) /* 4235 */
1713 MIPS_SYS(sys_tkill , 2)
1714 MIPS_SYS(sys_sendfile64 , 5)
1715 MIPS_SYS(sys_futex , 2)
1716 MIPS_SYS(sys_sched_setaffinity, 3)
1717 MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */
1718 MIPS_SYS(sys_io_setup , 2)
1719 MIPS_SYS(sys_io_destroy , 1)
1720 MIPS_SYS(sys_io_getevents, 5)
1721 MIPS_SYS(sys_io_submit , 3)
1722 MIPS_SYS(sys_io_cancel , 3) /* 4245 */
1723 MIPS_SYS(sys_exit_group , 1)
1724 MIPS_SYS(sys_lookup_dcookie, 3)
1725 MIPS_SYS(sys_epoll_create, 1)
1726 MIPS_SYS(sys_epoll_ctl , 4)
1727 MIPS_SYS(sys_epoll_wait , 3) /* 4250 */
1728 MIPS_SYS(sys_remap_file_pages, 5)
1729 MIPS_SYS(sys_set_tid_address, 1)
1730 MIPS_SYS(sys_restart_syscall, 0)
1731 MIPS_SYS(sys_fadvise64_64, 7)
1732 MIPS_SYS(sys_statfs64 , 3) /* 4255 */
1733 MIPS_SYS(sys_fstatfs64 , 2)
1734 MIPS_SYS(sys_timer_create, 3)
1735 MIPS_SYS(sys_timer_settime, 4)
1736 MIPS_SYS(sys_timer_gettime, 2)
1737 MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */
1738 MIPS_SYS(sys_timer_delete, 1)
1739 MIPS_SYS(sys_clock_settime, 2)
1740 MIPS_SYS(sys_clock_gettime, 2)
1741 MIPS_SYS(sys_clock_getres, 2)
1742 MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */
1743 MIPS_SYS(sys_tgkill , 3)
1744 MIPS_SYS(sys_utimes , 2)
1745 MIPS_SYS(sys_mbind , 4)
1746 MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */
1747 MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */
1748 MIPS_SYS(sys_mq_open , 4)
1749 MIPS_SYS(sys_mq_unlink , 1)
1750 MIPS_SYS(sys_mq_timedsend, 5)
1751 MIPS_SYS(sys_mq_timedreceive, 5)
1752 MIPS_SYS(sys_mq_notify , 2) /* 4275 */
1753 MIPS_SYS(sys_mq_getsetattr, 3)
1754 MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */
1755 MIPS_SYS(sys_waitid , 4)
1756 MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */
1757 MIPS_SYS(sys_add_key , 5)
1758 MIPS_SYS(sys_request_key, 4)
1759 MIPS_SYS(sys_keyctl , 5)
1760 MIPS_SYS(sys_set_thread_area, 1)
1761 MIPS_SYS(sys_inotify_init, 0)
1762 MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */
1763 MIPS_SYS(sys_inotify_rm_watch, 2)
1764 MIPS_SYS(sys_migrate_pages, 4)
1765 MIPS_SYS(sys_openat, 4)
1766 MIPS_SYS(sys_mkdirat, 3)
1767 MIPS_SYS(sys_mknodat, 4) /* 4290 */
1768 MIPS_SYS(sys_fchownat, 5)
1769 MIPS_SYS(sys_futimesat, 3)
1770 MIPS_SYS(sys_fstatat64, 4)
1771 MIPS_SYS(sys_unlinkat, 3)
1772 MIPS_SYS(sys_renameat, 4) /* 4295 */
1773 MIPS_SYS(sys_linkat, 5)
1774 MIPS_SYS(sys_symlinkat, 3)
1775 MIPS_SYS(sys_readlinkat, 4)
1776 MIPS_SYS(sys_fchmodat, 3)
1777 MIPS_SYS(sys_faccessat, 3) /* 4300 */
1778 MIPS_SYS(sys_pselect6, 6)
1779 MIPS_SYS(sys_ppoll, 5)
1780 MIPS_SYS(sys_unshare, 1)
1781 MIPS_SYS(sys_splice, 4)
1782 MIPS_SYS(sys_sync_file_range, 7) /* 4305 */
1783 MIPS_SYS(sys_tee, 4)
1784 MIPS_SYS(sys_vmsplice, 4)
1785 MIPS_SYS(sys_move_pages, 6)
1786 MIPS_SYS(sys_set_robust_list, 2)
1787 MIPS_SYS(sys_get_robust_list, 3) /* 4310 */
1788 MIPS_SYS(sys_kexec_load, 4)
1789 MIPS_SYS(sys_getcpu, 3)
1790 MIPS_SYS(sys_epoll_pwait, 6)
1791 MIPS_SYS(sys_ioprio_set, 3)
1792 MIPS_SYS(sys_ioprio_get, 2)
1793 };
1794
1795 #undef MIPS_SYS
1796
1797 static int do_store_exclusive(CPUMIPSState *env)
1798 {
1799 target_ulong addr;
1800 target_ulong page_addr;
1801 target_ulong val;
1802 int flags;
1803 int segv = 0;
1804 int reg;
1805 int d;
1806
1807 addr = env->CP0_LLAddr;
1808 page_addr = addr & TARGET_PAGE_MASK;
1809 start_exclusive();
1810 mmap_lock();
1811 flags = page_get_flags(page_addr);
1812 if ((flags & PAGE_READ) == 0) {
1813 segv = 1;
1814 } else {
1815 reg = env->llreg & 0x1f;
1816 d = (env->llreg & 0x20) != 0;
1817 if (d) {
1818 segv = get_user_s64(val, addr);
1819 } else {
1820 segv = get_user_s32(val, addr);
1821 }
1822 if (!segv) {
1823 if (val != env->llval) {
1824 env->active_tc.gpr[reg] = 0;
1825 } else {
1826 if (d) {
1827 segv = put_user_u64(env->llnewval, addr);
1828 } else {
1829 segv = put_user_u32(env->llnewval, addr);
1830 }
1831 if (!segv) {
1832 env->active_tc.gpr[reg] = 1;
1833 }
1834 }
1835 }
1836 }
1837 env->CP0_LLAddr = -1;
1838 if (!segv) {
1839 env->active_tc.PC += 4;
1840 }
1841 mmap_unlock();
1842 end_exclusive();
1843 return segv;
1844 }
1845
1846 void cpu_loop(CPUMIPSState *env)
1847 {
1848 target_siginfo_t info;
1849 int trapnr, ret;
1850 unsigned int syscall_num;
1851
1852 for(;;) {
1853 cpu_exec_start(env);
1854 trapnr = cpu_mips_exec(env);
1855 cpu_exec_end(env);
1856 switch(trapnr) {
1857 case EXCP_SYSCALL:
1858 syscall_num = env->active_tc.gpr[2] - 4000;
1859 env->active_tc.PC += 4;
1860 if (syscall_num >= sizeof(mips_syscall_args)) {
1861 ret = -ENOSYS;
1862 } else {
1863 int nb_args;
1864 abi_ulong sp_reg;
1865 abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0;
1866
1867 nb_args = mips_syscall_args[syscall_num];
1868 sp_reg = env->active_tc.gpr[29];
1869 switch (nb_args) {
1870 /* these arguments are taken from the stack */
1871 /* FIXME - what to do if get_user() fails? */
1872 case 8: get_user_ual(arg8, sp_reg + 28);
1873 case 7: get_user_ual(arg7, sp_reg + 24);
1874 case 6: get_user_ual(arg6, sp_reg + 20);
1875 case 5: get_user_ual(arg5, sp_reg + 16);
1876 default:
1877 break;
1878 }
1879 ret = do_syscall(env, env->active_tc.gpr[2],
1880 env->active_tc.gpr[4],
1881 env->active_tc.gpr[5],
1882 env->active_tc.gpr[6],
1883 env->active_tc.gpr[7],
1884 arg5, arg6/*, arg7, arg8*/);
1885 }
1886 if (ret == -TARGET_QEMU_ESIGRETURN) {
1887 /* Returning from a successful sigreturn syscall.
1888 Avoid clobbering register state. */
1889 break;
1890 }
1891 if ((unsigned int)ret >= (unsigned int)(-1133)) {
1892 env->active_tc.gpr[7] = 1; /* error flag */
1893 ret = -ret;
1894 } else {
1895 env->active_tc.gpr[7] = 0; /* error flag */
1896 }
1897 env->active_tc.gpr[2] = ret;
1898 break;
1899 case EXCP_TLBL:
1900 case EXCP_TLBS:
1901 info.si_signo = TARGET_SIGSEGV;
1902 info.si_errno = 0;
1903 /* XXX: check env->error_code */
1904 info.si_code = TARGET_SEGV_MAPERR;
1905 info._sifields._sigfault._addr = env->CP0_BadVAddr;
1906 queue_signal(env, info.si_signo, &info);
1907 break;
1908 case EXCP_CpU:
1909 case EXCP_RI:
1910 info.si_signo = TARGET_SIGILL;
1911 info.si_errno = 0;
1912 info.si_code = 0;
1913 queue_signal(env, info.si_signo, &info);
1914 break;
1915 case EXCP_INTERRUPT:
1916 /* just indicate that signals should be handled asap */
1917 break;
1918 case EXCP_DEBUG:
1919 {
1920 int sig;
1921
1922 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1923 if (sig)
1924 {
1925 info.si_signo = sig;
1926 info.si_errno = 0;
1927 info.si_code = TARGET_TRAP_BRKPT;
1928 queue_signal(env, info.si_signo, &info);
1929 }
1930 }
1931 break;
1932 case EXCP_SC:
1933 if (do_store_exclusive(env)) {
1934 info.si_signo = TARGET_SIGSEGV;
1935 info.si_errno = 0;
1936 info.si_code = TARGET_SEGV_MAPERR;
1937 info._sifields._sigfault._addr = env->active_tc.PC;
1938 queue_signal(env, info.si_signo, &info);
1939 }
1940 break;
1941 default:
1942 // error:
1943 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
1944 trapnr);
1945 cpu_dump_state(env, stderr, fprintf, 0);
1946 abort();
1947 }
1948 process_pending_signals(env);
1949 }
1950 }
1951 #endif
1952
1953 #ifdef TARGET_SH4
1954 void cpu_loop (CPUState *env)
1955 {
1956 int trapnr, ret;
1957 target_siginfo_t info;
1958
1959 while (1) {
1960 trapnr = cpu_sh4_exec (env);
1961
1962 switch (trapnr) {
1963 case 0x160:
1964 env->pc += 2;
1965 ret = do_syscall(env,
1966 env->gregs[3],
1967 env->gregs[4],
1968 env->gregs[5],
1969 env->gregs[6],
1970 env->gregs[7],
1971 env->gregs[0],
1972 env->gregs[1]);
1973 env->gregs[0] = ret;
1974 break;
1975 case EXCP_INTERRUPT:
1976 /* just indicate that signals should be handled asap */
1977 break;
1978 case EXCP_DEBUG:
1979 {
1980 int sig;
1981
1982 sig = gdb_handlesig (env, TARGET_SIGTRAP);
1983 if (sig)
1984 {
1985 info.si_signo = sig;
1986 info.si_errno = 0;
1987 info.si_code = TARGET_TRAP_BRKPT;
1988 queue_signal(env, info.si_signo, &info);
1989 }
1990 }
1991 break;
1992 case 0xa0:
1993 case 0xc0:
1994 info.si_signo = SIGSEGV;
1995 info.si_errno = 0;
1996 info.si_code = TARGET_SEGV_MAPERR;
1997 info._sifields._sigfault._addr = env->tea;
1998 queue_signal(env, info.si_signo, &info);
1999 break;
2000
2001 default:
2002 printf ("Unhandled trap: 0x%x\n", trapnr);
2003 cpu_dump_state(env, stderr, fprintf, 0);
2004 exit (1);
2005 }
2006 process_pending_signals (env);
2007 }
2008 }
2009 #endif
2010
2011 #ifdef TARGET_CRIS
2012 void cpu_loop (CPUState *env)
2013 {
2014 int trapnr, ret;
2015 target_siginfo_t info;
2016
2017 while (1) {
2018 trapnr = cpu_cris_exec (env);
2019 switch (trapnr) {
2020 case 0xaa:
2021 {
2022 info.si_signo = SIGSEGV;
2023 info.si_errno = 0;
2024 /* XXX: check env->error_code */
2025 info.si_code = TARGET_SEGV_MAPERR;
2026 info._sifields._sigfault._addr = env->pregs[PR_EDA];
2027 queue_signal(env, info.si_signo, &info);
2028 }
2029 break;
2030 case EXCP_INTERRUPT:
2031 /* just indicate that signals should be handled asap */
2032 break;
2033 case EXCP_BREAK:
2034 ret = do_syscall(env,
2035 env->regs[9],
2036 env->regs[10],
2037 env->regs[11],
2038 env->regs[12],
2039 env->regs[13],
2040 env->pregs[7],
2041 env->pregs[11]);
2042 env->regs[10] = ret;
2043 break;
2044 case EXCP_DEBUG:
2045 {
2046 int sig;
2047
2048 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2049 if (sig)
2050 {
2051 info.si_signo = sig;
2052 info.si_errno = 0;
2053 info.si_code = TARGET_TRAP_BRKPT;
2054 queue_signal(env, info.si_signo, &info);
2055 }
2056 }
2057 break;
2058 default:
2059 printf ("Unhandled trap: 0x%x\n", trapnr);
2060 cpu_dump_state(env, stderr, fprintf, 0);
2061 exit (1);
2062 }
2063 process_pending_signals (env);
2064 }
2065 }
2066 #endif
2067
2068 #ifdef TARGET_MICROBLAZE
2069 void cpu_loop (CPUState *env)
2070 {
2071 int trapnr, ret;
2072 target_siginfo_t info;
2073
2074 while (1) {
2075 trapnr = cpu_mb_exec (env);
2076 switch (trapnr) {
2077 case 0xaa:
2078 {
2079 info.si_signo = SIGSEGV;
2080 info.si_errno = 0;
2081 /* XXX: check env->error_code */
2082 info.si_code = TARGET_SEGV_MAPERR;
2083 info._sifields._sigfault._addr = 0;
2084 queue_signal(env, info.si_signo, &info);
2085 }
2086 break;
2087 case EXCP_INTERRUPT:
2088 /* just indicate that signals should be handled asap */
2089 break;
2090 case EXCP_BREAK:
2091 /* Return address is 4 bytes after the call. */
2092 env->regs[14] += 4;
2093 ret = do_syscall(env,
2094 env->regs[12],
2095 env->regs[5],
2096 env->regs[6],
2097 env->regs[7],
2098 env->regs[8],
2099 env->regs[9],
2100 env->regs[10]);
2101 env->regs[3] = ret;
2102 env->sregs[SR_PC] = env->regs[14];
2103 break;
2104 case EXCP_DEBUG:
2105 {
2106 int sig;
2107
2108 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2109 if (sig)
2110 {
2111 info.si_signo = sig;
2112 info.si_errno = 0;
2113 info.si_code = TARGET_TRAP_BRKPT;
2114 queue_signal(env, info.si_signo, &info);
2115 }
2116 }
2117 break;
2118 default:
2119 printf ("Unhandled trap: 0x%x\n", trapnr);
2120 cpu_dump_state(env, stderr, fprintf, 0);
2121 exit (1);
2122 }
2123 process_pending_signals (env);
2124 }
2125 }
2126 #endif
2127
2128 #ifdef TARGET_M68K
2129
2130 void cpu_loop(CPUM68KState *env)
2131 {
2132 int trapnr;
2133 unsigned int n;
2134 target_siginfo_t info;
2135 TaskState *ts = env->opaque;
2136
2137 for(;;) {
2138 trapnr = cpu_m68k_exec(env);
2139 switch(trapnr) {
2140 case EXCP_ILLEGAL:
2141 {
2142 if (ts->sim_syscalls) {
2143 uint16_t nr;
2144 nr = lduw(env->pc + 2);
2145 env->pc += 4;
2146 do_m68k_simcall(env, nr);
2147 } else {
2148 goto do_sigill;
2149 }
2150 }
2151 break;
2152 case EXCP_HALT_INSN:
2153 /* Semihosing syscall. */
2154 env->pc += 4;
2155 do_m68k_semihosting(env, env->dregs[0]);
2156 break;
2157 case EXCP_LINEA:
2158 case EXCP_LINEF:
2159 case EXCP_UNSUPPORTED:
2160 do_sigill:
2161 info.si_signo = SIGILL;
2162 info.si_errno = 0;
2163 info.si_code = TARGET_ILL_ILLOPN;
2164 info._sifields._sigfault._addr = env->pc;
2165 queue_signal(env, info.si_signo, &info);
2166 break;
2167 case EXCP_TRAP0:
2168 {
2169 ts->sim_syscalls = 0;
2170 n = env->dregs[0];
2171 env->pc += 2;
2172 env->dregs[0] = do_syscall(env,
2173 n,
2174 env->dregs[1],
2175 env->dregs[2],
2176 env->dregs[3],
2177 env->dregs[4],
2178 env->dregs[5],
2179 env->aregs[0]);
2180 }
2181 break;
2182 case EXCP_INTERRUPT:
2183 /* just indicate that signals should be handled asap */
2184 break;
2185 case EXCP_ACCESS:
2186 {
2187 info.si_signo = SIGSEGV;
2188 info.si_errno = 0;
2189 /* XXX: check env->error_code */
2190 info.si_code = TARGET_SEGV_MAPERR;
2191 info._sifields._sigfault._addr = env->mmu.ar;
2192 queue_signal(env, info.si_signo, &info);
2193 }
2194 break;
2195 case EXCP_DEBUG:
2196 {
2197 int sig;
2198
2199 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2200 if (sig)
2201 {
2202 info.si_signo = sig;
2203 info.si_errno = 0;
2204 info.si_code = TARGET_TRAP_BRKPT;
2205 queue_signal(env, info.si_signo, &info);
2206 }
2207 }
2208 break;
2209 default:
2210 fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
2211 trapnr);
2212 cpu_dump_state(env, stderr, fprintf, 0);
2213 abort();
2214 }
2215 process_pending_signals(env);
2216 }
2217 }
2218 #endif /* TARGET_M68K */
2219
2220 #ifdef TARGET_ALPHA
2221 void cpu_loop (CPUState *env)
2222 {
2223 int trapnr;
2224 target_siginfo_t info;
2225
2226 while (1) {
2227 trapnr = cpu_alpha_exec (env);
2228
2229 switch (trapnr) {
2230 case EXCP_RESET:
2231 fprintf(stderr, "Reset requested. Exit\n");
2232 exit(1);
2233 break;
2234 case EXCP_MCHK:
2235 fprintf(stderr, "Machine check exception. Exit\n");
2236 exit(1);
2237 break;
2238 case EXCP_ARITH:
2239 fprintf(stderr, "Arithmetic trap.\n");
2240 exit(1);
2241 break;
2242 case EXCP_HW_INTERRUPT:
2243 fprintf(stderr, "External interrupt. Exit\n");
2244 exit(1);
2245 break;
2246 case EXCP_DFAULT:
2247 fprintf(stderr, "MMU data fault\n");
2248 exit(1);
2249 break;
2250 case EXCP_DTB_MISS_PAL:
2251 fprintf(stderr, "MMU data TLB miss in PALcode\n");
2252 exit(1);
2253 break;
2254 case EXCP_ITB_MISS:
2255 fprintf(stderr, "MMU instruction TLB miss\n");
2256 exit(1);
2257 break;
2258 case EXCP_ITB_ACV:
2259 fprintf(stderr, "MMU instruction access violation\n");
2260 exit(1);
2261 break;
2262 case EXCP_DTB_MISS_NATIVE:
2263 fprintf(stderr, "MMU data TLB miss\n");
2264 exit(1);
2265 break;
2266 case EXCP_UNALIGN:
2267 fprintf(stderr, "Unaligned access\n");
2268 exit(1);
2269 break;
2270 case EXCP_OPCDEC:
2271 fprintf(stderr, "Invalid instruction\n");
2272 exit(1);
2273 break;
2274 case EXCP_FEN:
2275 fprintf(stderr, "Floating-point not allowed\n");
2276 exit(1);
2277 break;
2278 case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1):
2279 call_pal(env, (trapnr >> 6) | 0x80);
2280 break;
2281 case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1):
2282 fprintf(stderr, "Privileged call to PALcode\n");
2283 exit(1);
2284 break;
2285 case EXCP_DEBUG:
2286 {
2287 int sig;
2288
2289 sig = gdb_handlesig (env, TARGET_SIGTRAP);
2290 if (sig)
2291 {
2292 info.si_signo = sig;
2293 info.si_errno = 0;
2294 info.si_code = TARGET_TRAP_BRKPT;
2295 queue_signal(env, info.si_signo, &info);
2296 }
2297 }
2298 break;
2299 default:
2300 printf ("Unhandled trap: 0x%x\n", trapnr);
2301 cpu_dump_state(env, stderr, fprintf, 0);
2302 exit (1);
2303 }
2304 process_pending_signals (env);
2305 }
2306 }
2307 #endif /* TARGET_ALPHA */
2308
2309 static void usage(void)
2310 {
2311 printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION ", Copyright (c) 2003-2008 Fabrice Bellard\n"
2312 "usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n"
2313 "Linux CPU emulator (compiled for %s emulation)\n"
2314 "\n"
2315 "Standard options:\n"
2316 "-h print this help\n"
2317 "-g port wait gdb connection to port\n"
2318 "-L path set the elf interpreter prefix (default=%s)\n"
2319 "-s size set the stack size in bytes (default=%ld)\n"
2320 "-cpu model select CPU (-cpu ? for list)\n"
2321 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2322 "-E var=value sets/modifies targets environment variable(s)\n"
2323 "-U var unsets targets environment variable(s)\n"
2324 "-0 argv0 forces target process argv[0] to be argv0\n"
2325 "\n"
2326 "Debug options:\n"
2327 "-d options activate log (logfile=%s)\n"
2328 "-p pagesize set the host page size to 'pagesize'\n"
2329 "-singlestep always run in singlestep mode\n"
2330 "-strace log system calls\n"
2331 "\n"
2332 "Environment variables:\n"
2333 "QEMU_STRACE Print system calls and arguments similar to the\n"
2334 " 'strace' program. Enable by setting to any value.\n"
2335 "You can use -E and -U options to set/unset environment variables\n"
2336 "for target process. It is possible to provide several variables\n"
2337 "by repeating the option. For example:\n"
2338 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2339 "Note that if you provide several changes to single variable\n"
2340 "last change will stay in effect.\n"
2341 ,
2342 TARGET_ARCH,
2343 interp_prefix,
2344 x86_stack_size,
2345 DEBUG_LOGFILE);
2346 exit(1);
2347 }
2348
2349 THREAD CPUState *thread_env;
2350
2351 void task_settid(TaskState *ts)
2352 {
2353 if (ts->ts_tid == 0) {
2354 #ifdef USE_NPTL
2355 ts->ts_tid = (pid_t)syscall(SYS_gettid);
2356 #else
2357 /* when no threads are used, tid becomes pid */
2358 ts->ts_tid = getpid();
2359 #endif
2360 }
2361 }
2362
2363 void stop_all_tasks(void)
2364 {
2365 /*
2366 * We trust that when using NPTL, start_exclusive()
2367 * handles thread stopping correctly.
2368 */
2369 start_exclusive();
2370 }
2371
2372 /* Assumes contents are already zeroed. */
2373 void init_task_state(TaskState *ts)
2374 {
2375 int i;
2376
2377 ts->used = 1;
2378 ts->first_free = ts->sigqueue_table;
2379 for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) {
2380 ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
2381 }
2382 ts->sigqueue_table[i].next = NULL;
2383 }
2384
2385 int main(int argc, char **argv, char **envp)
2386 {
2387 const char *filename;
2388 const char *cpu_model;
2389 struct target_pt_regs regs1, *regs = &regs1;
2390 struct image_info info1, *info = &info1;
2391 struct linux_binprm bprm;
2392 TaskState ts1, *ts = &ts1;
2393 CPUState *env;
2394 int optind;
2395 const char *r;
2396 int gdbstub_port = 0;
2397 char **target_environ, **wrk;
2398 char **target_argv;
2399 int target_argc;
2400 envlist_t *envlist = NULL;
2401 const char *argv0 = NULL;
2402 int i;
2403 int ret;
2404
2405 if (argc <= 1)
2406 usage();
2407
2408 qemu_cache_utils_init(envp);
2409
2410 /* init debug */
2411 cpu_set_log_filename(DEBUG_LOGFILE);
2412
2413 if ((envlist = envlist_create()) == NULL) {
2414 (void) fprintf(stderr, "Unable to allocate envlist\n");
2415 exit(1);
2416 }
2417
2418 /* add current environment into the list */
2419 for (wrk = environ; *wrk != NULL; wrk++) {
2420 (void) envlist_setenv(envlist, *wrk);
2421 }
2422
2423 cpu_model = NULL;
2424 optind = 1;
2425 for(;;) {
2426 if (optind >= argc)
2427 break;
2428 r = argv[optind];
2429 if (r[0] != '-')
2430 break;
2431 optind++;
2432 r++;
2433 if (!strcmp(r, "-")) {
2434 break;
2435 } else if (!strcmp(r, "d")) {
2436 int mask;
2437 const CPULogItem *item;
2438
2439 if (optind >= argc)
2440 break;
2441
2442 r = argv[optind++];
2443 mask = cpu_str_to_log_mask(r);
2444 if (!mask) {
2445 printf("Log items (comma separated):\n");
2446 for(item = cpu_log_items; item->mask != 0; item++) {
2447 printf("%-10s %s\n", item->name, item->help);
2448 }
2449 exit(1);
2450 }
2451 cpu_set_log(mask);
2452 } else if (!strcmp(r, "E")) {
2453 r = argv[optind++];
2454 if (envlist_setenv(envlist, r) != 0)
2455 usage();
2456 } else if (!strcmp(r, "U")) {
2457 r = argv[optind++];
2458 if (envlist_unsetenv(envlist, r) != 0)
2459 usage();
2460 } else if (!strcmp(r, "0")) {
2461 r = argv[optind++];
2462 argv0 = r;
2463 } else if (!strcmp(r, "s")) {
2464 if (optind >= argc)
2465 break;
2466 r = argv[optind++];
2467 x86_stack_size = strtol(r, (char **)&r, 0);
2468 if (x86_stack_size <= 0)
2469 usage();
2470 if (*r == 'M')
2471 x86_stack_size *= 1024 * 1024;
2472 else if (*r == 'k' || *r == 'K')
2473 x86_stack_size *= 1024;
2474 } else if (!strcmp(r, "L")) {
2475 interp_prefix = argv[optind++];
2476 } else if (!strcmp(r, "p")) {
2477 if (optind >= argc)
2478 break;
2479 qemu_host_page_size = atoi(argv[optind++]);
2480 if (qemu_host_page_size == 0 ||
2481 (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) {
2482 fprintf(stderr, "page size must be a power of two\n");
2483 exit(1);
2484 }
2485 } else if (!strcmp(r, "g")) {
2486 if (optind >= argc)
2487 break;
2488 gdbstub_port = atoi(argv[optind++]);
2489 } else if (!strcmp(r, "r")) {
2490 qemu_uname_release = argv[optind++];
2491 } else if (!strcmp(r, "cpu")) {
2492 cpu_model = argv[optind++];
2493 if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) {
2494 /* XXX: implement xxx_cpu_list for targets that still miss it */
2495 #if defined(cpu_list)
2496 cpu_list(stdout, &fprintf);
2497 #endif
2498 exit(1);
2499 }
2500 } else if (!strcmp(r, "drop-ld-preload")) {
2501 (void) envlist_unsetenv(envlist, "LD_PRELOAD");
2502 } else if (!strcmp(r, "singlestep")) {
2503 singlestep = 1;
2504 } else if (!strcmp(r, "strace")) {
2505 do_strace = 1;
2506 } else
2507 {
2508 usage();
2509 }
2510 }
2511 if (optind >= argc)
2512 usage();
2513 filename = argv[optind];
2514 exec_path = argv[optind];
2515
2516 /* Zero out regs */
2517 memset(regs, 0, sizeof(struct target_pt_regs));
2518
2519 /* Zero out image_info */
2520 memset(info, 0, sizeof(struct image_info));
2521
2522 memset(&bprm, 0, sizeof (bprm));
2523
2524 /* Scan interp_prefix dir for replacement files. */
2525 init_paths(interp_prefix);
2526
2527 if (cpu_model == NULL) {
2528 #if defined(TARGET_I386)
2529 #ifdef TARGET_X86_64
2530 cpu_model = "qemu64";
2531 #else
2532 cpu_model = "qemu32";
2533 #endif
2534 #elif defined(TARGET_ARM)
2535 cpu_model = "any";
2536 #elif defined(TARGET_M68K)
2537 cpu_model = "any";
2538 #elif defined(TARGET_SPARC)
2539 #ifdef TARGET_SPARC64
2540 cpu_model = "TI UltraSparc II";
2541 #else
2542 cpu_model = "Fujitsu MB86904";
2543 #endif
2544 #elif defined(TARGET_MIPS)
2545 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2546 cpu_model = "20Kc";
2547 #else
2548 cpu_model = "24Kf";
2549 #endif
2550 #elif defined(TARGET_PPC)
2551 #ifdef TARGET_PPC64
2552 cpu_model = "970";
2553 #else
2554 cpu_model = "750";
2555 #endif
2556 #else
2557 cpu_model = "any";
2558 #endif
2559 }
2560 cpu_exec_init_all(0);
2561 /* NOTE: we need to init the CPU at this stage to get
2562 qemu_host_page_size */
2563 env = cpu_init(cpu_model);
2564 if (!env) {
2565 fprintf(stderr, "Unable to find CPU definition\n");
2566 exit(1);
2567 }
2568 thread_env = env;
2569
2570 if (getenv("QEMU_STRACE")) {
2571 do_strace = 1;
2572 }
2573
2574 target_environ = envlist_to_environ(envlist, NULL);
2575 envlist_free(envlist);
2576
2577 /*
2578 * Prepare copy of argv vector for target.
2579 */
2580 target_argc = argc - optind;
2581 target_argv = calloc(target_argc + 1, sizeof (char *));
2582 if (target_argv == NULL) {
2583 (void) fprintf(stderr, "Unable to allocate memory for target_argv\n");
2584 exit(1);
2585 }
2586
2587 /*
2588 * If argv0 is specified (using '-0' switch) we replace
2589 * argv[0] pointer with the given one.
2590 */
2591 i = 0;
2592 if (argv0 != NULL) {
2593 target_argv[i++] = strdup(argv0);
2594 }
2595 for (; i < target_argc; i++) {
2596 target_argv[i] = strdup(argv[optind + i]);
2597 }
2598 target_argv[target_argc] = NULL;
2599
2600 memset(ts, 0, sizeof(TaskState));
2601 init_task_state(ts);
2602 /* build Task State */
2603 ts->info = info;
2604 ts->bprm = &bprm;
2605 env->opaque = ts;
2606 task_settid(ts);
2607
2608 ret = loader_exec(filename, target_argv, target_environ, regs,
2609 info, &bprm);
2610 if (ret != 0) {
2611 printf("Error %d while loading %s\n", ret, filename);
2612 _exit(1);
2613 }
2614
2615 for (i = 0; i < target_argc; i++) {
2616 free(target_argv[i]);
2617 }
2618 free(target_argv);
2619
2620 for (wrk = target_environ; *wrk; wrk++) {
2621 free(*wrk);
2622 }
2623
2624 free(target_environ);
2625
2626 if (qemu_log_enabled()) {
2627 log_page_dump();
2628
2629 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk);
2630 qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code);
2631 qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n",
2632 info->start_code);
2633 qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n",
2634 info->start_data);
2635 qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data);
2636 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n",
2637 info->start_stack);
2638 qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk);
2639 qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry);
2640 }
2641
2642 target_set_brk(info->brk);
2643 syscall_init();
2644 signal_init();
2645
2646 #if defined(TARGET_I386)
2647 cpu_x86_set_cpl(env, 3);
2648
2649 env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
2650 env->hflags |= HF_PE_MASK;
2651 if (env->cpuid_features & CPUID_SSE) {
2652 env->cr[4] |= CR4_OSFXSR_MASK;
2653 env->hflags |= HF_OSFXSR_MASK;
2654 }
2655 #ifndef TARGET_ABI32
2656 /* enable 64 bit mode if possible */
2657 if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
2658 fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
2659 exit(1);
2660 }
2661 env->cr[4] |= CR4_PAE_MASK;
2662 env->efer |= MSR_EFER_LMA | MSR_EFER_LME;
2663 env->hflags |= HF_LMA_MASK;
2664 #endif
2665
2666 /* flags setup : we activate the IRQs by default as in user mode */
2667 env->eflags |= IF_MASK;
2668
2669 /* linux register setup */
2670 #ifndef TARGET_ABI32
2671 env->regs[R_EAX] = regs->rax;
2672 env->regs[R_EBX] = regs->rbx;
2673 env->regs[R_ECX] = regs->rcx;
2674 env->regs[R_EDX] = regs->rdx;
2675 env->regs[R_ESI] = regs->rsi;
2676 env->regs[R_EDI] = regs->rdi;
2677 env->regs[R_EBP] = regs->rbp;
2678 env->regs[R_ESP] = regs->rsp;
2679 env->eip = regs->rip;
2680 #else
2681 env->regs[R_EAX] = regs->eax;
2682 env->regs[R_EBX] = regs->ebx;
2683 env->regs[R_ECX] = regs->ecx;
2684 env->regs[R_EDX] = regs->edx;
2685 env->regs[R_ESI] = regs->esi;
2686 env->regs[R_EDI] = regs->edi;
2687 env->regs[R_EBP] = regs->ebp;
2688 env->regs[R_ESP] = regs->esp;
2689 env->eip = regs->eip;
2690 #endif
2691
2692 /* linux interrupt setup */
2693 #ifndef TARGET_ABI32
2694 env->idt.limit = 511;
2695 #else
2696 env->idt.limit = 255;
2697 #endif
2698 env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1),
2699 PROT_READ|PROT_WRITE,
2700 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2701 idt_table = g2h(env->idt.base);
2702 set_idt(0, 0);
2703 set_idt(1, 0);
2704 set_idt(2, 0);
2705 set_idt(3, 3);
2706 set_idt(4, 3);
2707 set_idt(5, 0);
2708 set_idt(6, 0);
2709 set_idt(7, 0);
2710 set_idt(8, 0);
2711 set_idt(9, 0);
2712 set_idt(10, 0);
2713 set_idt(11, 0);
2714 set_idt(12, 0);
2715 set_idt(13, 0);
2716 set_idt(14, 0);
2717 set_idt(15, 0);
2718 set_idt(16, 0);
2719 set_idt(17, 0);
2720 set_idt(18, 0);
2721 set_idt(19, 0);
2722 set_idt(0x80, 3);
2723
2724 /* linux segment setup */
2725 {
2726 uint64_t *gdt_table;
2727 env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES,
2728 PROT_READ|PROT_WRITE,
2729 MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);
2730 env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1;
2731 gdt_table = g2h(env->gdt.base);
2732 #ifdef TARGET_ABI32
2733 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2734 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2735 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2736 #else
2737 /* 64 bit code segment */
2738 write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff,
2739 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2740 DESC_L_MASK |
2741 (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT));
2742 #endif
2743 write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff,
2744 DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK |
2745 (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT));
2746 }
2747 cpu_x86_load_seg(env, R_CS, __USER_CS);
2748 cpu_x86_load_seg(env, R_SS, __USER_DS);
2749 #ifdef TARGET_ABI32
2750 cpu_x86_load_seg(env, R_DS, __USER_DS);
2751 cpu_x86_load_seg(env, R_ES, __USER_DS);
2752 cpu_x86_load_seg(env, R_FS, __USER_DS);
2753 cpu_x86_load_seg(env, R_GS, __USER_DS);
2754 /* This hack makes Wine work... */
2755 env->segs[R_FS].selector = 0;
2756 #else
2757 cpu_x86_load_seg(env, R_DS, 0);
2758 cpu_x86_load_seg(env, R_ES, 0);
2759 cpu_x86_load_seg(env, R_FS, 0);
2760 cpu_x86_load_seg(env, R_GS, 0);
2761 #endif
2762 #elif defined(TARGET_ARM)
2763 {
2764 int i;
2765 cpsr_write(env, regs->uregs[16], 0xffffffff);
2766 for(i = 0; i < 16; i++) {
2767 env->regs[i] = regs->uregs[i];
2768 }
2769 }
2770 #elif defined(TARGET_SPARC)
2771 {
2772 int i;
2773 env->pc = regs->pc;
2774 env->npc = regs->npc;
2775 env->y = regs->y;
2776 for(i = 0; i < 8; i++)
2777 env->gregs[i] = regs->u_regs[i];
2778 for(i = 0; i < 8; i++)
2779 env->regwptr[i] = regs->u_regs[i + 8];
2780 }
2781 #elif defined(TARGET_PPC)
2782 {
2783 int i;
2784
2785 #if defined(TARGET_PPC64)
2786 #if defined(TARGET_ABI32)
2787 env->msr &= ~((target_ulong)1 << MSR_SF);
2788 #else
2789 env->msr |= (target_ulong)1 << MSR_SF;
2790 #endif
2791 #endif
2792 env->nip = regs->nip;
2793 for(i = 0; i < 32; i++) {
2794 env->gpr[i] = regs->gpr[i];
2795 }
2796 }
2797 #elif defined(TARGET_M68K)
2798 {
2799 env->pc = regs->pc;
2800 env->dregs[0] = regs->d0;
2801 env->dregs[1] = regs->d1;
2802 env->dregs[2] = regs->d2;
2803 env->dregs[3] = regs->d3;
2804 env->dregs[4] = regs->d4;
2805 env->dregs[5] = regs->d5;
2806 env->dregs[6] = regs->d6;
2807 env->dregs[7] = regs->d7;
2808 env->aregs[0] = regs->a0;
2809 env->aregs[1] = regs->a1;
2810 env->aregs[2] = regs->a2;
2811 env->aregs[3] = regs->a3;
2812 env->aregs[4] = regs->a4;
2813 env->aregs[5] = regs->a5;
2814 env->aregs[6] = regs->a6;
2815 env->aregs[7] = regs->usp;
2816 env->sr = regs->sr;
2817 ts->sim_syscalls = 1;
2818 }
2819 #elif defined(TARGET_MICROBLAZE)
2820 {
2821 env->regs[0] = regs->r0;
2822 env->regs[1] = regs->r1;
2823 env->regs[2] = regs->r2;
2824 env->regs[3] = regs->r3;
2825 env->regs[4] = regs->r4;
2826 env->regs[5] = regs->r5;
2827 env->regs[6] = regs->r6;
2828 env->regs[7] = regs->r7;
2829 env->regs[8] = regs->r8;
2830 env->regs[9] = regs->r9;
2831 env->regs[10] = regs->r10;
2832 env->regs[11] = regs->r11;
2833 env->regs[12] = regs->r12;
2834 env->regs[13] = regs->r13;
2835 env->regs[14] = regs->r14;
2836 env->regs[15] = regs->r15;
2837 env->regs[16] = regs->r16;
2838 env->regs[17] = regs->r17;
2839 env->regs[18] = regs->r18;
2840 env->regs[19] = regs->r19;
2841 env->regs[20] = regs->r20;
2842 env->regs[21] = regs->r21;
2843 env->regs[22] = regs->r22;
2844 env->regs[23] = regs->r23;
2845 env->regs[24] = regs->r24;
2846 env->regs[25] = regs->r25;
2847 env->regs[26] = regs->r26;
2848 env->regs[27] = regs->r27;
2849 env->regs[28] = regs->r28;
2850 env->regs[29] = regs->r29;
2851 env->regs[30] = regs->r30;
2852 env->regs[31] = regs->r31;
2853 env->sregs[SR_PC] = regs->pc;
2854 }
2855 #elif defined(TARGET_MIPS)
2856 {
2857 int i;
2858
2859 for(i = 0; i < 32; i++) {
2860 env->active_tc.gpr[i] = regs->regs[i];
2861 }
2862 env->active_tc.PC = regs->cp0_epc;
2863 }
2864 #elif defined(TARGET_SH4)
2865 {
2866 int i;
2867
2868 for(i = 0; i < 16; i++) {
2869 env->gregs[i] = regs->regs[i];
2870 }
2871 env->pc = regs->pc;
2872 }
2873 #elif defined(TARGET_ALPHA)
2874 {
2875 int i;
2876
2877 for(i = 0; i < 28; i++) {
2878 env->ir[i] = ((abi_ulong *)regs)[i];
2879 }
2880 env->ipr[IPR_USP] = regs->usp;
2881 env->ir[30] = regs->usp;
2882 env->pc = regs->pc;
2883 env->unique = regs->unique;
2884 }
2885 #elif defined(TARGET_CRIS)
2886 {
2887 env->regs[0] = regs->r0;
2888 env->regs[1] = regs->r1;
2889 env->regs[2] = regs->r2;
2890 env->regs[3] = regs->r3;
2891 env->regs[4] = regs->r4;
2892 env->regs[5] = regs->r5;
2893 env->regs[6] = regs->r6;
2894 env->regs[7] = regs->r7;
2895 env->regs[8] = regs->r8;
2896 env->regs[9] = regs->r9;
2897 env->regs[10] = regs->r10;
2898 env->regs[11] = regs->r11;
2899 env->regs[12] = regs->r12;
2900 env->regs[13] = regs->r13;
2901 env->regs[14] = info->start_stack;
2902 env->regs[15] = regs->acr;
2903 env->pc = regs->erp;
2904 }
2905 #else
2906 #error unsupported target CPU
2907 #endif
2908
2909 #if defined(TARGET_ARM) || defined(TARGET_M68K)
2910 ts->stack_base = info->start_stack;
2911 ts->heap_base = info->brk;
2912 /* This will be filled in on the first SYS_HEAPINFO call. */
2913 ts->heap_limit = 0;
2914 #endif
2915
2916 if (gdbstub_port) {
2917 gdbserver_start (gdbstub_port);
2918 gdb_handlesig(env, 0);
2919 }
2920 cpu_loop(env);
2921 /* never exits */
2922 return 0;
2923 }
QEmu