2 * QEMU IDE disk and CD/DVD-ROM Emulator
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
29 #include "qemu-error.h"
30 #include "qemu-timer.h"
33 #include "hw/block-common.h"
36 #include <hw/ide/internal.h>
38 /* These values were based on a Seagate ST3500418AS but have been modified
39 to make more sense in QEMU */
40 static const int smart_attributes
[][12] = {
41 /* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
42 /* raw read error rate*/
43 { 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06},
45 { 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
46 /* start stop count */
47 { 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14},
48 /* remapped sectors */
49 { 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24},
51 { 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
52 /* power cycle count */
53 { 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
54 /* airflow-temperature-celsius */
55 { 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32},
57 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
60 static int ide_handle_rw_error(IDEState
*s
, int error
, int op
);
61 static void ide_dummy_transfer_stop(IDEState
*s
);
63 static void padstr(char *str
, const char *src
, int len
)
66 for(i
= 0; i
< len
; i
++) {
75 static void put_le16(uint16_t *p
, unsigned int v
)
80 static void ide_identify(IDEState
*s
)
84 IDEDevice
*dev
= s
->unit
? s
->bus
->slave
: s
->bus
->master
;
86 if (s
->identify_set
) {
87 memcpy(s
->io_buffer
, s
->identify_data
, sizeof(s
->identify_data
));
91 memset(s
->io_buffer
, 0, 512);
92 p
= (uint16_t *)s
->io_buffer
;
93 put_le16(p
+ 0, 0x0040);
94 put_le16(p
+ 1, s
->cylinders
);
95 put_le16(p
+ 3, s
->heads
);
96 put_le16(p
+ 4, 512 * s
->sectors
); /* XXX: retired, remove ? */
97 put_le16(p
+ 5, 512); /* XXX: retired, remove ? */
98 put_le16(p
+ 6, s
->sectors
);
99 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
100 put_le16(p
+ 20, 3); /* XXX: retired, remove ? */
101 put_le16(p
+ 21, 512); /* cache size in sectors */
102 put_le16(p
+ 22, 4); /* ecc bytes */
103 padstr((char *)(p
+ 23), s
->version
, 8); /* firmware version */
104 padstr((char *)(p
+ 27), s
->drive_model_str
, 40); /* model */
105 #if MAX_MULT_SECTORS > 1
106 put_le16(p
+ 47, 0x8000 | MAX_MULT_SECTORS
);
108 put_le16(p
+ 48, 1); /* dword I/O */
109 put_le16(p
+ 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
110 put_le16(p
+ 51, 0x200); /* PIO transfer cycle */
111 put_le16(p
+ 52, 0x200); /* DMA transfer cycle */
112 put_le16(p
+ 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
113 put_le16(p
+ 54, s
->cylinders
);
114 put_le16(p
+ 55, s
->heads
);
115 put_le16(p
+ 56, s
->sectors
);
116 oldsize
= s
->cylinders
* s
->heads
* s
->sectors
;
117 put_le16(p
+ 57, oldsize
);
118 put_le16(p
+ 58, oldsize
>> 16);
120 put_le16(p
+ 59, 0x100 | s
->mult_sectors
);
121 put_le16(p
+ 60, s
->nb_sectors
);
122 put_le16(p
+ 61, s
->nb_sectors
>> 16);
123 put_le16(p
+ 62, 0x07); /* single word dma0-2 supported */
124 put_le16(p
+ 63, 0x07); /* mdma0-2 supported */
125 put_le16(p
+ 64, 0x03); /* pio3-4 supported */
126 put_le16(p
+ 65, 120);
127 put_le16(p
+ 66, 120);
128 put_le16(p
+ 67, 120);
129 put_le16(p
+ 68, 120);
130 if (dev
&& dev
->conf
.discard_granularity
) {
131 put_le16(p
+ 69, (1 << 14)); /* determinate TRIM behavior */
135 put_le16(p
+ 75, s
->ncq_queues
- 1);
137 put_le16(p
+ 76, (1 << 8));
140 put_le16(p
+ 80, 0xf0); /* ata3 -> ata6 supported */
141 put_le16(p
+ 81, 0x16); /* conforms to ata5 */
142 /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
143 put_le16(p
+ 82, (1 << 14) | (1 << 5) | 1);
144 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
145 put_le16(p
+ 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
146 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
148 put_le16(p
+ 84, (1 << 14) | (1 << 8) | 0);
150 put_le16(p
+ 84, (1 << 14) | 0);
152 /* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
153 if (bdrv_enable_write_cache(s
->bs
))
154 put_le16(p
+ 85, (1 << 14) | (1 << 5) | 1);
156 put_le16(p
+ 85, (1 << 14) | 1);
157 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
158 put_le16(p
+ 86, (1 << 13) | (1 <<12) | (1 << 10));
159 /* 14=set to 1, 8=has WWN, 1=SMART self test, 0=SMART error logging */
161 put_le16(p
+ 87, (1 << 14) | (1 << 8) | 0);
163 put_le16(p
+ 87, (1 << 14) | 0);
165 put_le16(p
+ 88, 0x3f | (1 << 13)); /* udma5 set and supported */
166 put_le16(p
+ 93, 1 | (1 << 14) | 0x2000);
167 put_le16(p
+ 100, s
->nb_sectors
);
168 put_le16(p
+ 101, s
->nb_sectors
>> 16);
169 put_le16(p
+ 102, s
->nb_sectors
>> 32);
170 put_le16(p
+ 103, s
->nb_sectors
>> 48);
172 if (dev
&& dev
->conf
.physical_block_size
)
173 put_le16(p
+ 106, 0x6000 | get_physical_block_exp(&dev
->conf
));
175 /* LE 16-bit words 111-108 contain 64-bit World Wide Name */
176 put_le16(p
+ 108, s
->wwn
>> 48);
177 put_le16(p
+ 109, s
->wwn
>> 32);
178 put_le16(p
+ 110, s
->wwn
>> 16);
179 put_le16(p
+ 111, s
->wwn
);
181 if (dev
&& dev
->conf
.discard_granularity
) {
182 put_le16(p
+ 169, 1); /* TRIM support */
185 memcpy(s
->identify_data
, p
, sizeof(s
->identify_data
));
189 static void ide_atapi_identify(IDEState
*s
)
193 if (s
->identify_set
) {
194 memcpy(s
->io_buffer
, s
->identify_data
, sizeof(s
->identify_data
));
198 memset(s
->io_buffer
, 0, 512);
199 p
= (uint16_t *)s
->io_buffer
;
200 /* Removable CDROM, 50us response, 12 byte packets */
201 put_le16(p
+ 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
202 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
203 put_le16(p
+ 20, 3); /* buffer type */
204 put_le16(p
+ 21, 512); /* cache size in sectors */
205 put_le16(p
+ 22, 4); /* ecc bytes */
206 padstr((char *)(p
+ 23), s
->version
, 8); /* firmware version */
207 padstr((char *)(p
+ 27), s
->drive_model_str
, 40); /* model */
208 put_le16(p
+ 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
210 put_le16(p
+ 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
211 put_le16(p
+ 53, 7); /* words 64-70, 54-58, 88 valid */
212 put_le16(p
+ 62, 7); /* single word dma0-2 supported */
213 put_le16(p
+ 63, 7); /* mdma0-2 supported */
215 put_le16(p
+ 49, 1 << 9); /* LBA supported, no DMA */
216 put_le16(p
+ 53, 3); /* words 64-70, 54-58 valid */
217 put_le16(p
+ 63, 0x103); /* DMA modes XXX: may be incorrect */
219 put_le16(p
+ 64, 3); /* pio3-4 supported */
220 put_le16(p
+ 65, 0xb4); /* minimum DMA multiword tx cycle time */
221 put_le16(p
+ 66, 0xb4); /* recommended DMA multiword tx cycle time */
222 put_le16(p
+ 67, 0x12c); /* minimum PIO cycle time without flow control */
223 put_le16(p
+ 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
225 put_le16(p
+ 71, 30); /* in ns */
226 put_le16(p
+ 72, 30); /* in ns */
229 put_le16(p
+ 75, s
->ncq_queues
- 1);
231 put_le16(p
+ 76, (1 << 8));
234 put_le16(p
+ 80, 0x1e); /* support up to ATA/ATAPI-4 */
236 put_le16(p
+ 88, 0x3f | (1 << 13)); /* udma5 set and supported */
238 memcpy(s
->identify_data
, p
, sizeof(s
->identify_data
));
242 static void ide_cfata_identify(IDEState
*s
)
247 p
= (uint16_t *) s
->identify_data
;
251 memset(p
, 0, sizeof(s
->identify_data
));
253 cur_sec
= s
->cylinders
* s
->heads
* s
->sectors
;
255 put_le16(p
+ 0, 0x848a); /* CF Storage Card signature */
256 put_le16(p
+ 1, s
->cylinders
); /* Default cylinders */
257 put_le16(p
+ 3, s
->heads
); /* Default heads */
258 put_le16(p
+ 6, s
->sectors
); /* Default sectors per track */
259 put_le16(p
+ 7, s
->nb_sectors
>> 16); /* Sectors per card */
260 put_le16(p
+ 8, s
->nb_sectors
); /* Sectors per card */
261 padstr((char *)(p
+ 10), s
->drive_serial_str
, 20); /* serial number */
262 put_le16(p
+ 22, 0x0004); /* ECC bytes */
263 padstr((char *) (p
+ 23), s
->version
, 8); /* Firmware Revision */
264 padstr((char *) (p
+ 27), s
->drive_model_str
, 40);/* Model number */
265 #if MAX_MULT_SECTORS > 1
266 put_le16(p
+ 47, 0x8000 | MAX_MULT_SECTORS
);
268 put_le16(p
+ 47, 0x0000);
270 put_le16(p
+ 49, 0x0f00); /* Capabilities */
271 put_le16(p
+ 51, 0x0002); /* PIO cycle timing mode */
272 put_le16(p
+ 52, 0x0001); /* DMA cycle timing mode */
273 put_le16(p
+ 53, 0x0003); /* Translation params valid */
274 put_le16(p
+ 54, s
->cylinders
); /* Current cylinders */
275 put_le16(p
+ 55, s
->heads
); /* Current heads */
276 put_le16(p
+ 56, s
->sectors
); /* Current sectors */
277 put_le16(p
+ 57, cur_sec
); /* Current capacity */
278 put_le16(p
+ 58, cur_sec
>> 16); /* Current capacity */
279 if (s
->mult_sectors
) /* Multiple sector setting */
280 put_le16(p
+ 59, 0x100 | s
->mult_sectors
);
281 put_le16(p
+ 60, s
->nb_sectors
); /* Total LBA sectors */
282 put_le16(p
+ 61, s
->nb_sectors
>> 16); /* Total LBA sectors */
283 put_le16(p
+ 63, 0x0203); /* Multiword DMA capability */
284 put_le16(p
+ 64, 0x0001); /* Flow Control PIO support */
285 put_le16(p
+ 65, 0x0096); /* Min. Multiword DMA cycle */
286 put_le16(p
+ 66, 0x0096); /* Rec. Multiword DMA cycle */
287 put_le16(p
+ 68, 0x00b4); /* Min. PIO cycle time */
288 put_le16(p
+ 82, 0x400c); /* Command Set supported */
289 put_le16(p
+ 83, 0x7068); /* Command Set supported */
290 put_le16(p
+ 84, 0x4000); /* Features supported */
291 put_le16(p
+ 85, 0x000c); /* Command Set enabled */
292 put_le16(p
+ 86, 0x7044); /* Command Set enabled */
293 put_le16(p
+ 87, 0x4000); /* Features enabled */
294 put_le16(p
+ 91, 0x4060); /* Current APM level */
295 put_le16(p
+ 129, 0x0002); /* Current features option */
296 put_le16(p
+ 130, 0x0005); /* Reassigned sectors */
297 put_le16(p
+ 131, 0x0001); /* Initial power mode */
298 put_le16(p
+ 132, 0x0000); /* User signature */
299 put_le16(p
+ 160, 0x8100); /* Power requirement */
300 put_le16(p
+ 161, 0x8001); /* CF command set */
305 memcpy(s
->io_buffer
, p
, sizeof(s
->identify_data
));
308 static void ide_set_signature(IDEState
*s
)
310 s
->select
&= 0xf0; /* clear head */
314 if (s
->drive_kind
== IDE_CD
) {
326 typedef struct TrimAIOCB
{
327 BlockDriverAIOCB common
;
332 static void trim_aio_cancel(BlockDriverAIOCB
*acb
)
334 TrimAIOCB
*iocb
= container_of(acb
, TrimAIOCB
, common
);
336 qemu_bh_delete(iocb
->bh
);
338 qemu_aio_release(iocb
);
341 static AIOPool trim_aio_pool
= {
342 .aiocb_size
= sizeof(TrimAIOCB
),
343 .cancel
= trim_aio_cancel
,
346 static void ide_trim_bh_cb(void *opaque
)
348 TrimAIOCB
*iocb
= opaque
;
350 iocb
->common
.cb(iocb
->common
.opaque
, iocb
->ret
);
352 qemu_bh_delete(iocb
->bh
);
355 qemu_aio_release(iocb
);
358 BlockDriverAIOCB
*ide_issue_trim(BlockDriverState
*bs
,
359 int64_t sector_num
, QEMUIOVector
*qiov
, int nb_sectors
,
360 BlockDriverCompletionFunc
*cb
, void *opaque
)
365 iocb
= qemu_aio_get(&trim_aio_pool
, bs
, cb
, opaque
);
366 iocb
->bh
= qemu_bh_new(ide_trim_bh_cb
, iocb
);
369 for (j
= 0; j
< qiov
->niov
; j
++) {
370 uint64_t *buffer
= qiov
->iov
[j
].iov_base
;
372 for (i
= 0; i
< qiov
->iov
[j
].iov_len
/ 8; i
++) {
373 /* 6-byte LBA + 2-byte range per entry */
374 uint64_t entry
= le64_to_cpu(buffer
[i
]);
375 uint64_t sector
= entry
& 0x0000ffffffffffffULL
;
376 uint16_t count
= entry
>> 48;
382 ret
= bdrv_discard(bs
, sector
, count
);
389 qemu_bh_schedule(iocb
->bh
);
391 return &iocb
->common
;
394 static inline void ide_abort_command(IDEState
*s
)
396 s
->status
= READY_STAT
| ERR_STAT
;
400 /* prepare data transfer and tell what to do after */
401 void ide_transfer_start(IDEState
*s
, uint8_t *buf
, int size
,
402 EndTransferFunc
*end_transfer_func
)
404 s
->end_transfer_func
= end_transfer_func
;
406 s
->data_end
= buf
+ size
;
407 if (!(s
->status
& ERR_STAT
)) {
408 s
->status
|= DRQ_STAT
;
410 s
->bus
->dma
->ops
->start_transfer(s
->bus
->dma
);
413 void ide_transfer_stop(IDEState
*s
)
415 s
->end_transfer_func
= ide_transfer_stop
;
416 s
->data_ptr
= s
->io_buffer
;
417 s
->data_end
= s
->io_buffer
;
418 s
->status
&= ~DRQ_STAT
;
421 int64_t ide_get_sector(IDEState
*s
)
424 if (s
->select
& 0x40) {
427 sector_num
= ((s
->select
& 0x0f) << 24) | (s
->hcyl
<< 16) |
428 (s
->lcyl
<< 8) | s
->sector
;
430 sector_num
= ((int64_t)s
->hob_hcyl
<< 40) |
431 ((int64_t) s
->hob_lcyl
<< 32) |
432 ((int64_t) s
->hob_sector
<< 24) |
433 ((int64_t) s
->hcyl
<< 16) |
434 ((int64_t) s
->lcyl
<< 8) | s
->sector
;
437 sector_num
= ((s
->hcyl
<< 8) | s
->lcyl
) * s
->heads
* s
->sectors
+
438 (s
->select
& 0x0f) * s
->sectors
+ (s
->sector
- 1);
443 void ide_set_sector(IDEState
*s
, int64_t sector_num
)
446 if (s
->select
& 0x40) {
448 s
->select
= (s
->select
& 0xf0) | (sector_num
>> 24);
449 s
->hcyl
= (sector_num
>> 16);
450 s
->lcyl
= (sector_num
>> 8);
451 s
->sector
= (sector_num
);
453 s
->sector
= sector_num
;
454 s
->lcyl
= sector_num
>> 8;
455 s
->hcyl
= sector_num
>> 16;
456 s
->hob_sector
= sector_num
>> 24;
457 s
->hob_lcyl
= sector_num
>> 32;
458 s
->hob_hcyl
= sector_num
>> 40;
461 cyl
= sector_num
/ (s
->heads
* s
->sectors
);
462 r
= sector_num
% (s
->heads
* s
->sectors
);
465 s
->select
= (s
->select
& 0xf0) | ((r
/ s
->sectors
) & 0x0f);
466 s
->sector
= (r
% s
->sectors
) + 1;
470 static void ide_rw_error(IDEState
*s
) {
471 ide_abort_command(s
);
475 static void ide_sector_read_cb(void *opaque
, int ret
)
477 IDEState
*s
= opaque
;
481 s
->status
&= ~BUSY_STAT
;
483 bdrv_acct_done(s
->bs
, &s
->acct
);
485 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_PIO_RETRY
|
486 BM_STATUS_RETRY_READ
)) {
492 if (n
> s
->req_nb_sectors
) {
493 n
= s
->req_nb_sectors
;
496 /* Allow the guest to read the io_buffer */
497 ide_transfer_start(s
, s
->io_buffer
, n
* BDRV_SECTOR_SIZE
, ide_sector_read
);
501 ide_set_sector(s
, ide_get_sector(s
) + n
);
505 void ide_sector_read(IDEState
*s
)
510 s
->status
= READY_STAT
| SEEK_STAT
;
511 s
->error
= 0; /* not needed by IDE spec, but needed by Windows */
512 sector_num
= ide_get_sector(s
);
516 ide_transfer_stop(s
);
520 s
->status
|= BUSY_STAT
;
522 if (n
> s
->req_nb_sectors
) {
523 n
= s
->req_nb_sectors
;
526 #if defined(DEBUG_IDE)
527 printf("sector=%" PRId64
"\n", sector_num
);
530 s
->iov
.iov_base
= s
->io_buffer
;
531 s
->iov
.iov_len
= n
* BDRV_SECTOR_SIZE
;
532 qemu_iovec_init_external(&s
->qiov
, &s
->iov
, 1);
534 bdrv_acct_start(s
->bs
, &s
->acct
, n
* BDRV_SECTOR_SIZE
, BDRV_ACCT_READ
);
535 s
->pio_aiocb
= bdrv_aio_readv(s
->bs
, sector_num
, &s
->qiov
, n
,
536 ide_sector_read_cb
, s
);
539 static void dma_buf_commit(IDEState
*s
)
541 qemu_sglist_destroy(&s
->sg
);
544 void ide_set_inactive(IDEState
*s
)
546 s
->bus
->dma
->aiocb
= NULL
;
547 s
->bus
->dma
->ops
->set_inactive(s
->bus
->dma
);
550 void ide_dma_error(IDEState
*s
)
552 ide_transfer_stop(s
);
554 s
->status
= READY_STAT
| ERR_STAT
;
559 static int ide_handle_rw_error(IDEState
*s
, int error
, int op
)
561 int is_read
= (op
& BM_STATUS_RETRY_READ
);
562 BlockErrorAction action
= bdrv_get_on_error(s
->bs
, is_read
);
564 if (action
== BLOCK_ERR_IGNORE
) {
565 bdrv_emit_qmp_error_event(s
->bs
, BDRV_ACTION_IGNORE
, is_read
);
569 if ((error
== ENOSPC
&& action
== BLOCK_ERR_STOP_ENOSPC
)
570 || action
== BLOCK_ERR_STOP_ANY
) {
571 s
->bus
->dma
->ops
->set_unit(s
->bus
->dma
, s
->unit
);
572 s
->bus
->error_status
= op
;
573 bdrv_emit_qmp_error_event(s
->bs
, BDRV_ACTION_STOP
, is_read
);
574 vm_stop(RUN_STATE_IO_ERROR
);
575 bdrv_iostatus_set_err(s
->bs
, error
);
577 if (op
& BM_STATUS_DMA_RETRY
) {
583 bdrv_emit_qmp_error_event(s
->bs
, BDRV_ACTION_REPORT
, is_read
);
589 void ide_dma_cb(void *opaque
, int ret
)
591 IDEState
*s
= opaque
;
596 int op
= BM_STATUS_DMA_RETRY
;
598 if (s
->dma_cmd
== IDE_DMA_READ
)
599 op
|= BM_STATUS_RETRY_READ
;
600 else if (s
->dma_cmd
== IDE_DMA_TRIM
)
601 op
|= BM_STATUS_RETRY_TRIM
;
603 if (ide_handle_rw_error(s
, -ret
, op
)) {
608 n
= s
->io_buffer_size
>> 9;
609 sector_num
= ide_get_sector(s
);
613 ide_set_sector(s
, sector_num
);
617 /* end of transfer ? */
618 if (s
->nsector
== 0) {
619 s
->status
= READY_STAT
| SEEK_STAT
;
624 /* launch next transfer */
626 s
->io_buffer_index
= 0;
627 s
->io_buffer_size
= n
* 512;
628 if (s
->bus
->dma
->ops
->prepare_buf(s
->bus
->dma
, ide_cmd_is_read(s
)) == 0) {
629 /* The PRDs were too short. Reset the Active bit, but don't raise an
635 printf("ide_dma_cb: sector_num=%" PRId64
" n=%d, cmd_cmd=%d\n",
636 sector_num
, n
, s
->dma_cmd
);
639 switch (s
->dma_cmd
) {
641 s
->bus
->dma
->aiocb
= dma_bdrv_read(s
->bs
, &s
->sg
, sector_num
,
645 s
->bus
->dma
->aiocb
= dma_bdrv_write(s
->bs
, &s
->sg
, sector_num
,
649 s
->bus
->dma
->aiocb
= dma_bdrv_io(s
->bs
, &s
->sg
, sector_num
,
650 ide_issue_trim
, ide_dma_cb
, s
,
651 DMA_DIRECTION_TO_DEVICE
);
657 if (s
->dma_cmd
== IDE_DMA_READ
|| s
->dma_cmd
== IDE_DMA_WRITE
) {
658 bdrv_acct_done(s
->bs
, &s
->acct
);
663 static void ide_sector_start_dma(IDEState
*s
, enum ide_dma_cmd dma_cmd
)
665 s
->status
= READY_STAT
| SEEK_STAT
| DRQ_STAT
| BUSY_STAT
;
666 s
->io_buffer_index
= 0;
667 s
->io_buffer_size
= 0;
668 s
->dma_cmd
= dma_cmd
;
672 bdrv_acct_start(s
->bs
, &s
->acct
, s
->nsector
* BDRV_SECTOR_SIZE
,
676 bdrv_acct_start(s
->bs
, &s
->acct
, s
->nsector
* BDRV_SECTOR_SIZE
,
683 s
->bus
->dma
->ops
->start_dma(s
->bus
->dma
, s
, ide_dma_cb
);
686 static void ide_sector_write_timer_cb(void *opaque
)
688 IDEState
*s
= opaque
;
692 static void ide_sector_write_cb(void *opaque
, int ret
)
694 IDEState
*s
= opaque
;
697 bdrv_acct_done(s
->bs
, &s
->acct
);
700 s
->status
&= ~BUSY_STAT
;
703 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_PIO_RETRY
)) {
709 if (n
> s
->req_nb_sectors
) {
710 n
= s
->req_nb_sectors
;
713 if (s
->nsector
== 0) {
714 /* no more sectors to write */
715 ide_transfer_stop(s
);
718 if (n1
> s
->req_nb_sectors
) {
719 n1
= s
->req_nb_sectors
;
721 ide_transfer_start(s
, s
->io_buffer
, n1
* BDRV_SECTOR_SIZE
,
724 ide_set_sector(s
, ide_get_sector(s
) + n
);
726 if (win2k_install_hack
&& ((++s
->irq_count
% 16) == 0)) {
727 /* It seems there is a bug in the Windows 2000 installer HDD
728 IDE driver which fills the disk with empty logs when the
729 IDE write IRQ comes too early. This hack tries to correct
730 that at the expense of slower write performances. Use this
731 option _only_ to install Windows 2000. You must disable it
733 qemu_mod_timer(s
->sector_write_timer
,
734 qemu_get_clock_ns(vm_clock
) + (get_ticks_per_sec() / 1000));
740 void ide_sector_write(IDEState
*s
)
745 s
->status
= READY_STAT
| SEEK_STAT
| BUSY_STAT
;
746 sector_num
= ide_get_sector(s
);
747 #if defined(DEBUG_IDE)
748 printf("sector=%" PRId64
"\n", sector_num
);
751 if (n
> s
->req_nb_sectors
) {
752 n
= s
->req_nb_sectors
;
755 s
->iov
.iov_base
= s
->io_buffer
;
756 s
->iov
.iov_len
= n
* BDRV_SECTOR_SIZE
;
757 qemu_iovec_init_external(&s
->qiov
, &s
->iov
, 1);
759 bdrv_acct_start(s
->bs
, &s
->acct
, n
* BDRV_SECTOR_SIZE
, BDRV_ACCT_READ
);
760 s
->pio_aiocb
= bdrv_aio_writev(s
->bs
, sector_num
, &s
->qiov
, n
,
761 ide_sector_write_cb
, s
);
764 static void ide_flush_cb(void *opaque
, int ret
)
766 IDEState
*s
= opaque
;
769 /* XXX: What sector number to set here? */
770 if (ide_handle_rw_error(s
, -ret
, BM_STATUS_RETRY_FLUSH
)) {
775 bdrv_acct_done(s
->bs
, &s
->acct
);
776 s
->status
= READY_STAT
| SEEK_STAT
;
780 void ide_flush_cache(IDEState
*s
)
787 bdrv_acct_start(s
->bs
, &s
->acct
, 0, BDRV_ACCT_FLUSH
);
788 bdrv_aio_flush(s
->bs
, ide_flush_cb
, s
);
791 static void ide_cfata_metadata_inquiry(IDEState
*s
)
796 p
= (uint16_t *) s
->io_buffer
;
798 spd
= ((s
->mdata_size
- 1) >> 9) + 1;
800 put_le16(p
+ 0, 0x0001); /* Data format revision */
801 put_le16(p
+ 1, 0x0000); /* Media property: silicon */
802 put_le16(p
+ 2, s
->media_changed
); /* Media status */
803 put_le16(p
+ 3, s
->mdata_size
& 0xffff); /* Capacity in bytes (low) */
804 put_le16(p
+ 4, s
->mdata_size
>> 16); /* Capacity in bytes (high) */
805 put_le16(p
+ 5, spd
& 0xffff); /* Sectors per device (low) */
806 put_le16(p
+ 6, spd
>> 16); /* Sectors per device (high) */
809 static void ide_cfata_metadata_read(IDEState
*s
)
813 if (((s
->hcyl
<< 16) | s
->lcyl
) << 9 > s
->mdata_size
+ 2) {
814 s
->status
= ERR_STAT
;
819 p
= (uint16_t *) s
->io_buffer
;
822 put_le16(p
+ 0, s
->media_changed
); /* Media status */
823 memcpy(p
+ 1, s
->mdata_storage
+ (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
824 MIN(MIN(s
->mdata_size
- (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
825 s
->nsector
<< 9), 0x200 - 2));
828 static void ide_cfata_metadata_write(IDEState
*s
)
830 if (((s
->hcyl
<< 16) | s
->lcyl
) << 9 > s
->mdata_size
+ 2) {
831 s
->status
= ERR_STAT
;
836 s
->media_changed
= 0;
838 memcpy(s
->mdata_storage
+ (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
840 MIN(MIN(s
->mdata_size
- (((s
->hcyl
<< 16) | s
->lcyl
) << 9),
841 s
->nsector
<< 9), 0x200 - 2));
844 /* called when the inserted state of the media has changed */
845 static void ide_cd_change_cb(void *opaque
, bool load
)
847 IDEState
*s
= opaque
;
850 s
->tray_open
= !load
;
851 bdrv_get_geometry(s
->bs
, &nb_sectors
);
852 s
->nb_sectors
= nb_sectors
;
855 * First indicate to the guest that a CD has been removed. That's
856 * done on the next command the guest sends us.
858 * Then we set UNIT_ATTENTION, by which the guest will
859 * detect a new CD in the drive. See ide_atapi_cmd() for details.
861 s
->cdrom_changed
= 1;
862 s
->events
.new_media
= true;
863 s
->events
.eject_request
= false;
867 static void ide_cd_eject_request_cb(void *opaque
, bool force
)
869 IDEState
*s
= opaque
;
871 s
->events
.eject_request
= true;
873 s
->tray_locked
= false;
878 static void ide_cmd_lba48_transform(IDEState
*s
, int lba48
)
882 /* handle the 'magic' 0 nsector count conversion here. to avoid
883 * fiddling with the rest of the read logic, we just store the
884 * full sector count in ->nsector and ignore ->hob_nsector from now
890 if (!s
->nsector
&& !s
->hob_nsector
)
894 int hi
= s
->hob_nsector
;
896 s
->nsector
= (hi
<< 8) | lo
;
901 static void ide_clear_hob(IDEBus
*bus
)
903 /* any write clears HOB high bit of device control register */
904 bus
->ifs
[0].select
&= ~(1 << 7);
905 bus
->ifs
[1].select
&= ~(1 << 7);
908 void ide_ioport_write(void *opaque
, uint32_t addr
, uint32_t val
)
910 IDEBus
*bus
= opaque
;
913 printf("IDE: write addr=0x%x val=0x%02x\n", addr
, val
);
918 /* ignore writes to command block while busy with previous command */
919 if (addr
!= 7 && (idebus_active_if(bus
)->status
& (BUSY_STAT
|DRQ_STAT
)))
927 /* NOTE: data is written to the two drives */
928 bus
->ifs
[0].hob_feature
= bus
->ifs
[0].feature
;
929 bus
->ifs
[1].hob_feature
= bus
->ifs
[1].feature
;
930 bus
->ifs
[0].feature
= val
;
931 bus
->ifs
[1].feature
= val
;
935 bus
->ifs
[0].hob_nsector
= bus
->ifs
[0].nsector
;
936 bus
->ifs
[1].hob_nsector
= bus
->ifs
[1].nsector
;
937 bus
->ifs
[0].nsector
= val
;
938 bus
->ifs
[1].nsector
= val
;
942 bus
->ifs
[0].hob_sector
= bus
->ifs
[0].sector
;
943 bus
->ifs
[1].hob_sector
= bus
->ifs
[1].sector
;
944 bus
->ifs
[0].sector
= val
;
945 bus
->ifs
[1].sector
= val
;
949 bus
->ifs
[0].hob_lcyl
= bus
->ifs
[0].lcyl
;
950 bus
->ifs
[1].hob_lcyl
= bus
->ifs
[1].lcyl
;
951 bus
->ifs
[0].lcyl
= val
;
952 bus
->ifs
[1].lcyl
= val
;
956 bus
->ifs
[0].hob_hcyl
= bus
->ifs
[0].hcyl
;
957 bus
->ifs
[1].hob_hcyl
= bus
->ifs
[1].hcyl
;
958 bus
->ifs
[0].hcyl
= val
;
959 bus
->ifs
[1].hcyl
= val
;
962 /* FIXME: HOB readback uses bit 7 */
963 bus
->ifs
[0].select
= (val
& ~0x10) | 0xa0;
964 bus
->ifs
[1].select
= (val
| 0x10) | 0xa0;
966 bus
->unit
= (val
>> 4) & 1;
971 ide_exec_cmd(bus
, val
);
976 #define HD_OK (1u << IDE_HD)
977 #define CD_OK (1u << IDE_CD)
978 #define CFA_OK (1u << IDE_CFATA)
979 #define HD_CFA_OK (HD_OK | CFA_OK)
980 #define ALL_OK (HD_OK | CD_OK | CFA_OK)
982 /* See ACS-2 T13/2015-D Table B.2 Command codes */
983 static const uint8_t ide_cmd_table
[0x100] = {
984 /* NOP not implemented, mandatory for CD */
985 [CFA_REQ_EXT_ERROR_CODE
] = CFA_OK
,
987 [WIN_DEVICE_RESET
] = CD_OK
,
988 [WIN_RECAL
] = HD_CFA_OK
,
990 [WIN_READ_ONCE
] = ALL_OK
,
991 [WIN_READ_EXT
] = HD_CFA_OK
,
992 [WIN_READDMA_EXT
] = HD_CFA_OK
,
993 [WIN_READ_NATIVE_MAX_EXT
] = HD_CFA_OK
,
994 [WIN_MULTREAD_EXT
] = HD_CFA_OK
,
995 [WIN_WRITE
] = HD_CFA_OK
,
996 [WIN_WRITE_ONCE
] = HD_CFA_OK
,
997 [WIN_WRITE_EXT
] = HD_CFA_OK
,
998 [WIN_WRITEDMA_EXT
] = HD_CFA_OK
,
999 [CFA_WRITE_SECT_WO_ERASE
] = CFA_OK
,
1000 [WIN_MULTWRITE_EXT
] = HD_CFA_OK
,
1001 [WIN_WRITE_VERIFY
] = HD_CFA_OK
,
1002 [WIN_VERIFY
] = HD_CFA_OK
,
1003 [WIN_VERIFY_ONCE
] = HD_CFA_OK
,
1004 [WIN_VERIFY_EXT
] = HD_CFA_OK
,
1005 [WIN_SEEK
] = HD_CFA_OK
,
1006 [CFA_TRANSLATE_SECTOR
] = CFA_OK
,
1007 [WIN_DIAGNOSE
] = ALL_OK
,
1008 [WIN_SPECIFY
] = HD_CFA_OK
,
1009 [WIN_STANDBYNOW2
] = ALL_OK
,
1010 [WIN_IDLEIMMEDIATE2
] = ALL_OK
,
1011 [WIN_STANDBY2
] = ALL_OK
,
1012 [WIN_SETIDLE2
] = ALL_OK
,
1013 [WIN_CHECKPOWERMODE2
] = ALL_OK
,
1014 [WIN_SLEEPNOW2
] = ALL_OK
,
1015 [WIN_PACKETCMD
] = CD_OK
,
1016 [WIN_PIDENTIFY
] = CD_OK
,
1017 [WIN_SMART
] = HD_CFA_OK
,
1018 [CFA_ACCESS_METADATA_STORAGE
] = CFA_OK
,
1019 [CFA_ERASE_SECTORS
] = CFA_OK
,
1020 [WIN_MULTREAD
] = HD_CFA_OK
,
1021 [WIN_MULTWRITE
] = HD_CFA_OK
,
1022 [WIN_SETMULT
] = HD_CFA_OK
,
1023 [WIN_READDMA
] = HD_CFA_OK
,
1024 [WIN_READDMA_ONCE
] = HD_CFA_OK
,
1025 [WIN_WRITEDMA
] = HD_CFA_OK
,
1026 [WIN_WRITEDMA_ONCE
] = HD_CFA_OK
,
1027 [CFA_WRITE_MULTI_WO_ERASE
] = CFA_OK
,
1028 [WIN_STANDBYNOW1
] = ALL_OK
,
1029 [WIN_IDLEIMMEDIATE
] = ALL_OK
,
1030 [WIN_STANDBY
] = ALL_OK
,
1031 [WIN_SETIDLE1
] = ALL_OK
,
1032 [WIN_CHECKPOWERMODE1
] = ALL_OK
,
1033 [WIN_SLEEPNOW1
] = ALL_OK
,
1034 [WIN_FLUSH_CACHE
] = ALL_OK
,
1035 [WIN_FLUSH_CACHE_EXT
] = HD_CFA_OK
,
1036 [WIN_IDENTIFY
] = ALL_OK
,
1037 [WIN_SETFEATURES
] = ALL_OK
,
1038 [IBM_SENSE_CONDITION
] = CFA_OK
,
1039 [CFA_WEAR_LEVEL
] = HD_CFA_OK
,
1040 [WIN_READ_NATIVE_MAX
] = ALL_OK
,
1043 static bool ide_cmd_permitted(IDEState
*s
, uint32_t cmd
)
1045 return cmd
< ARRAY_SIZE(ide_cmd_table
)
1046 && (ide_cmd_table
[cmd
] & (1u << s
->drive_kind
));
1049 void ide_exec_cmd(IDEBus
*bus
, uint32_t val
)
1051 uint16_t *identify_data
;
1056 #if defined(DEBUG_IDE)
1057 printf("ide: CMD=%02x\n", val
);
1059 s
= idebus_active_if(bus
);
1060 /* ignore commands to non existent slave */
1061 if (s
!= bus
->ifs
&& !s
->bs
)
1064 /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */
1065 if ((s
->status
& (BUSY_STAT
|DRQ_STAT
)) && val
!= WIN_DEVICE_RESET
)
1068 if (!ide_cmd_permitted(s
, val
)) {
1074 switch (s
->feature
) {
1079 ide_sector_start_dma(s
, IDE_DMA_TRIM
);
1086 if (s
->bs
&& s
->drive_kind
!= IDE_CD
) {
1087 if (s
->drive_kind
!= IDE_CFATA
)
1090 ide_cfata_identify(s
);
1091 s
->status
= READY_STAT
| SEEK_STAT
;
1092 ide_transfer_start(s
, s
->io_buffer
, 512, ide_transfer_stop
);
1094 if (s
->drive_kind
== IDE_CD
) {
1095 ide_set_signature(s
);
1097 ide_abort_command(s
);
1099 ide_set_irq(s
->bus
);
1104 s
->status
= READY_STAT
| SEEK_STAT
;
1105 ide_set_irq(s
->bus
);
1108 if (s
->drive_kind
== IDE_CFATA
&& s
->nsector
== 0) {
1109 /* Disable Read and Write Multiple */
1110 s
->mult_sectors
= 0;
1111 s
->status
= READY_STAT
| SEEK_STAT
;
1112 } else if ((s
->nsector
& 0xff) != 0 &&
1113 ((s
->nsector
& 0xff) > MAX_MULT_SECTORS
||
1114 (s
->nsector
& (s
->nsector
- 1)) != 0)) {
1115 ide_abort_command(s
);
1117 s
->mult_sectors
= s
->nsector
& 0xff;
1118 s
->status
= READY_STAT
| SEEK_STAT
;
1120 ide_set_irq(s
->bus
);
1122 case WIN_VERIFY_EXT
:
1125 case WIN_VERIFY_ONCE
:
1126 /* do sector number check ? */
1127 ide_cmd_lba48_transform(s
, lba48
);
1128 s
->status
= READY_STAT
| SEEK_STAT
;
1129 ide_set_irq(s
->bus
);
1135 if (s
->drive_kind
== IDE_CD
) {
1136 ide_set_signature(s
); /* odd, but ATA4 8.27.5.2 requires it */
1142 ide_cmd_lba48_transform(s
, lba48
);
1143 s
->req_nb_sectors
= 1;
1149 case WIN_WRITE_ONCE
:
1150 case CFA_WRITE_SECT_WO_ERASE
:
1151 case WIN_WRITE_VERIFY
:
1155 ide_cmd_lba48_transform(s
, lba48
);
1157 s
->status
= SEEK_STAT
| READY_STAT
;
1158 s
->req_nb_sectors
= 1;
1159 ide_transfer_start(s
, s
->io_buffer
, 512, ide_sector_write
);
1160 s
->media_changed
= 1;
1162 case WIN_MULTREAD_EXT
:
1168 if (!s
->mult_sectors
) {
1171 ide_cmd_lba48_transform(s
, lba48
);
1172 s
->req_nb_sectors
= s
->mult_sectors
;
1175 case WIN_MULTWRITE_EXT
:
1178 case CFA_WRITE_MULTI_WO_ERASE
:
1182 if (!s
->mult_sectors
) {
1185 ide_cmd_lba48_transform(s
, lba48
);
1187 s
->status
= SEEK_STAT
| READY_STAT
;
1188 s
->req_nb_sectors
= s
->mult_sectors
;
1190 if (n
> s
->req_nb_sectors
)
1191 n
= s
->req_nb_sectors
;
1192 ide_transfer_start(s
, s
->io_buffer
, 512 * n
, ide_sector_write
);
1193 s
->media_changed
= 1;
1195 case WIN_READDMA_EXT
:
1198 case WIN_READDMA_ONCE
:
1202 ide_cmd_lba48_transform(s
, lba48
);
1203 ide_sector_start_dma(s
, IDE_DMA_READ
);
1205 case WIN_WRITEDMA_EXT
:
1208 case WIN_WRITEDMA_ONCE
:
1212 ide_cmd_lba48_transform(s
, lba48
);
1213 ide_sector_start_dma(s
, IDE_DMA_WRITE
);
1214 s
->media_changed
= 1;
1216 case WIN_READ_NATIVE_MAX_EXT
:
1218 case WIN_READ_NATIVE_MAX
:
1219 ide_cmd_lba48_transform(s
, lba48
);
1220 ide_set_sector(s
, s
->nb_sectors
- 1);
1221 s
->status
= READY_STAT
| SEEK_STAT
;
1222 ide_set_irq(s
->bus
);
1224 case WIN_CHECKPOWERMODE1
:
1225 case WIN_CHECKPOWERMODE2
:
1227 s
->nsector
= 0xff; /* device active or idle */
1228 s
->status
= READY_STAT
| SEEK_STAT
;
1229 ide_set_irq(s
->bus
);
1231 case WIN_SETFEATURES
:
1234 /* XXX: valid for CDROM ? */
1235 switch(s
->feature
) {
1236 case 0x02: /* write cache enable */
1237 bdrv_set_enable_write_cache(s
->bs
, true);
1238 identify_data
= (uint16_t *)s
->identify_data
;
1239 put_le16(identify_data
+ 85, (1 << 14) | (1 << 5) | 1);
1240 s
->status
= READY_STAT
| SEEK_STAT
;
1241 ide_set_irq(s
->bus
);
1243 case 0x82: /* write cache disable */
1244 bdrv_set_enable_write_cache(s
->bs
, false);
1245 identify_data
= (uint16_t *)s
->identify_data
;
1246 put_le16(identify_data
+ 85, (1 << 14) | 1);
1249 case 0xcc: /* reverting to power-on defaults enable */
1250 case 0x66: /* reverting to power-on defaults disable */
1251 case 0xaa: /* read look-ahead enable */
1252 case 0x55: /* read look-ahead disable */
1253 case 0x05: /* set advanced power management mode */
1254 case 0x85: /* disable advanced power management mode */
1255 case 0x69: /* NOP */
1256 case 0x67: /* NOP */
1257 case 0x96: /* NOP */
1258 case 0x9a: /* NOP */
1259 case 0x42: /* enable Automatic Acoustic Mode */
1260 case 0xc2: /* disable Automatic Acoustic Mode */
1261 s
->status
= READY_STAT
| SEEK_STAT
;
1262 ide_set_irq(s
->bus
);
1264 case 0x03: { /* set transfer mode */
1265 uint8_t val
= s
->nsector
& 0x07;
1266 identify_data
= (uint16_t *)s
->identify_data
;
1268 switch (s
->nsector
>> 3) {
1269 case 0x00: /* pio default */
1270 case 0x01: /* pio mode */
1271 put_le16(identify_data
+ 62,0x07);
1272 put_le16(identify_data
+ 63,0x07);
1273 put_le16(identify_data
+ 88,0x3f);
1275 case 0x02: /* sigle word dma mode*/
1276 put_le16(identify_data
+ 62,0x07 | (1 << (val
+ 8)));
1277 put_le16(identify_data
+ 63,0x07);
1278 put_le16(identify_data
+ 88,0x3f);
1280 case 0x04: /* mdma mode */
1281 put_le16(identify_data
+ 62,0x07);
1282 put_le16(identify_data
+ 63,0x07 | (1 << (val
+ 8)));
1283 put_le16(identify_data
+ 88,0x3f);
1285 case 0x08: /* udma mode */
1286 put_le16(identify_data
+ 62,0x07);
1287 put_le16(identify_data
+ 63,0x07);
1288 put_le16(identify_data
+ 88,0x3f | (1 << (val
+ 8)));
1293 s
->status
= READY_STAT
| SEEK_STAT
;
1294 ide_set_irq(s
->bus
);
1301 case WIN_FLUSH_CACHE
:
1302 case WIN_FLUSH_CACHE_EXT
:
1307 case WIN_STANDBYNOW1
:
1308 case WIN_STANDBYNOW2
:
1309 case WIN_IDLEIMMEDIATE
:
1310 case WIN_IDLEIMMEDIATE2
:
1315 s
->status
= READY_STAT
;
1316 ide_set_irq(s
->bus
);
1319 /* XXX: Check that seek is within bounds */
1320 s
->status
= READY_STAT
| SEEK_STAT
;
1321 ide_set_irq(s
->bus
);
1323 /* ATAPI commands */
1325 ide_atapi_identify(s
);
1326 s
->status
= READY_STAT
| SEEK_STAT
;
1327 ide_transfer_start(s
, s
->io_buffer
, 512, ide_transfer_stop
);
1328 ide_set_irq(s
->bus
);
1331 ide_set_signature(s
);
1332 if (s
->drive_kind
== IDE_CD
)
1333 s
->status
= 0; /* ATAPI spec (v6) section 9.10 defines packet
1334 * devices to return a clear status register
1335 * with READY_STAT *not* set. */
1337 s
->status
= READY_STAT
| SEEK_STAT
;
1338 s
->error
= 0x01; /* Device 0 passed, Device 1 passed or not
1341 ide_set_irq(s
->bus
);
1343 case WIN_DEVICE_RESET
:
1344 ide_set_signature(s
);
1345 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1349 /* overlapping commands not supported */
1350 if (s
->feature
& 0x02)
1352 s
->status
= READY_STAT
| SEEK_STAT
;
1353 s
->atapi_dma
= s
->feature
& 1;
1355 ide_transfer_start(s
, s
->io_buffer
, ATAPI_PACKET_SIZE
,
1358 /* CF-ATA commands */
1359 case CFA_REQ_EXT_ERROR_CODE
:
1360 s
->error
= 0x09; /* miscellaneous error */
1361 s
->status
= READY_STAT
| SEEK_STAT
;
1362 ide_set_irq(s
->bus
);
1364 case CFA_ERASE_SECTORS
:
1365 case CFA_WEAR_LEVEL
:
1367 /* This one has the same ID as CFA_WEAR_LEVEL and is required for
1368 Windows 8 to work with AHCI */
1369 case WIN_SECURITY_FREEZE_LOCK
:
1371 if (val
== CFA_WEAR_LEVEL
)
1373 if (val
== CFA_ERASE_SECTORS
)
1374 s
->media_changed
= 1;
1376 s
->status
= READY_STAT
| SEEK_STAT
;
1377 ide_set_irq(s
->bus
);
1379 case CFA_TRANSLATE_SECTOR
:
1381 s
->status
= READY_STAT
| SEEK_STAT
;
1382 memset(s
->io_buffer
, 0, 0x200);
1383 s
->io_buffer
[0x00] = s
->hcyl
; /* Cyl MSB */
1384 s
->io_buffer
[0x01] = s
->lcyl
; /* Cyl LSB */
1385 s
->io_buffer
[0x02] = s
->select
; /* Head */
1386 s
->io_buffer
[0x03] = s
->sector
; /* Sector */
1387 s
->io_buffer
[0x04] = ide_get_sector(s
) >> 16; /* LBA MSB */
1388 s
->io_buffer
[0x05] = ide_get_sector(s
) >> 8; /* LBA */
1389 s
->io_buffer
[0x06] = ide_get_sector(s
) >> 0; /* LBA LSB */
1390 s
->io_buffer
[0x13] = 0x00; /* Erase flag */
1391 s
->io_buffer
[0x18] = 0x00; /* Hot count */
1392 s
->io_buffer
[0x19] = 0x00; /* Hot count */
1393 s
->io_buffer
[0x1a] = 0x01; /* Hot count */
1394 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1395 ide_set_irq(s
->bus
);
1397 case CFA_ACCESS_METADATA_STORAGE
:
1398 switch (s
->feature
) {
1399 case 0x02: /* Inquiry Metadata Storage */
1400 ide_cfata_metadata_inquiry(s
);
1402 case 0x03: /* Read Metadata Storage */
1403 ide_cfata_metadata_read(s
);
1405 case 0x04: /* Write Metadata Storage */
1406 ide_cfata_metadata_write(s
);
1411 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1412 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1413 ide_set_irq(s
->bus
);
1415 case IBM_SENSE_CONDITION
:
1416 switch (s
->feature
) {
1417 case 0x01: /* sense temperature in device */
1418 s
->nsector
= 0x50; /* +20 C */
1423 s
->status
= READY_STAT
| SEEK_STAT
;
1424 ide_set_irq(s
->bus
);
1428 if (s
->hcyl
!= 0xc2 || s
->lcyl
!= 0x4f)
1430 if (!s
->smart_enabled
&& s
->feature
!= SMART_ENABLE
)
1432 switch (s
->feature
) {
1434 s
->smart_enabled
= 0;
1435 s
->status
= READY_STAT
| SEEK_STAT
;
1436 ide_set_irq(s
->bus
);
1439 s
->smart_enabled
= 1;
1440 s
->status
= READY_STAT
| SEEK_STAT
;
1441 ide_set_irq(s
->bus
);
1443 case SMART_ATTR_AUTOSAVE
:
1444 switch (s
->sector
) {
1446 s
->smart_autosave
= 0;
1449 s
->smart_autosave
= 1;
1454 s
->status
= READY_STAT
| SEEK_STAT
;
1455 ide_set_irq(s
->bus
);
1458 if (!s
->smart_errors
) {
1465 s
->status
= READY_STAT
| SEEK_STAT
;
1466 ide_set_irq(s
->bus
);
1468 case SMART_READ_THRESH
:
1469 memset(s
->io_buffer
, 0, 0x200);
1470 s
->io_buffer
[0] = 0x01; /* smart struct version */
1471 for (n
=0; n
<30; n
++) {
1472 if (smart_attributes
[n
][0] == 0)
1474 s
->io_buffer
[2+0+(n
*12)] = smart_attributes
[n
][0];
1475 s
->io_buffer
[2+1+(n
*12)] = smart_attributes
[n
][11];
1477 for (n
=0; n
<511; n
++) /* checksum */
1478 s
->io_buffer
[511] += s
->io_buffer
[n
];
1479 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1480 s
->status
= READY_STAT
| SEEK_STAT
;
1481 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1482 ide_set_irq(s
->bus
);
1484 case SMART_READ_DATA
:
1485 memset(s
->io_buffer
, 0, 0x200);
1486 s
->io_buffer
[0] = 0x01; /* smart struct version */
1487 for (n
=0; n
<30; n
++) {
1488 if (smart_attributes
[n
][0] == 0) {
1492 for(i
= 0; i
< 11; i
++) {
1493 s
->io_buffer
[2+i
+(n
*12)] = smart_attributes
[n
][i
];
1496 s
->io_buffer
[362] = 0x02 | (s
->smart_autosave
?0x80:0x00);
1497 if (s
->smart_selftest_count
== 0) {
1498 s
->io_buffer
[363] = 0;
1501 s
->smart_selftest_data
[3 +
1502 (s
->smart_selftest_count
- 1) *
1505 s
->io_buffer
[364] = 0x20;
1506 s
->io_buffer
[365] = 0x01;
1507 /* offline data collection capacity: execute + self-test*/
1508 s
->io_buffer
[367] = (1<<4 | 1<<3 | 1);
1509 s
->io_buffer
[368] = 0x03; /* smart capability (1) */
1510 s
->io_buffer
[369] = 0x00; /* smart capability (2) */
1511 s
->io_buffer
[370] = 0x01; /* error logging supported */
1512 s
->io_buffer
[372] = 0x02; /* minutes for poll short test */
1513 s
->io_buffer
[373] = 0x36; /* minutes for poll ext test */
1514 s
->io_buffer
[374] = 0x01; /* minutes for poll conveyance */
1516 for (n
=0; n
<511; n
++)
1517 s
->io_buffer
[511] += s
->io_buffer
[n
];
1518 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1519 s
->status
= READY_STAT
| SEEK_STAT
;
1520 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1521 ide_set_irq(s
->bus
);
1523 case SMART_READ_LOG
:
1524 switch (s
->sector
) {
1525 case 0x01: /* summary smart error log */
1526 memset(s
->io_buffer
, 0, 0x200);
1527 s
->io_buffer
[0] = 0x01;
1528 s
->io_buffer
[1] = 0x00; /* no error entries */
1529 s
->io_buffer
[452] = s
->smart_errors
& 0xff;
1530 s
->io_buffer
[453] = (s
->smart_errors
& 0xff00) >> 8;
1532 for (n
=0; n
<511; n
++)
1533 s
->io_buffer
[511] += s
->io_buffer
[n
];
1534 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1536 case 0x06: /* smart self test log */
1537 memset(s
->io_buffer
, 0, 0x200);
1538 s
->io_buffer
[0] = 0x01;
1539 if (s
->smart_selftest_count
== 0) {
1540 s
->io_buffer
[508] = 0;
1542 s
->io_buffer
[508] = s
->smart_selftest_count
;
1543 for (n
=2; n
<506; n
++)
1544 s
->io_buffer
[n
] = s
->smart_selftest_data
[n
];
1546 for (n
=0; n
<511; n
++)
1547 s
->io_buffer
[511] += s
->io_buffer
[n
];
1548 s
->io_buffer
[511] = 0x100 - s
->io_buffer
[511];
1553 s
->status
= READY_STAT
| SEEK_STAT
;
1554 ide_transfer_start(s
, s
->io_buffer
, 0x200, ide_transfer_stop
);
1555 ide_set_irq(s
->bus
);
1557 case SMART_EXECUTE_OFFLINE
:
1558 switch (s
->sector
) {
1559 case 0: /* off-line routine */
1560 case 1: /* short self test */
1561 case 2: /* extended self test */
1562 s
->smart_selftest_count
++;
1563 if(s
->smart_selftest_count
> 21)
1564 s
->smart_selftest_count
= 0;
1565 n
= 2 + (s
->smart_selftest_count
- 1) * 24;
1566 s
->smart_selftest_data
[n
] = s
->sector
;
1567 s
->smart_selftest_data
[n
+1] = 0x00; /* OK and finished */
1568 s
->smart_selftest_data
[n
+2] = 0x34; /* hour count lsb */
1569 s
->smart_selftest_data
[n
+3] = 0x12; /* hour count msb */
1570 s
->status
= READY_STAT
| SEEK_STAT
;
1571 ide_set_irq(s
->bus
);
1582 /* should not be reachable */
1584 ide_abort_command(s
);
1585 ide_set_irq(s
->bus
);
1590 uint32_t ide_ioport_read(void *opaque
, uint32_t addr1
)
1592 IDEBus
*bus
= opaque
;
1593 IDEState
*s
= idebus_active_if(bus
);
1598 /* FIXME: HOB readback uses bit 7, but it's always set right now */
1599 //hob = s->select & (1 << 7);
1606 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1607 (s
!= bus
->ifs
&& !s
->bs
))
1612 ret
= s
->hob_feature
;
1615 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1618 ret
= s
->nsector
& 0xff;
1620 ret
= s
->hob_nsector
;
1623 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1628 ret
= s
->hob_sector
;
1631 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1639 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1647 if (!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
)
1654 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1655 (s
!= bus
->ifs
&& !s
->bs
))
1659 qemu_irq_lower(bus
->irq
);
1663 printf("ide: read addr=0x%x val=%02x\n", addr1
, ret
);
1668 uint32_t ide_status_read(void *opaque
, uint32_t addr
)
1670 IDEBus
*bus
= opaque
;
1671 IDEState
*s
= idebus_active_if(bus
);
1674 if ((!bus
->ifs
[0].bs
&& !bus
->ifs
[1].bs
) ||
1675 (s
!= bus
->ifs
&& !s
->bs
))
1680 printf("ide: read status addr=0x%x val=%02x\n", addr
, ret
);
1685 void ide_cmd_write(void *opaque
, uint32_t addr
, uint32_t val
)
1687 IDEBus
*bus
= opaque
;
1692 printf("ide: write control addr=0x%x val=%02x\n", addr
, val
);
1694 /* common for both drives */
1695 if (!(bus
->cmd
& IDE_CMD_RESET
) &&
1696 (val
& IDE_CMD_RESET
)) {
1697 /* reset low to high */
1698 for(i
= 0;i
< 2; i
++) {
1700 s
->status
= BUSY_STAT
| SEEK_STAT
;
1703 } else if ((bus
->cmd
& IDE_CMD_RESET
) &&
1704 !(val
& IDE_CMD_RESET
)) {
1706 for(i
= 0;i
< 2; i
++) {
1708 if (s
->drive_kind
== IDE_CD
)
1709 s
->status
= 0x00; /* NOTE: READY is _not_ set */
1711 s
->status
= READY_STAT
| SEEK_STAT
;
1712 ide_set_signature(s
);
1720 * Returns true if the running PIO transfer is a PIO out (i.e. data is
1721 * transferred from the device to the guest), false if it's a PIO in
1723 static bool ide_is_pio_out(IDEState
*s
)
1725 if (s
->end_transfer_func
== ide_sector_write
||
1726 s
->end_transfer_func
== ide_atapi_cmd
) {
1728 } else if (s
->end_transfer_func
== ide_sector_read
||
1729 s
->end_transfer_func
== ide_transfer_stop
||
1730 s
->end_transfer_func
== ide_atapi_cmd_reply_end
||
1731 s
->end_transfer_func
== ide_dummy_transfer_stop
) {
1738 void ide_data_writew(void *opaque
, uint32_t addr
, uint32_t val
)
1740 IDEBus
*bus
= opaque
;
1741 IDEState
*s
= idebus_active_if(bus
);
1744 /* PIO data access allowed only when DRQ bit is set. The result of a write
1745 * during PIO out is indeterminate, just ignore it. */
1746 if (!(s
->status
& DRQ_STAT
) || ide_is_pio_out(s
)) {
1751 *(uint16_t *)p
= le16_to_cpu(val
);
1754 if (p
>= s
->data_end
)
1755 s
->end_transfer_func(s
);
1758 uint32_t ide_data_readw(void *opaque
, uint32_t addr
)
1760 IDEBus
*bus
= opaque
;
1761 IDEState
*s
= idebus_active_if(bus
);
1765 /* PIO data access allowed only when DRQ bit is set. The result of a read
1766 * during PIO in is indeterminate, return 0 and don't move forward. */
1767 if (!(s
->status
& DRQ_STAT
) || !ide_is_pio_out(s
)) {
1772 ret
= cpu_to_le16(*(uint16_t *)p
);
1775 if (p
>= s
->data_end
)
1776 s
->end_transfer_func(s
);
1780 void ide_data_writel(void *opaque
, uint32_t addr
, uint32_t val
)
1782 IDEBus
*bus
= opaque
;
1783 IDEState
*s
= idebus_active_if(bus
);
1786 /* PIO data access allowed only when DRQ bit is set. The result of a write
1787 * during PIO out is indeterminate, just ignore it. */
1788 if (!(s
->status
& DRQ_STAT
) || ide_is_pio_out(s
)) {
1793 *(uint32_t *)p
= le32_to_cpu(val
);
1796 if (p
>= s
->data_end
)
1797 s
->end_transfer_func(s
);
1800 uint32_t ide_data_readl(void *opaque
, uint32_t addr
)
1802 IDEBus
*bus
= opaque
;
1803 IDEState
*s
= idebus_active_if(bus
);
1807 /* PIO data access allowed only when DRQ bit is set. The result of a read
1808 * during PIO in is indeterminate, return 0 and don't move forward. */
1809 if (!(s
->status
& DRQ_STAT
) || !ide_is_pio_out(s
)) {
1814 ret
= cpu_to_le32(*(uint32_t *)p
);
1817 if (p
>= s
->data_end
)
1818 s
->end_transfer_func(s
);
1822 static void ide_dummy_transfer_stop(IDEState
*s
)
1824 s
->data_ptr
= s
->io_buffer
;
1825 s
->data_end
= s
->io_buffer
;
1826 s
->io_buffer
[0] = 0xff;
1827 s
->io_buffer
[1] = 0xff;
1828 s
->io_buffer
[2] = 0xff;
1829 s
->io_buffer
[3] = 0xff;
1832 static void ide_reset(IDEState
*s
)
1835 printf("ide: reset\n");
1839 bdrv_aio_cancel(s
->pio_aiocb
);
1840 s
->pio_aiocb
= NULL
;
1843 if (s
->drive_kind
== IDE_CFATA
)
1844 s
->mult_sectors
= 0;
1846 s
->mult_sectors
= MAX_MULT_SECTORS
;
1863 s
->status
= READY_STAT
| SEEK_STAT
;
1867 /* ATAPI specific */
1870 s
->cdrom_changed
= 0;
1871 s
->packet_transfer_size
= 0;
1872 s
->elementary_transfer_size
= 0;
1873 s
->io_buffer_index
= 0;
1874 s
->cd_sector_size
= 0;
1877 s
->io_buffer_size
= 0;
1878 s
->req_nb_sectors
= 0;
1880 ide_set_signature(s
);
1881 /* init the transfer handler so that 0xffff is returned on data
1883 s
->end_transfer_func
= ide_dummy_transfer_stop
;
1884 ide_dummy_transfer_stop(s
);
1885 s
->media_changed
= 0;
1888 void ide_bus_reset(IDEBus
*bus
)
1892 ide_reset(&bus
->ifs
[0]);
1893 ide_reset(&bus
->ifs
[1]);
1896 /* pending async DMA */
1897 if (bus
->dma
->aiocb
) {
1899 printf("aio_cancel\n");
1901 bdrv_aio_cancel(bus
->dma
->aiocb
);
1902 bus
->dma
->aiocb
= NULL
;
1905 /* reset dma provider too */
1906 bus
->dma
->ops
->reset(bus
->dma
);
1909 static bool ide_cd_is_tray_open(void *opaque
)
1911 return ((IDEState
*)opaque
)->tray_open
;
1914 static bool ide_cd_is_medium_locked(void *opaque
)
1916 return ((IDEState
*)opaque
)->tray_locked
;
1919 static const BlockDevOps ide_cd_block_ops
= {
1920 .change_media_cb
= ide_cd_change_cb
,
1921 .eject_request_cb
= ide_cd_eject_request_cb
,
1922 .is_tray_open
= ide_cd_is_tray_open
,
1923 .is_medium_locked
= ide_cd_is_medium_locked
,
1926 int ide_init_drive(IDEState
*s
, BlockDriverState
*bs
, IDEDriveKind kind
,
1927 const char *version
, const char *serial
, const char *model
,
1929 uint32_t cylinders
, uint32_t heads
, uint32_t secs
,
1932 uint64_t nb_sectors
;
1935 s
->drive_kind
= kind
;
1937 bdrv_get_geometry(bs
, &nb_sectors
);
1938 s
->cylinders
= cylinders
;
1941 s
->chs_trans
= chs_trans
;
1942 s
->nb_sectors
= nb_sectors
;
1944 /* The SMART values should be preserved across power cycles
1946 s
->smart_enabled
= 1;
1947 s
->smart_autosave
= 1;
1948 s
->smart_errors
= 0;
1949 s
->smart_selftest_count
= 0;
1950 if (kind
== IDE_CD
) {
1951 bdrv_set_dev_ops(bs
, &ide_cd_block_ops
, s
);
1952 bdrv_set_buffer_alignment(bs
, 2048);
1954 if (!bdrv_is_inserted(s
->bs
)) {
1955 error_report("Device needs media, but drive is empty");
1958 if (bdrv_is_read_only(bs
)) {
1959 error_report("Can't use a read-only drive");
1964 pstrcpy(s
->drive_serial_str
, sizeof(s
->drive_serial_str
), serial
);
1966 snprintf(s
->drive_serial_str
, sizeof(s
->drive_serial_str
),
1967 "QM%05d", s
->drive_serial
);
1970 pstrcpy(s
->drive_model_str
, sizeof(s
->drive_model_str
), model
);
1974 strcpy(s
->drive_model_str
, "QEMU DVD-ROM");
1977 strcpy(s
->drive_model_str
, "QEMU MICRODRIVE");
1980 strcpy(s
->drive_model_str
, "QEMU HARDDISK");
1986 pstrcpy(s
->version
, sizeof(s
->version
), version
);
1988 pstrcpy(s
->version
, sizeof(s
->version
), qemu_get_version());
1992 bdrv_iostatus_enable(bs
);
1996 static void ide_init1(IDEBus
*bus
, int unit
)
1998 static int drive_serial
= 1;
1999 IDEState
*s
= &bus
->ifs
[unit
];
2003 s
->drive_serial
= drive_serial
++;
2004 /* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
2005 s
->io_buffer_total_len
= IDE_DMA_BUF_SECTORS
*512 + 4;
2006 s
->io_buffer
= qemu_memalign(2048, s
->io_buffer_total_len
);
2007 memset(s
->io_buffer
, 0, s
->io_buffer_total_len
);
2009 s
->smart_selftest_data
= qemu_blockalign(s
->bs
, 512);
2010 memset(s
->smart_selftest_data
, 0, 512);
2012 s
->sector_write_timer
= qemu_new_timer_ns(vm_clock
,
2013 ide_sector_write_timer_cb
, s
);
2016 static void ide_nop_start(IDEDMA
*dma
, IDEState
*s
,
2017 BlockDriverCompletionFunc
*cb
)
2021 static int ide_nop(IDEDMA
*dma
)
2026 static int ide_nop_int(IDEDMA
*dma
, int x
)
2031 static void ide_nop_restart(void *opaque
, int x
, RunState y
)
2035 static const IDEDMAOps ide_dma_nop_ops
= {
2036 .start_dma
= ide_nop_start
,
2037 .start_transfer
= ide_nop
,
2038 .prepare_buf
= ide_nop_int
,
2039 .rw_buf
= ide_nop_int
,
2040 .set_unit
= ide_nop_int
,
2041 .add_status
= ide_nop_int
,
2042 .set_inactive
= ide_nop
,
2043 .restart_cb
= ide_nop_restart
,
2047 static IDEDMA ide_dma_nop
= {
2048 .ops
= &ide_dma_nop_ops
,
2052 void ide_init2(IDEBus
*bus
, qemu_irq irq
)
2056 for(i
= 0; i
< 2; i
++) {
2058 ide_reset(&bus
->ifs
[i
]);
2061 bus
->dma
= &ide_dma_nop
;
2064 /* TODO convert users to qdev and remove */
2065 void ide_init2_with_non_qdev_drives(IDEBus
*bus
, DriveInfo
*hd0
,
2066 DriveInfo
*hd1
, qemu_irq irq
)
2070 uint32_t cyls
, heads
, secs
;
2072 for(i
= 0; i
< 2; i
++) {
2073 dinfo
= i
== 0 ? hd0
: hd1
;
2077 heads
= dinfo
->heads
;
2079 trans
= dinfo
->trans
;
2080 if (!cyls
&& !heads
&& !secs
) {
2081 hd_geometry_guess(dinfo
->bdrv
, &cyls
, &heads
, &secs
, &trans
);
2082 } else if (trans
== BIOS_ATA_TRANSLATION_AUTO
) {
2083 trans
= hd_bios_chs_auto_trans(cyls
, heads
, secs
);
2085 if (cyls
< 1 || cyls
> 65535) {
2086 error_report("cyls must be between 1 and 65535");
2089 if (heads
< 1 || heads
> 16) {
2090 error_report("heads must be between 1 and 16");
2093 if (secs
< 1 || secs
> 255) {
2094 error_report("secs must be between 1 and 255");
2097 if (ide_init_drive(&bus
->ifs
[i
], dinfo
->bdrv
,
2098 dinfo
->media_cd
? IDE_CD
: IDE_HD
,
2099 NULL
, dinfo
->serial
, NULL
, 0,
2100 cyls
, heads
, secs
, trans
) < 0) {
2101 error_report("Can't set up IDE drive %s", dinfo
->id
);
2104 bdrv_attach_dev_nofail(dinfo
->bdrv
, &bus
->ifs
[i
]);
2106 ide_reset(&bus
->ifs
[i
]);
2110 bus
->dma
= &ide_dma_nop
;
2113 static const MemoryRegionPortio ide_portio_list
[] = {
2114 { 0, 8, 1, .read
= ide_ioport_read
, .write
= ide_ioport_write
},
2115 { 0, 2, 2, .read
= ide_data_readw
, .write
= ide_data_writew
},
2116 { 0, 4, 4, .read
= ide_data_readl
, .write
= ide_data_writel
},
2117 PORTIO_END_OF_LIST(),
2120 static const MemoryRegionPortio ide_portio2_list
[] = {
2121 { 0, 1, 1, .read
= ide_status_read
, .write
= ide_cmd_write
},
2122 PORTIO_END_OF_LIST(),
2125 void ide_init_ioport(IDEBus
*bus
, ISADevice
*dev
, int iobase
, int iobase2
)
2127 /* ??? Assume only ISA and PCI configurations, and that the PCI-ISA
2128 bridge has been setup properly to always register with ISA. */
2129 isa_register_portio_list(dev
, iobase
, ide_portio_list
, bus
, "ide");
2132 isa_register_portio_list(dev
, iobase2
, ide_portio2_list
, bus
, "ide");
2136 static bool is_identify_set(void *opaque
, int version_id
)
2138 IDEState
*s
= opaque
;
2140 return s
->identify_set
!= 0;
2143 static EndTransferFunc
* transfer_end_table
[] = {
2147 ide_atapi_cmd_reply_end
,
2149 ide_dummy_transfer_stop
,
2152 static int transfer_end_table_idx(EndTransferFunc
*fn
)
2156 for (i
= 0; i
< ARRAY_SIZE(transfer_end_table
); i
++)
2157 if (transfer_end_table
[i
] == fn
)
2163 static int ide_drive_post_load(void *opaque
, int version_id
)
2165 IDEState
*s
= opaque
;
2167 if (version_id
< 3) {
2168 if (s
->sense_key
== UNIT_ATTENTION
&&
2169 s
->asc
== ASC_MEDIUM_MAY_HAVE_CHANGED
) {
2170 s
->cdrom_changed
= 1;
2173 if (s
->identify_set
) {
2174 bdrv_set_enable_write_cache(s
->bs
, !!(s
->identify_data
[85] & (1 << 5)));
2179 static int ide_drive_pio_post_load(void *opaque
, int version_id
)
2181 IDEState
*s
= opaque
;
2183 if (s
->end_transfer_fn_idx
>= ARRAY_SIZE(transfer_end_table
)) {
2186 s
->end_transfer_func
= transfer_end_table
[s
->end_transfer_fn_idx
];
2187 s
->data_ptr
= s
->io_buffer
+ s
->cur_io_buffer_offset
;
2188 s
->data_end
= s
->data_ptr
+ s
->cur_io_buffer_len
;
2193 static void ide_drive_pio_pre_save(void *opaque
)
2195 IDEState
*s
= opaque
;
2198 s
->cur_io_buffer_offset
= s
->data_ptr
- s
->io_buffer
;
2199 s
->cur_io_buffer_len
= s
->data_end
- s
->data_ptr
;
2201 idx
= transfer_end_table_idx(s
->end_transfer_func
);
2203 fprintf(stderr
, "%s: invalid end_transfer_func for DRQ_STAT\n",
2205 s
->end_transfer_fn_idx
= 2;
2207 s
->end_transfer_fn_idx
= idx
;
2211 static bool ide_drive_pio_state_needed(void *opaque
)
2213 IDEState
*s
= opaque
;
2215 return ((s
->status
& DRQ_STAT
) != 0)
2216 || (s
->bus
->error_status
& BM_STATUS_PIO_RETRY
);
2219 static bool ide_tray_state_needed(void *opaque
)
2221 IDEState
*s
= opaque
;
2223 return s
->tray_open
|| s
->tray_locked
;
2226 static bool ide_atapi_gesn_needed(void *opaque
)
2228 IDEState
*s
= opaque
;
2230 return s
->events
.new_media
|| s
->events
.eject_request
;
2233 static bool ide_error_needed(void *opaque
)
2235 IDEBus
*bus
= opaque
;
2237 return (bus
->error_status
!= 0);
2240 /* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
2241 static const VMStateDescription vmstate_ide_atapi_gesn_state
= {
2242 .name
="ide_drive/atapi/gesn_state",
2244 .minimum_version_id
= 1,
2245 .minimum_version_id_old
= 1,
2246 .fields
= (VMStateField
[]) {
2247 VMSTATE_BOOL(events
.new_media
, IDEState
),
2248 VMSTATE_BOOL(events
.eject_request
, IDEState
),
2249 VMSTATE_END_OF_LIST()
2253 static const VMStateDescription vmstate_ide_tray_state
= {
2254 .name
= "ide_drive/tray_state",
2256 .minimum_version_id
= 1,
2257 .minimum_version_id_old
= 1,
2258 .fields
= (VMStateField
[]) {
2259 VMSTATE_BOOL(tray_open
, IDEState
),
2260 VMSTATE_BOOL(tray_locked
, IDEState
),
2261 VMSTATE_END_OF_LIST()
2265 static const VMStateDescription vmstate_ide_drive_pio_state
= {
2266 .name
= "ide_drive/pio_state",
2268 .minimum_version_id
= 1,
2269 .minimum_version_id_old
= 1,
2270 .pre_save
= ide_drive_pio_pre_save
,
2271 .post_load
= ide_drive_pio_post_load
,
2272 .fields
= (VMStateField
[]) {
2273 VMSTATE_INT32(req_nb_sectors
, IDEState
),
2274 VMSTATE_VARRAY_INT32(io_buffer
, IDEState
, io_buffer_total_len
, 1,
2275 vmstate_info_uint8
, uint8_t),
2276 VMSTATE_INT32(cur_io_buffer_offset
, IDEState
),
2277 VMSTATE_INT32(cur_io_buffer_len
, IDEState
),
2278 VMSTATE_UINT8(end_transfer_fn_idx
, IDEState
),
2279 VMSTATE_INT32(elementary_transfer_size
, IDEState
),
2280 VMSTATE_INT32(packet_transfer_size
, IDEState
),
2281 VMSTATE_END_OF_LIST()
2285 const VMStateDescription vmstate_ide_drive
= {
2286 .name
= "ide_drive",
2288 .minimum_version_id
= 0,
2289 .minimum_version_id_old
= 0,
2290 .post_load
= ide_drive_post_load
,
2291 .fields
= (VMStateField
[]) {
2292 VMSTATE_INT32(mult_sectors
, IDEState
),
2293 VMSTATE_INT32(identify_set
, IDEState
),
2294 VMSTATE_BUFFER_TEST(identify_data
, IDEState
, is_identify_set
),
2295 VMSTATE_UINT8(feature
, IDEState
),
2296 VMSTATE_UINT8(error
, IDEState
),
2297 VMSTATE_UINT32(nsector
, IDEState
),
2298 VMSTATE_UINT8(sector
, IDEState
),
2299 VMSTATE_UINT8(lcyl
, IDEState
),
2300 VMSTATE_UINT8(hcyl
, IDEState
),
2301 VMSTATE_UINT8(hob_feature
, IDEState
),
2302 VMSTATE_UINT8(hob_sector
, IDEState
),
2303 VMSTATE_UINT8(hob_nsector
, IDEState
),
2304 VMSTATE_UINT8(hob_lcyl
, IDEState
),
2305 VMSTATE_UINT8(hob_hcyl
, IDEState
),
2306 VMSTATE_UINT8(select
, IDEState
),
2307 VMSTATE_UINT8(status
, IDEState
),
2308 VMSTATE_UINT8(lba48
, IDEState
),
2309 VMSTATE_UINT8(sense_key
, IDEState
),
2310 VMSTATE_UINT8(asc
, IDEState
),
2311 VMSTATE_UINT8_V(cdrom_changed
, IDEState
, 3),
2312 VMSTATE_END_OF_LIST()
2314 .subsections
= (VMStateSubsection
[]) {
2316 .vmsd
= &vmstate_ide_drive_pio_state
,
2317 .needed
= ide_drive_pio_state_needed
,
2319 .vmsd
= &vmstate_ide_tray_state
,
2320 .needed
= ide_tray_state_needed
,
2322 .vmsd
= &vmstate_ide_atapi_gesn_state
,
2323 .needed
= ide_atapi_gesn_needed
,
2330 static const VMStateDescription vmstate_ide_error_status
= {
2331 .name
="ide_bus/error",
2333 .minimum_version_id
= 1,
2334 .minimum_version_id_old
= 1,
2335 .fields
= (VMStateField
[]) {
2336 VMSTATE_INT32(error_status
, IDEBus
),
2337 VMSTATE_END_OF_LIST()
2341 const VMStateDescription vmstate_ide_bus
= {
2344 .minimum_version_id
= 1,
2345 .minimum_version_id_old
= 1,
2346 .fields
= (VMStateField
[]) {
2347 VMSTATE_UINT8(cmd
, IDEBus
),
2348 VMSTATE_UINT8(unit
, IDEBus
),
2349 VMSTATE_END_OF_LIST()
2351 .subsections
= (VMStateSubsection
[]) {
2353 .vmsd
= &vmstate_ide_error_status
,
2354 .needed
= ide_error_needed
,
2361 void ide_drive_get(DriveInfo
**hd
, int max_bus
)
2365 if (drive_get_max_bus(IF_IDE
) >= max_bus
) {
2366 fprintf(stderr
, "qemu: too many IDE bus: %d\n", max_bus
);
2370 for(i
= 0; i
< max_bus
* MAX_IDE_DEVS
; i
++) {
2371 hd
[i
] = drive_get(IF_IDE
, i
/ MAX_IDE_DEVS
, i
% MAX_IDE_DEVS
);