Merge remote-tracking branch 'remotes/armbru/tags/pull-error-2015-06-09' into staging
[qemu.git] / hw / i386 / pc.c
blob3f0d435da944fa26d4d4180158d852e886c6a07a
1 /*
2 * QEMU PC System Emulator
4 * Copyright (c) 2003-2004 Fabrice Bellard
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
24 #include "hw/hw.h"
25 #include "hw/i386/pc.h"
26 #include "hw/char/serial.h"
27 #include "hw/i386/apic.h"
28 #include "hw/i386/topology.h"
29 #include "sysemu/cpus.h"
30 #include "hw/block/fdc.h"
31 #include "hw/ide.h"
32 #include "hw/pci/pci.h"
33 #include "hw/pci/pci_bus.h"
34 #include "monitor/monitor.h"
35 #include "hw/nvram/fw_cfg.h"
36 #include "hw/timer/hpet.h"
37 #include "hw/i386/smbios.h"
38 #include "hw/loader.h"
39 #include "elf.h"
40 #include "multiboot.h"
41 #include "hw/timer/mc146818rtc.h"
42 #include "hw/timer/i8254.h"
43 #include "hw/audio/pcspk.h"
44 #include "hw/pci/msi.h"
45 #include "hw/sysbus.h"
46 #include "sysemu/sysemu.h"
47 #include "sysemu/numa.h"
48 #include "sysemu/kvm.h"
49 #include "sysemu/qtest.h"
50 #include "kvm_i386.h"
51 #include "hw/xen/xen.h"
52 #include "sysemu/block-backend.h"
53 #include "hw/block/block.h"
54 #include "ui/qemu-spice.h"
55 #include "exec/memory.h"
56 #include "exec/address-spaces.h"
57 #include "sysemu/arch_init.h"
58 #include "qemu/bitmap.h"
59 #include "qemu/config-file.h"
60 #include "hw/acpi/acpi.h"
61 #include "hw/acpi/cpu_hotplug.h"
62 #include "hw/cpu/icc_bus.h"
63 #include "hw/boards.h"
64 #include "hw/pci/pci_host.h"
65 #include "acpi-build.h"
66 #include "hw/mem/pc-dimm.h"
67 #include "trace.h"
68 #include "qapi/visitor.h"
69 #include "qapi-visit.h"
71 /* debug PC/ISA interrupts */
72 //#define DEBUG_IRQ
74 #ifdef DEBUG_IRQ
75 #define DPRINTF(fmt, ...) \
76 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
77 #else
78 #define DPRINTF(fmt, ...)
79 #endif
81 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables
82 * (128K) and other BIOS datastructures (less than 4K reported to be used at
83 * the moment, 32K should be enough for a while). */
84 static unsigned acpi_data_size = 0x20000 + 0x8000;
85 void pc_set_legacy_acpi_data_size(void)
87 acpi_data_size = 0x10000;
90 #define BIOS_CFG_IOPORT 0x510
91 #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
92 #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
93 #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
94 #define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
95 #define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
97 #define E820_NR_ENTRIES 16
99 struct e820_entry {
100 uint64_t address;
101 uint64_t length;
102 uint32_t type;
103 } QEMU_PACKED __attribute((__aligned__(4)));
105 struct e820_table {
106 uint32_t count;
107 struct e820_entry entry[E820_NR_ENTRIES];
108 } QEMU_PACKED __attribute((__aligned__(4)));
110 static struct e820_table e820_reserve;
111 static struct e820_entry *e820_table;
112 static unsigned e820_entries;
113 struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
115 void gsi_handler(void *opaque, int n, int level)
117 GSIState *s = opaque;
119 DPRINTF("pc: %s GSI %d\n", level ? "raising" : "lowering", n);
120 if (n < ISA_NUM_IRQS) {
121 qemu_set_irq(s->i8259_irq[n], level);
123 qemu_set_irq(s->ioapic_irq[n], level);
126 static void ioport80_write(void *opaque, hwaddr addr, uint64_t data,
127 unsigned size)
131 static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size)
133 return 0xffffffffffffffffULL;
136 /* MSDOS compatibility mode FPU exception support */
137 static qemu_irq ferr_irq;
139 void pc_register_ferr_irq(qemu_irq irq)
141 ferr_irq = irq;
144 /* XXX: add IGNNE support */
145 void cpu_set_ferr(CPUX86State *s)
147 qemu_irq_raise(ferr_irq);
150 static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
151 unsigned size)
153 qemu_irq_lower(ferr_irq);
156 static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size)
158 return 0xffffffffffffffffULL;
161 /* TSC handling */
162 uint64_t cpu_get_tsc(CPUX86State *env)
164 return cpu_get_ticks();
167 /* IRQ handling */
168 int cpu_get_pic_interrupt(CPUX86State *env)
170 X86CPU *cpu = x86_env_get_cpu(env);
171 int intno;
173 intno = apic_get_interrupt(cpu->apic_state);
174 if (intno >= 0) {
175 return intno;
177 /* read the irq from the PIC */
178 if (!apic_accept_pic_intr(cpu->apic_state)) {
179 return -1;
182 intno = pic_read_irq(isa_pic);
183 return intno;
186 static void pic_irq_request(void *opaque, int irq, int level)
188 CPUState *cs = first_cpu;
189 X86CPU *cpu = X86_CPU(cs);
191 DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq);
192 if (cpu->apic_state) {
193 CPU_FOREACH(cs) {
194 cpu = X86_CPU(cs);
195 if (apic_accept_pic_intr(cpu->apic_state)) {
196 apic_deliver_pic_intr(cpu->apic_state, level);
199 } else {
200 if (level) {
201 cpu_interrupt(cs, CPU_INTERRUPT_HARD);
202 } else {
203 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
208 /* PC cmos mappings */
210 #define REG_EQUIPMENT_BYTE 0x14
212 static int cmos_get_fd_drive_type(FDriveType fd0)
214 int val;
216 switch (fd0) {
217 case FDRIVE_DRV_144:
218 /* 1.44 Mb 3"5 drive */
219 val = 4;
220 break;
221 case FDRIVE_DRV_288:
222 /* 2.88 Mb 3"5 drive */
223 val = 5;
224 break;
225 case FDRIVE_DRV_120:
226 /* 1.2 Mb 5"5 drive */
227 val = 2;
228 break;
229 case FDRIVE_DRV_NONE:
230 default:
231 val = 0;
232 break;
234 return val;
237 static void cmos_init_hd(ISADevice *s, int type_ofs, int info_ofs,
238 int16_t cylinders, int8_t heads, int8_t sectors)
240 rtc_set_memory(s, type_ofs, 47);
241 rtc_set_memory(s, info_ofs, cylinders);
242 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
243 rtc_set_memory(s, info_ofs + 2, heads);
244 rtc_set_memory(s, info_ofs + 3, 0xff);
245 rtc_set_memory(s, info_ofs + 4, 0xff);
246 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
247 rtc_set_memory(s, info_ofs + 6, cylinders);
248 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
249 rtc_set_memory(s, info_ofs + 8, sectors);
252 /* convert boot_device letter to something recognizable by the bios */
253 static int boot_device2nibble(char boot_device)
255 switch(boot_device) {
256 case 'a':
257 case 'b':
258 return 0x01; /* floppy boot */
259 case 'c':
260 return 0x02; /* hard drive boot */
261 case 'd':
262 return 0x03; /* CD-ROM boot */
263 case 'n':
264 return 0x04; /* Network boot */
266 return 0;
269 static void set_boot_dev(ISADevice *s, const char *boot_device, Error **errp)
271 #define PC_MAX_BOOT_DEVICES 3
272 int nbds, bds[3] = { 0, };
273 int i;
275 nbds = strlen(boot_device);
276 if (nbds > PC_MAX_BOOT_DEVICES) {
277 error_setg(errp, "Too many boot devices for PC");
278 return;
280 for (i = 0; i < nbds; i++) {
281 bds[i] = boot_device2nibble(boot_device[i]);
282 if (bds[i] == 0) {
283 error_setg(errp, "Invalid boot device for PC: '%c'",
284 boot_device[i]);
285 return;
288 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
289 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
292 static void pc_boot_set(void *opaque, const char *boot_device, Error **errp)
294 set_boot_dev(opaque, boot_device, errp);
297 typedef struct pc_cmos_init_late_arg {
298 ISADevice *rtc_state;
299 BusState *idebus[2];
300 } pc_cmos_init_late_arg;
302 static void pc_cmos_init_late(void *opaque)
304 pc_cmos_init_late_arg *arg = opaque;
305 ISADevice *s = arg->rtc_state;
306 int16_t cylinders;
307 int8_t heads, sectors;
308 int val;
309 int i, trans;
311 val = 0;
312 if (ide_get_geometry(arg->idebus[0], 0,
313 &cylinders, &heads, &sectors) >= 0) {
314 cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors);
315 val |= 0xf0;
317 if (ide_get_geometry(arg->idebus[0], 1,
318 &cylinders, &heads, &sectors) >= 0) {
319 cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors);
320 val |= 0x0f;
322 rtc_set_memory(s, 0x12, val);
324 val = 0;
325 for (i = 0; i < 4; i++) {
326 /* NOTE: ide_get_geometry() returns the physical
327 geometry. It is always such that: 1 <= sects <= 63, 1
328 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
329 geometry can be different if a translation is done. */
330 if (ide_get_geometry(arg->idebus[i / 2], i % 2,
331 &cylinders, &heads, &sectors) >= 0) {
332 trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1;
333 assert((trans & ~3) == 0);
334 val |= trans << (i * 2);
337 rtc_set_memory(s, 0x39, val);
339 qemu_unregister_reset(pc_cmos_init_late, opaque);
342 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
343 const char *boot_device, MachineState *machine,
344 ISADevice *floppy, BusState *idebus0, BusState *idebus1,
345 ISADevice *s)
347 int val, nb, i;
348 FDriveType fd_type[2] = { FDRIVE_DRV_NONE, FDRIVE_DRV_NONE };
349 static pc_cmos_init_late_arg arg;
350 PCMachineState *pc_machine = PC_MACHINE(machine);
351 Error *local_err = NULL;
353 /* various important CMOS locations needed by PC/Bochs bios */
355 /* memory size */
356 /* base memory (first MiB) */
357 val = MIN(ram_size / 1024, 640);
358 rtc_set_memory(s, 0x15, val);
359 rtc_set_memory(s, 0x16, val >> 8);
360 /* extended memory (next 64MiB) */
361 if (ram_size > 1024 * 1024) {
362 val = (ram_size - 1024 * 1024) / 1024;
363 } else {
364 val = 0;
366 if (val > 65535)
367 val = 65535;
368 rtc_set_memory(s, 0x17, val);
369 rtc_set_memory(s, 0x18, val >> 8);
370 rtc_set_memory(s, 0x30, val);
371 rtc_set_memory(s, 0x31, val >> 8);
372 /* memory between 16MiB and 4GiB */
373 if (ram_size > 16 * 1024 * 1024) {
374 val = (ram_size - 16 * 1024 * 1024) / 65536;
375 } else {
376 val = 0;
378 if (val > 65535)
379 val = 65535;
380 rtc_set_memory(s, 0x34, val);
381 rtc_set_memory(s, 0x35, val >> 8);
382 /* memory above 4GiB */
383 val = above_4g_mem_size / 65536;
384 rtc_set_memory(s, 0x5b, val);
385 rtc_set_memory(s, 0x5c, val >> 8);
386 rtc_set_memory(s, 0x5d, val >> 16);
388 /* set the number of CPU */
389 rtc_set_memory(s, 0x5f, smp_cpus - 1);
391 object_property_add_link(OBJECT(machine), "rtc_state",
392 TYPE_ISA_DEVICE,
393 (Object **)&pc_machine->rtc,
394 object_property_allow_set_link,
395 OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort);
396 object_property_set_link(OBJECT(machine), OBJECT(s),
397 "rtc_state", &error_abort);
399 set_boot_dev(s, boot_device, &local_err);
400 if (local_err) {
401 error_report_err(local_err);
402 exit(1);
405 /* floppy type */
406 if (floppy) {
407 for (i = 0; i < 2; i++) {
408 fd_type[i] = isa_fdc_get_drive_type(floppy, i);
411 val = (cmos_get_fd_drive_type(fd_type[0]) << 4) |
412 cmos_get_fd_drive_type(fd_type[1]);
413 rtc_set_memory(s, 0x10, val);
415 val = 0;
416 nb = 0;
417 if (fd_type[0] < FDRIVE_DRV_NONE) {
418 nb++;
420 if (fd_type[1] < FDRIVE_DRV_NONE) {
421 nb++;
423 switch (nb) {
424 case 0:
425 break;
426 case 1:
427 val |= 0x01; /* 1 drive, ready for boot */
428 break;
429 case 2:
430 val |= 0x41; /* 2 drives, ready for boot */
431 break;
433 val |= 0x02; /* FPU is there */
434 val |= 0x04; /* PS/2 mouse installed */
435 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
437 /* hard drives */
438 arg.rtc_state = s;
439 arg.idebus[0] = idebus0;
440 arg.idebus[1] = idebus1;
441 qemu_register_reset(pc_cmos_init_late, &arg);
444 #define TYPE_PORT92 "port92"
445 #define PORT92(obj) OBJECT_CHECK(Port92State, (obj), TYPE_PORT92)
447 /* port 92 stuff: could be split off */
448 typedef struct Port92State {
449 ISADevice parent_obj;
451 MemoryRegion io;
452 uint8_t outport;
453 qemu_irq *a20_out;
454 } Port92State;
456 static void port92_write(void *opaque, hwaddr addr, uint64_t val,
457 unsigned size)
459 Port92State *s = opaque;
460 int oldval = s->outport;
462 DPRINTF("port92: write 0x%02" PRIx64 "\n", val);
463 s->outport = val;
464 qemu_set_irq(*s->a20_out, (val >> 1) & 1);
465 if ((val & 1) && !(oldval & 1)) {
466 qemu_system_reset_request();
470 static uint64_t port92_read(void *opaque, hwaddr addr,
471 unsigned size)
473 Port92State *s = opaque;
474 uint32_t ret;
476 ret = s->outport;
477 DPRINTF("port92: read 0x%02x\n", ret);
478 return ret;
481 static void port92_init(ISADevice *dev, qemu_irq *a20_out)
483 Port92State *s = PORT92(dev);
485 s->a20_out = a20_out;
488 static const VMStateDescription vmstate_port92_isa = {
489 .name = "port92",
490 .version_id = 1,
491 .minimum_version_id = 1,
492 .fields = (VMStateField[]) {
493 VMSTATE_UINT8(outport, Port92State),
494 VMSTATE_END_OF_LIST()
498 static void port92_reset(DeviceState *d)
500 Port92State *s = PORT92(d);
502 s->outport &= ~1;
505 static const MemoryRegionOps port92_ops = {
506 .read = port92_read,
507 .write = port92_write,
508 .impl = {
509 .min_access_size = 1,
510 .max_access_size = 1,
512 .endianness = DEVICE_LITTLE_ENDIAN,
515 static void port92_initfn(Object *obj)
517 Port92State *s = PORT92(obj);
519 memory_region_init_io(&s->io, OBJECT(s), &port92_ops, s, "port92", 1);
521 s->outport = 0;
524 static void port92_realizefn(DeviceState *dev, Error **errp)
526 ISADevice *isadev = ISA_DEVICE(dev);
527 Port92State *s = PORT92(dev);
529 isa_register_ioport(isadev, &s->io, 0x92);
532 static void port92_class_initfn(ObjectClass *klass, void *data)
534 DeviceClass *dc = DEVICE_CLASS(klass);
536 dc->realize = port92_realizefn;
537 dc->reset = port92_reset;
538 dc->vmsd = &vmstate_port92_isa;
540 * Reason: unlike ordinary ISA devices, this one needs additional
541 * wiring: its A20 output line needs to be wired up by
542 * port92_init().
544 dc->cannot_instantiate_with_device_add_yet = true;
547 static const TypeInfo port92_info = {
548 .name = TYPE_PORT92,
549 .parent = TYPE_ISA_DEVICE,
550 .instance_size = sizeof(Port92State),
551 .instance_init = port92_initfn,
552 .class_init = port92_class_initfn,
555 static void port92_register_types(void)
557 type_register_static(&port92_info);
560 type_init(port92_register_types)
562 static void handle_a20_line_change(void *opaque, int irq, int level)
564 X86CPU *cpu = opaque;
566 /* XXX: send to all CPUs ? */
567 /* XXX: add logic to handle multiple A20 line sources */
568 x86_cpu_set_a20(cpu, level);
571 int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
573 int index = le32_to_cpu(e820_reserve.count);
574 struct e820_entry *entry;
576 if (type != E820_RAM) {
577 /* old FW_CFG_E820_TABLE entry -- reservations only */
578 if (index >= E820_NR_ENTRIES) {
579 return -EBUSY;
581 entry = &e820_reserve.entry[index++];
583 entry->address = cpu_to_le64(address);
584 entry->length = cpu_to_le64(length);
585 entry->type = cpu_to_le32(type);
587 e820_reserve.count = cpu_to_le32(index);
590 /* new "etc/e820" file -- include ram too */
591 e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
592 e820_table[e820_entries].address = cpu_to_le64(address);
593 e820_table[e820_entries].length = cpu_to_le64(length);
594 e820_table[e820_entries].type = cpu_to_le32(type);
595 e820_entries++;
597 return e820_entries;
600 int e820_get_num_entries(void)
602 return e820_entries;
605 bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
607 if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
608 *address = le64_to_cpu(e820_table[idx].address);
609 *length = le64_to_cpu(e820_table[idx].length);
610 return true;
612 return false;
615 /* Enables contiguous-apic-ID mode, for compatibility */
616 static bool compat_apic_id_mode;
618 void enable_compat_apic_id_mode(void)
620 compat_apic_id_mode = true;
623 /* Calculates initial APIC ID for a specific CPU index
625 * Currently we need to be able to calculate the APIC ID from the CPU index
626 * alone (without requiring a CPU object), as the QEMU<->Seabios interfaces have
627 * no concept of "CPU index", and the NUMA tables on fw_cfg need the APIC ID of
628 * all CPUs up to max_cpus.
630 static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
632 uint32_t correct_id;
633 static bool warned;
635 correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
636 if (compat_apic_id_mode) {
637 if (cpu_index != correct_id && !warned && !qtest_enabled()) {
638 error_report("APIC IDs set in compatibility mode, "
639 "CPU topology won't match the configuration");
640 warned = true;
642 return cpu_index;
643 } else {
644 return correct_id;
648 /* Calculates the limit to CPU APIC ID values
650 * This function returns the limit for the APIC ID value, so that all
651 * CPU APIC IDs are < pc_apic_id_limit().
653 * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
655 static unsigned int pc_apic_id_limit(unsigned int max_cpus)
657 return x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
660 static FWCfgState *bochs_bios_init(void)
662 FWCfgState *fw_cfg;
663 uint8_t *smbios_tables, *smbios_anchor;
664 size_t smbios_tables_len, smbios_anchor_len;
665 uint64_t *numa_fw_cfg;
666 int i, j;
667 unsigned int apic_id_limit = pc_apic_id_limit(max_cpus);
669 fw_cfg = fw_cfg_init_io(BIOS_CFG_IOPORT);
670 /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
672 * SeaBIOS needs FW_CFG_MAX_CPUS for CPU hotplug, but the CPU hotplug
673 * QEMU<->SeaBIOS interface is not based on the "CPU index", but on the APIC
674 * ID of hotplugged CPUs[1]. This means that FW_CFG_MAX_CPUS is not the
675 * "maximum number of CPUs", but the "limit to the APIC ID values SeaBIOS
676 * may see".
678 * So, this means we must not use max_cpus, here, but the maximum possible
679 * APIC ID value, plus one.
681 * [1] The only kind of "CPU identifier" used between SeaBIOS and QEMU is
682 * the APIC ID, not the "CPU index"
684 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)apic_id_limit);
685 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
686 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
687 acpi_tables, acpi_tables_len);
688 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
690 smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
691 if (smbios_tables) {
692 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
693 smbios_tables, smbios_tables_len);
696 smbios_get_tables(&smbios_tables, &smbios_tables_len,
697 &smbios_anchor, &smbios_anchor_len);
698 if (smbios_anchor) {
699 fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
700 smbios_tables, smbios_tables_len);
701 fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
702 smbios_anchor, smbios_anchor_len);
705 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
706 &e820_reserve, sizeof(e820_reserve));
707 fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
708 sizeof(struct e820_entry) * e820_entries);
710 fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
711 /* allocate memory for the NUMA channel: one (64bit) word for the number
712 * of nodes, one word for each VCPU->node and one word for each node to
713 * hold the amount of memory.
715 numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
716 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
717 for (i = 0; i < max_cpus; i++) {
718 unsigned int apic_id = x86_cpu_apic_id_from_index(i);
719 assert(apic_id < apic_id_limit);
720 for (j = 0; j < nb_numa_nodes; j++) {
721 if (test_bit(i, numa_info[j].node_cpu)) {
722 numa_fw_cfg[apic_id + 1] = cpu_to_le64(j);
723 break;
727 for (i = 0; i < nb_numa_nodes; i++) {
728 numa_fw_cfg[apic_id_limit + 1 + i] = cpu_to_le64(numa_info[i].node_mem);
730 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
731 (1 + apic_id_limit + nb_numa_nodes) *
732 sizeof(*numa_fw_cfg));
734 return fw_cfg;
737 static long get_file_size(FILE *f)
739 long where, size;
741 /* XXX: on Unix systems, using fstat() probably makes more sense */
743 where = ftell(f);
744 fseek(f, 0, SEEK_END);
745 size = ftell(f);
746 fseek(f, where, SEEK_SET);
748 return size;
751 static void load_linux(FWCfgState *fw_cfg,
752 const char *kernel_filename,
753 const char *initrd_filename,
754 const char *kernel_cmdline,
755 hwaddr max_ram_size)
757 uint16_t protocol;
758 int setup_size, kernel_size, initrd_size = 0, cmdline_size;
759 uint32_t initrd_max;
760 uint8_t header[8192], *setup, *kernel, *initrd_data;
761 hwaddr real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
762 FILE *f;
763 char *vmode;
765 /* Align to 16 bytes as a paranoia measure */
766 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
768 /* load the kernel header */
769 f = fopen(kernel_filename, "rb");
770 if (!f || !(kernel_size = get_file_size(f)) ||
771 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
772 MIN(ARRAY_SIZE(header), kernel_size)) {
773 fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
774 kernel_filename, strerror(errno));
775 exit(1);
778 /* kernel protocol version */
779 #if 0
780 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
781 #endif
782 if (ldl_p(header+0x202) == 0x53726448) {
783 protocol = lduw_p(header+0x206);
784 } else {
785 /* This looks like a multiboot kernel. If it is, let's stop
786 treating it like a Linux kernel. */
787 if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
788 kernel_cmdline, kernel_size, header)) {
789 return;
791 protocol = 0;
794 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
795 /* Low kernel */
796 real_addr = 0x90000;
797 cmdline_addr = 0x9a000 - cmdline_size;
798 prot_addr = 0x10000;
799 } else if (protocol < 0x202) {
800 /* High but ancient kernel */
801 real_addr = 0x90000;
802 cmdline_addr = 0x9a000 - cmdline_size;
803 prot_addr = 0x100000;
804 } else {
805 /* High and recent kernel */
806 real_addr = 0x10000;
807 cmdline_addr = 0x20000;
808 prot_addr = 0x100000;
811 #if 0
812 fprintf(stderr,
813 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
814 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
815 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
816 real_addr,
817 cmdline_addr,
818 prot_addr);
819 #endif
821 /* highest address for loading the initrd */
822 if (protocol >= 0x203) {
823 initrd_max = ldl_p(header+0x22c);
824 } else {
825 initrd_max = 0x37ffffff;
828 if (initrd_max >= max_ram_size - acpi_data_size) {
829 initrd_max = max_ram_size - acpi_data_size - 1;
832 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
833 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
834 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline);
836 if (protocol >= 0x202) {
837 stl_p(header+0x228, cmdline_addr);
838 } else {
839 stw_p(header+0x20, 0xA33F);
840 stw_p(header+0x22, cmdline_addr-real_addr);
843 /* handle vga= parameter */
844 vmode = strstr(kernel_cmdline, "vga=");
845 if (vmode) {
846 unsigned int video_mode;
847 /* skip "vga=" */
848 vmode += 4;
849 if (!strncmp(vmode, "normal", 6)) {
850 video_mode = 0xffff;
851 } else if (!strncmp(vmode, "ext", 3)) {
852 video_mode = 0xfffe;
853 } else if (!strncmp(vmode, "ask", 3)) {
854 video_mode = 0xfffd;
855 } else {
856 video_mode = strtol(vmode, NULL, 0);
858 stw_p(header+0x1fa, video_mode);
861 /* loader type */
862 /* High nybble = B reserved for QEMU; low nybble is revision number.
863 If this code is substantially changed, you may want to consider
864 incrementing the revision. */
865 if (protocol >= 0x200) {
866 header[0x210] = 0xB0;
868 /* heap */
869 if (protocol >= 0x201) {
870 header[0x211] |= 0x80; /* CAN_USE_HEAP */
871 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
874 /* load initrd */
875 if (initrd_filename) {
876 if (protocol < 0x200) {
877 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
878 exit(1);
881 initrd_size = get_image_size(initrd_filename);
882 if (initrd_size < 0) {
883 fprintf(stderr, "qemu: error reading initrd %s: %s\n",
884 initrd_filename, strerror(errno));
885 exit(1);
888 initrd_addr = (initrd_max-initrd_size) & ~4095;
890 initrd_data = g_malloc(initrd_size);
891 load_image(initrd_filename, initrd_data);
893 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
894 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
895 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
897 stl_p(header+0x218, initrd_addr);
898 stl_p(header+0x21c, initrd_size);
901 /* load kernel and setup */
902 setup_size = header[0x1f1];
903 if (setup_size == 0) {
904 setup_size = 4;
906 setup_size = (setup_size+1)*512;
907 kernel_size -= setup_size;
909 setup = g_malloc(setup_size);
910 kernel = g_malloc(kernel_size);
911 fseek(f, 0, SEEK_SET);
912 if (fread(setup, 1, setup_size, f) != setup_size) {
913 fprintf(stderr, "fread() failed\n");
914 exit(1);
916 if (fread(kernel, 1, kernel_size, f) != kernel_size) {
917 fprintf(stderr, "fread() failed\n");
918 exit(1);
920 fclose(f);
921 memcpy(setup, header, MIN(sizeof(header), setup_size));
923 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
924 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
925 fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
927 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
928 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
929 fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
931 option_rom[nb_option_roms].name = "linuxboot.bin";
932 option_rom[nb_option_roms].bootindex = 0;
933 nb_option_roms++;
936 #define NE2000_NB_MAX 6
938 static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
939 0x280, 0x380 };
940 static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
942 void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd)
944 static int nb_ne2k = 0;
946 if (nb_ne2k == NE2000_NB_MAX)
947 return;
948 isa_ne2000_init(bus, ne2000_io[nb_ne2k],
949 ne2000_irq[nb_ne2k], nd);
950 nb_ne2k++;
953 DeviceState *cpu_get_current_apic(void)
955 if (current_cpu) {
956 X86CPU *cpu = X86_CPU(current_cpu);
957 return cpu->apic_state;
958 } else {
959 return NULL;
963 void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
965 X86CPU *cpu = opaque;
967 if (level) {
968 cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI);
972 static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
973 DeviceState *icc_bridge, Error **errp)
975 X86CPU *cpu = NULL;
976 Error *local_err = NULL;
978 if (icc_bridge == NULL) {
979 error_setg(&local_err, "Invalid icc-bridge value");
980 goto out;
983 cpu = cpu_x86_create(cpu_model, &local_err);
984 if (local_err != NULL) {
985 goto out;
988 qdev_set_parent_bus(DEVICE(cpu), qdev_get_child_bus(icc_bridge, "icc"));
990 object_property_set_int(OBJECT(cpu), apic_id, "apic-id", &local_err);
991 object_property_set_bool(OBJECT(cpu), true, "realized", &local_err);
993 out:
994 if (local_err) {
995 error_propagate(errp, local_err);
996 object_unref(OBJECT(cpu));
997 cpu = NULL;
999 return cpu;
1002 static const char *current_cpu_model;
1004 void pc_hot_add_cpu(const int64_t id, Error **errp)
1006 DeviceState *icc_bridge;
1007 X86CPU *cpu;
1008 int64_t apic_id = x86_cpu_apic_id_from_index(id);
1009 Error *local_err = NULL;
1011 if (id < 0) {
1012 error_setg(errp, "Invalid CPU id: %" PRIi64, id);
1013 return;
1016 if (cpu_exists(apic_id)) {
1017 error_setg(errp, "Unable to add CPU: %" PRIi64
1018 ", it already exists", id);
1019 return;
1022 if (id >= max_cpus) {
1023 error_setg(errp, "Unable to add CPU: %" PRIi64
1024 ", max allowed: %d", id, max_cpus - 1);
1025 return;
1028 if (apic_id >= ACPI_CPU_HOTPLUG_ID_LIMIT) {
1029 error_setg(errp, "Unable to add CPU: %" PRIi64
1030 ", resulting APIC ID (%" PRIi64 ") is too large",
1031 id, apic_id);
1032 return;
1035 icc_bridge = DEVICE(object_resolve_path_type("icc-bridge",
1036 TYPE_ICC_BRIDGE, NULL));
1037 cpu = pc_new_cpu(current_cpu_model, apic_id, icc_bridge, &local_err);
1038 if (local_err) {
1039 error_propagate(errp, local_err);
1040 return;
1042 object_unref(OBJECT(cpu));
1045 void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
1047 int i;
1048 X86CPU *cpu = NULL;
1049 Error *error = NULL;
1050 unsigned long apic_id_limit;
1052 /* init CPUs */
1053 if (cpu_model == NULL) {
1054 #ifdef TARGET_X86_64
1055 cpu_model = "qemu64";
1056 #else
1057 cpu_model = "qemu32";
1058 #endif
1060 current_cpu_model = cpu_model;
1062 apic_id_limit = pc_apic_id_limit(max_cpus);
1063 if (apic_id_limit > ACPI_CPU_HOTPLUG_ID_LIMIT) {
1064 error_report("max_cpus is too large. APIC ID of last CPU is %lu",
1065 apic_id_limit - 1);
1066 exit(1);
1069 for (i = 0; i < smp_cpus; i++) {
1070 cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
1071 icc_bridge, &error);
1072 if (error) {
1073 error_report_err(error);
1074 exit(1);
1076 object_unref(OBJECT(cpu));
1079 /* map APIC MMIO area if CPU has APIC */
1080 if (cpu && cpu->apic_state) {
1081 /* XXX: what if the base changes? */
1082 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
1083 APIC_DEFAULT_ADDRESS, 0x1000);
1086 /* tell smbios about cpuid version and features */
1087 smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
1090 /* pci-info ROM file. Little endian format */
1091 typedef struct PcRomPciInfo {
1092 uint64_t w32_min;
1093 uint64_t w32_max;
1094 uint64_t w64_min;
1095 uint64_t w64_max;
1096 } PcRomPciInfo;
1098 typedef struct PcGuestInfoState {
1099 PcGuestInfo info;
1100 Notifier machine_done;
1101 } PcGuestInfoState;
1103 static
1104 void pc_guest_info_machine_done(Notifier *notifier, void *data)
1106 PcGuestInfoState *guest_info_state = container_of(notifier,
1107 PcGuestInfoState,
1108 machine_done);
1109 PCIBus *bus = find_i440fx();
1111 if (bus) {
1112 int extra_hosts = 0;
1114 QLIST_FOREACH(bus, &bus->child, sibling) {
1115 /* look for expander root buses */
1116 if (pci_bus_is_root(bus)) {
1117 extra_hosts++;
1120 if (extra_hosts && guest_info_state->info.fw_cfg) {
1121 uint64_t *val = g_malloc(sizeof(*val));
1122 *val = cpu_to_le64(extra_hosts);
1123 fw_cfg_add_file(guest_info_state->info.fw_cfg,
1124 "etc/extra-pci-roots", val, sizeof(*val));
1128 acpi_setup(&guest_info_state->info);
1131 PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
1132 ram_addr_t above_4g_mem_size)
1134 PcGuestInfoState *guest_info_state = g_malloc0(sizeof *guest_info_state);
1135 PcGuestInfo *guest_info = &guest_info_state->info;
1136 int i, j;
1138 guest_info->ram_size_below_4g = below_4g_mem_size;
1139 guest_info->ram_size = below_4g_mem_size + above_4g_mem_size;
1140 guest_info->apic_id_limit = pc_apic_id_limit(max_cpus);
1141 guest_info->apic_xrupt_override = kvm_allows_irq0_override();
1142 guest_info->numa_nodes = nb_numa_nodes;
1143 guest_info->node_mem = g_malloc0(guest_info->numa_nodes *
1144 sizeof *guest_info->node_mem);
1145 for (i = 0; i < nb_numa_nodes; i++) {
1146 guest_info->node_mem[i] = numa_info[i].node_mem;
1149 guest_info->node_cpu = g_malloc0(guest_info->apic_id_limit *
1150 sizeof *guest_info->node_cpu);
1152 for (i = 0; i < max_cpus; i++) {
1153 unsigned int apic_id = x86_cpu_apic_id_from_index(i);
1154 assert(apic_id < guest_info->apic_id_limit);
1155 for (j = 0; j < nb_numa_nodes; j++) {
1156 if (test_bit(i, numa_info[j].node_cpu)) {
1157 guest_info->node_cpu[apic_id] = j;
1158 break;
1163 guest_info_state->machine_done.notify = pc_guest_info_machine_done;
1164 qemu_add_machine_init_done_notifier(&guest_info_state->machine_done);
1165 return guest_info;
1168 /* setup pci memory address space mapping into system address space */
1169 void pc_pci_as_mapping_init(Object *owner, MemoryRegion *system_memory,
1170 MemoryRegion *pci_address_space)
1172 /* Set to lower priority than RAM */
1173 memory_region_add_subregion_overlap(system_memory, 0x0,
1174 pci_address_space, -1);
1177 void pc_acpi_init(const char *default_dsdt)
1179 char *filename;
1181 if (acpi_tables != NULL) {
1182 /* manually set via -acpitable, leave it alone */
1183 return;
1186 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, default_dsdt);
1187 if (filename == NULL) {
1188 fprintf(stderr, "WARNING: failed to find %s\n", default_dsdt);
1189 } else {
1190 QemuOpts *opts = qemu_opts_create(qemu_find_opts("acpi"), NULL, 0,
1191 &error_abort);
1192 Error *err = NULL;
1194 qemu_opt_set(opts, "file", filename, &error_abort);
1196 acpi_table_add_builtin(opts, &err);
1197 if (err) {
1198 error_report("WARNING: failed to load %s: %s", filename,
1199 error_get_pretty(err));
1200 error_free(err);
1202 g_free(filename);
1206 FWCfgState *xen_load_linux(const char *kernel_filename,
1207 const char *kernel_cmdline,
1208 const char *initrd_filename,
1209 ram_addr_t below_4g_mem_size,
1210 PcGuestInfo *guest_info)
1212 int i;
1213 FWCfgState *fw_cfg;
1215 assert(kernel_filename != NULL);
1217 fw_cfg = fw_cfg_init_io(BIOS_CFG_IOPORT);
1218 rom_set_fw(fw_cfg);
1220 load_linux(fw_cfg, kernel_filename, initrd_filename,
1221 kernel_cmdline, below_4g_mem_size);
1222 for (i = 0; i < nb_option_roms; i++) {
1223 assert(!strcmp(option_rom[i].name, "linuxboot.bin") ||
1224 !strcmp(option_rom[i].name, "multiboot.bin"));
1225 rom_add_option(option_rom[i].name, option_rom[i].bootindex);
1227 guest_info->fw_cfg = fw_cfg;
1228 return fw_cfg;
1231 FWCfgState *pc_memory_init(MachineState *machine,
1232 MemoryRegion *system_memory,
1233 ram_addr_t below_4g_mem_size,
1234 ram_addr_t above_4g_mem_size,
1235 MemoryRegion *rom_memory,
1236 MemoryRegion **ram_memory,
1237 PcGuestInfo *guest_info)
1239 int linux_boot, i;
1240 MemoryRegion *ram, *option_rom_mr;
1241 MemoryRegion *ram_below_4g, *ram_above_4g;
1242 FWCfgState *fw_cfg;
1243 PCMachineState *pcms = PC_MACHINE(machine);
1245 assert(machine->ram_size == below_4g_mem_size + above_4g_mem_size);
1247 linux_boot = (machine->kernel_filename != NULL);
1249 /* Allocate RAM. We allocate it as a single memory region and use
1250 * aliases to address portions of it, mostly for backwards compatibility
1251 * with older qemus that used qemu_ram_alloc().
1253 ram = g_malloc(sizeof(*ram));
1254 memory_region_allocate_system_memory(ram, NULL, "pc.ram",
1255 machine->ram_size);
1256 *ram_memory = ram;
1257 ram_below_4g = g_malloc(sizeof(*ram_below_4g));
1258 memory_region_init_alias(ram_below_4g, NULL, "ram-below-4g", ram,
1259 0, below_4g_mem_size);
1260 memory_region_add_subregion(system_memory, 0, ram_below_4g);
1261 e820_add_entry(0, below_4g_mem_size, E820_RAM);
1262 if (above_4g_mem_size > 0) {
1263 ram_above_4g = g_malloc(sizeof(*ram_above_4g));
1264 memory_region_init_alias(ram_above_4g, NULL, "ram-above-4g", ram,
1265 below_4g_mem_size, above_4g_mem_size);
1266 memory_region_add_subregion(system_memory, 0x100000000ULL,
1267 ram_above_4g);
1268 e820_add_entry(0x100000000ULL, above_4g_mem_size, E820_RAM);
1271 if (!guest_info->has_reserved_memory &&
1272 (machine->ram_slots ||
1273 (machine->maxram_size > machine->ram_size))) {
1274 MachineClass *mc = MACHINE_GET_CLASS(machine);
1276 error_report("\"-memory 'slots|maxmem'\" is not supported by: %s",
1277 mc->name);
1278 exit(EXIT_FAILURE);
1281 /* initialize hotplug memory address space */
1282 if (guest_info->has_reserved_memory &&
1283 (machine->ram_size < machine->maxram_size)) {
1284 ram_addr_t hotplug_mem_size =
1285 machine->maxram_size - machine->ram_size;
1287 if (machine->ram_slots > ACPI_MAX_RAM_SLOTS) {
1288 error_report("unsupported amount of memory slots: %"PRIu64,
1289 machine->ram_slots);
1290 exit(EXIT_FAILURE);
1293 if (QEMU_ALIGN_UP(machine->maxram_size,
1294 TARGET_PAGE_SIZE) != machine->maxram_size) {
1295 error_report("maximum memory size must by aligned to multiple of "
1296 "%d bytes", TARGET_PAGE_SIZE);
1297 exit(EXIT_FAILURE);
1300 pcms->hotplug_memory_base =
1301 ROUND_UP(0x100000000ULL + above_4g_mem_size, 1ULL << 30);
1303 if (pcms->enforce_aligned_dimm) {
1304 /* size hotplug region assuming 1G page max alignment per slot */
1305 hotplug_mem_size += (1ULL << 30) * machine->ram_slots;
1308 if ((pcms->hotplug_memory_base + hotplug_mem_size) <
1309 hotplug_mem_size) {
1310 error_report("unsupported amount of maximum memory: " RAM_ADDR_FMT,
1311 machine->maxram_size);
1312 exit(EXIT_FAILURE);
1315 memory_region_init(&pcms->hotplug_memory, OBJECT(pcms),
1316 "hotplug-memory", hotplug_mem_size);
1317 memory_region_add_subregion(system_memory, pcms->hotplug_memory_base,
1318 &pcms->hotplug_memory);
1321 /* Initialize PC system firmware */
1322 pc_system_firmware_init(rom_memory, guest_info->isapc_ram_fw);
1324 option_rom_mr = g_malloc(sizeof(*option_rom_mr));
1325 memory_region_init_ram(option_rom_mr, NULL, "pc.rom", PC_ROM_SIZE,
1326 &error_abort);
1327 vmstate_register_ram_global(option_rom_mr);
1328 memory_region_add_subregion_overlap(rom_memory,
1329 PC_ROM_MIN_VGA,
1330 option_rom_mr,
1333 fw_cfg = bochs_bios_init();
1334 rom_set_fw(fw_cfg);
1336 if (guest_info->has_reserved_memory && pcms->hotplug_memory_base) {
1337 uint64_t *val = g_malloc(sizeof(*val));
1338 *val = cpu_to_le64(ROUND_UP(pcms->hotplug_memory_base, 0x1ULL << 30));
1339 fw_cfg_add_file(fw_cfg, "etc/reserved-memory-end", val, sizeof(*val));
1342 if (linux_boot) {
1343 load_linux(fw_cfg, machine->kernel_filename, machine->initrd_filename,
1344 machine->kernel_cmdline, below_4g_mem_size);
1347 for (i = 0; i < nb_option_roms; i++) {
1348 rom_add_option(option_rom[i].name, option_rom[i].bootindex);
1350 guest_info->fw_cfg = fw_cfg;
1351 return fw_cfg;
1354 qemu_irq pc_allocate_cpu_irq(void)
1356 return qemu_allocate_irq(pic_irq_request, NULL, 0);
1359 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus)
1361 DeviceState *dev = NULL;
1363 if (pci_bus) {
1364 PCIDevice *pcidev = pci_vga_init(pci_bus);
1365 dev = pcidev ? &pcidev->qdev : NULL;
1366 } else if (isa_bus) {
1367 ISADevice *isadev = isa_vga_init(isa_bus);
1368 dev = isadev ? DEVICE(isadev) : NULL;
1370 return dev;
1373 static void cpu_request_exit(void *opaque, int irq, int level)
1375 CPUState *cpu = current_cpu;
1377 if (cpu && level) {
1378 cpu_exit(cpu);
1382 static const MemoryRegionOps ioport80_io_ops = {
1383 .write = ioport80_write,
1384 .read = ioport80_read,
1385 .endianness = DEVICE_NATIVE_ENDIAN,
1386 .impl = {
1387 .min_access_size = 1,
1388 .max_access_size = 1,
1392 static const MemoryRegionOps ioportF0_io_ops = {
1393 .write = ioportF0_write,
1394 .read = ioportF0_read,
1395 .endianness = DEVICE_NATIVE_ENDIAN,
1396 .impl = {
1397 .min_access_size = 1,
1398 .max_access_size = 1,
1402 void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
1403 ISADevice **rtc_state,
1404 bool create_fdctrl,
1405 ISADevice **floppy,
1406 bool no_vmport,
1407 uint32 hpet_irqs)
1409 int i;
1410 DriveInfo *fd[MAX_FD];
1411 DeviceState *hpet = NULL;
1412 int pit_isa_irq = 0;
1413 qemu_irq pit_alt_irq = NULL;
1414 qemu_irq rtc_irq = NULL;
1415 qemu_irq *a20_line;
1416 ISADevice *i8042, *port92, *vmmouse, *pit = NULL;
1417 qemu_irq *cpu_exit_irq;
1418 MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
1419 MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
1421 memory_region_init_io(ioport80_io, NULL, &ioport80_io_ops, NULL, "ioport80", 1);
1422 memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io);
1424 memory_region_init_io(ioportF0_io, NULL, &ioportF0_io_ops, NULL, "ioportF0", 1);
1425 memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io);
1428 * Check if an HPET shall be created.
1430 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1431 * when the HPET wants to take over. Thus we have to disable the latter.
1433 if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
1434 /* In order to set property, here not using sysbus_try_create_simple */
1435 hpet = qdev_try_create(NULL, TYPE_HPET);
1436 if (hpet) {
1437 /* For pc-piix-*, hpet's intcap is always IRQ2. For pc-q35-1.7
1438 * and earlier, use IRQ2 for compat. Otherwise, use IRQ16~23,
1439 * IRQ8 and IRQ2.
1441 uint8_t compat = object_property_get_int(OBJECT(hpet),
1442 HPET_INTCAP, NULL);
1443 if (!compat) {
1444 qdev_prop_set_uint32(hpet, HPET_INTCAP, hpet_irqs);
1446 qdev_init_nofail(hpet);
1447 sysbus_mmio_map(SYS_BUS_DEVICE(hpet), 0, HPET_BASE);
1449 for (i = 0; i < GSI_NUM_PINS; i++) {
1450 sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
1452 pit_isa_irq = -1;
1453 pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT);
1454 rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT);
1457 *rtc_state = rtc_init(isa_bus, 2000, rtc_irq);
1459 qemu_register_boot_set(pc_boot_set, *rtc_state);
1461 if (!xen_enabled()) {
1462 if (kvm_irqchip_in_kernel()) {
1463 pit = kvm_pit_init(isa_bus, 0x40);
1464 } else {
1465 pit = pit_init(isa_bus, 0x40, pit_isa_irq, pit_alt_irq);
1467 if (hpet) {
1468 /* connect PIT to output control line of the HPET */
1469 qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(DEVICE(pit), 0));
1471 pcspk_init(isa_bus, pit);
1474 serial_hds_isa_init(isa_bus, MAX_SERIAL_PORTS);
1475 parallel_hds_isa_init(isa_bus, MAX_PARALLEL_PORTS);
1477 a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2);
1478 i8042 = isa_create_simple(isa_bus, "i8042");
1479 i8042_setup_a20_line(i8042, &a20_line[0]);
1480 if (!no_vmport) {
1481 vmport_init(isa_bus);
1482 vmmouse = isa_try_create(isa_bus, "vmmouse");
1483 } else {
1484 vmmouse = NULL;
1486 if (vmmouse) {
1487 DeviceState *dev = DEVICE(vmmouse);
1488 qdev_prop_set_ptr(dev, "ps2_mouse", i8042);
1489 qdev_init_nofail(dev);
1491 port92 = isa_create_simple(isa_bus, "port92");
1492 port92_init(port92, &a20_line[1]);
1494 cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
1495 DMA_init(0, cpu_exit_irq);
1497 for(i = 0; i < MAX_FD; i++) {
1498 fd[i] = drive_get(IF_FLOPPY, 0, i);
1499 create_fdctrl |= !!fd[i];
1501 *floppy = create_fdctrl ? fdctrl_init_isa(isa_bus, fd) : NULL;
1504 void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus)
1506 int i;
1508 for (i = 0; i < nb_nics; i++) {
1509 NICInfo *nd = &nd_table[i];
1511 if (!pci_bus || (nd->model && strcmp(nd->model, "ne2k_isa") == 0)) {
1512 pc_init_ne2k_isa(isa_bus, nd);
1513 } else {
1514 pci_nic_init_nofail(nd, pci_bus, "e1000", NULL);
1519 void pc_pci_device_init(PCIBus *pci_bus)
1521 int max_bus;
1522 int bus;
1524 max_bus = drive_get_max_bus(IF_SCSI);
1525 for (bus = 0; bus <= max_bus; bus++) {
1526 pci_create_simple(pci_bus, -1, "lsi53c895a");
1530 void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name)
1532 DeviceState *dev;
1533 SysBusDevice *d;
1534 unsigned int i;
1536 if (kvm_irqchip_in_kernel()) {
1537 dev = qdev_create(NULL, "kvm-ioapic");
1538 } else {
1539 dev = qdev_create(NULL, "ioapic");
1541 if (parent_name) {
1542 object_property_add_child(object_resolve_path(parent_name, NULL),
1543 "ioapic", OBJECT(dev), NULL);
1545 qdev_init_nofail(dev);
1546 d = SYS_BUS_DEVICE(dev);
1547 sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS);
1549 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
1550 gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i);
1554 static void pc_dimm_plug(HotplugHandler *hotplug_dev,
1555 DeviceState *dev, Error **errp)
1557 int slot;
1558 HotplugHandlerClass *hhc;
1559 Error *local_err = NULL;
1560 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1561 MachineState *machine = MACHINE(hotplug_dev);
1562 PCDIMMDevice *dimm = PC_DIMM(dev);
1563 PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
1564 MemoryRegion *mr = ddc->get_memory_region(dimm);
1565 uint64_t existing_dimms_capacity = 0;
1566 uint64_t align = TARGET_PAGE_SIZE;
1567 uint64_t addr;
1569 addr = object_property_get_int(OBJECT(dimm), PC_DIMM_ADDR_PROP, &local_err);
1570 if (local_err) {
1571 goto out;
1574 if (memory_region_get_alignment(mr) && pcms->enforce_aligned_dimm) {
1575 align = memory_region_get_alignment(mr);
1578 addr = pc_dimm_get_free_addr(pcms->hotplug_memory_base,
1579 memory_region_size(&pcms->hotplug_memory),
1580 !addr ? NULL : &addr, align,
1581 memory_region_size(mr), &local_err);
1582 if (local_err) {
1583 goto out;
1586 existing_dimms_capacity = pc_existing_dimms_capacity(&local_err);
1587 if (local_err) {
1588 goto out;
1591 if (existing_dimms_capacity + memory_region_size(mr) >
1592 machine->maxram_size - machine->ram_size) {
1593 error_setg(&local_err, "not enough space, currently 0x%" PRIx64
1594 " in use of total hot pluggable 0x" RAM_ADDR_FMT,
1595 existing_dimms_capacity,
1596 machine->maxram_size - machine->ram_size);
1597 goto out;
1600 object_property_set_int(OBJECT(dev), addr, PC_DIMM_ADDR_PROP, &local_err);
1601 if (local_err) {
1602 goto out;
1604 trace_mhp_pc_dimm_assigned_address(addr);
1606 slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP, &local_err);
1607 if (local_err) {
1608 goto out;
1611 slot = pc_dimm_get_free_slot(slot == PC_DIMM_UNASSIGNED_SLOT ? NULL : &slot,
1612 machine->ram_slots, &local_err);
1613 if (local_err) {
1614 goto out;
1616 object_property_set_int(OBJECT(dev), slot, PC_DIMM_SLOT_PROP, &local_err);
1617 if (local_err) {
1618 goto out;
1620 trace_mhp_pc_dimm_assigned_slot(slot);
1622 if (!pcms->acpi_dev) {
1623 error_setg(&local_err,
1624 "memory hotplug is not enabled: missing acpi device");
1625 goto out;
1628 if (kvm_enabled() && !kvm_has_free_slot(machine)) {
1629 error_setg(&local_err, "hypervisor has no free memory slots left");
1630 goto out;
1633 memory_region_add_subregion(&pcms->hotplug_memory,
1634 addr - pcms->hotplug_memory_base, mr);
1635 vmstate_register_ram(mr, dev);
1637 hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev);
1638 hhc->plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
1639 out:
1640 error_propagate(errp, local_err);
1643 static void pc_dimm_unplug_request(HotplugHandler *hotplug_dev,
1644 DeviceState *dev, Error **errp)
1646 HotplugHandlerClass *hhc;
1647 Error *local_err = NULL;
1648 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1650 if (!pcms->acpi_dev) {
1651 error_setg(&local_err,
1652 "memory hotplug is not enabled: missing acpi device");
1653 goto out;
1656 hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev);
1657 hhc->unplug_request(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
1659 out:
1660 error_propagate(errp, local_err);
1663 static void pc_dimm_unplug(HotplugHandler *hotplug_dev,
1664 DeviceState *dev, Error **errp)
1666 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1667 PCDIMMDevice *dimm = PC_DIMM(dev);
1668 PCDIMMDeviceClass *ddc = PC_DIMM_GET_CLASS(dimm);
1669 MemoryRegion *mr = ddc->get_memory_region(dimm);
1670 HotplugHandlerClass *hhc;
1671 Error *local_err = NULL;
1673 hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev);
1674 hhc->unplug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
1676 if (local_err) {
1677 goto out;
1680 memory_region_del_subregion(&pcms->hotplug_memory, mr);
1681 vmstate_unregister_ram(mr, dev);
1683 object_unparent(OBJECT(dev));
1685 out:
1686 error_propagate(errp, local_err);
1689 static void pc_cpu_plug(HotplugHandler *hotplug_dev,
1690 DeviceState *dev, Error **errp)
1692 HotplugHandlerClass *hhc;
1693 Error *local_err = NULL;
1694 PCMachineState *pcms = PC_MACHINE(hotplug_dev);
1696 if (!dev->hotplugged) {
1697 goto out;
1700 if (!pcms->acpi_dev) {
1701 error_setg(&local_err,
1702 "cpu hotplug is not enabled: missing acpi device");
1703 goto out;
1706 hhc = HOTPLUG_HANDLER_GET_CLASS(pcms->acpi_dev);
1707 hhc->plug(HOTPLUG_HANDLER(pcms->acpi_dev), dev, &local_err);
1708 if (local_err) {
1709 goto out;
1712 /* increment the number of CPUs */
1713 rtc_set_memory(pcms->rtc, 0x5f, rtc_get_memory(pcms->rtc, 0x5f) + 1);
1714 out:
1715 error_propagate(errp, local_err);
1718 static void pc_machine_device_plug_cb(HotplugHandler *hotplug_dev,
1719 DeviceState *dev, Error **errp)
1721 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
1722 pc_dimm_plug(hotplug_dev, dev, errp);
1723 } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
1724 pc_cpu_plug(hotplug_dev, dev, errp);
1728 static void pc_machine_device_unplug_request_cb(HotplugHandler *hotplug_dev,
1729 DeviceState *dev, Error **errp)
1731 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
1732 pc_dimm_unplug_request(hotplug_dev, dev, errp);
1733 } else {
1734 error_setg(errp, "acpi: device unplug request for not supported device"
1735 " type: %s", object_get_typename(OBJECT(dev)));
1739 static void pc_machine_device_unplug_cb(HotplugHandler *hotplug_dev,
1740 DeviceState *dev, Error **errp)
1742 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
1743 pc_dimm_unplug(hotplug_dev, dev, errp);
1744 } else {
1745 error_setg(errp, "acpi: device unplug for not supported device"
1746 " type: %s", object_get_typename(OBJECT(dev)));
1750 static HotplugHandler *pc_get_hotpug_handler(MachineState *machine,
1751 DeviceState *dev)
1753 PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(machine);
1755 if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) ||
1756 object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
1757 return HOTPLUG_HANDLER(machine);
1760 return pcmc->get_hotplug_handler ?
1761 pcmc->get_hotplug_handler(machine, dev) : NULL;
1764 static void
1765 pc_machine_get_hotplug_memory_region_size(Object *obj, Visitor *v, void *opaque,
1766 const char *name, Error **errp)
1768 PCMachineState *pcms = PC_MACHINE(obj);
1769 int64_t value = memory_region_size(&pcms->hotplug_memory);
1771 visit_type_int(v, &value, name, errp);
1774 static void pc_machine_get_max_ram_below_4g(Object *obj, Visitor *v,
1775 void *opaque, const char *name,
1776 Error **errp)
1778 PCMachineState *pcms = PC_MACHINE(obj);
1779 uint64_t value = pcms->max_ram_below_4g;
1781 visit_type_size(v, &value, name, errp);
1784 static void pc_machine_set_max_ram_below_4g(Object *obj, Visitor *v,
1785 void *opaque, const char *name,
1786 Error **errp)
1788 PCMachineState *pcms = PC_MACHINE(obj);
1789 Error *error = NULL;
1790 uint64_t value;
1792 visit_type_size(v, &value, name, &error);
1793 if (error) {
1794 error_propagate(errp, error);
1795 return;
1797 if (value > (1ULL << 32)) {
1798 error_set(&error, ERROR_CLASS_GENERIC_ERROR,
1799 "Machine option 'max-ram-below-4g=%"PRIu64
1800 "' expects size less than or equal to 4G", value);
1801 error_propagate(errp, error);
1802 return;
1805 if (value < (1ULL << 20)) {
1806 error_report("Warning: small max_ram_below_4g(%"PRIu64
1807 ") less than 1M. BIOS may not work..",
1808 value);
1811 pcms->max_ram_below_4g = value;
1814 static void pc_machine_get_vmport(Object *obj, Visitor *v, void *opaque,
1815 const char *name, Error **errp)
1817 PCMachineState *pcms = PC_MACHINE(obj);
1818 OnOffAuto vmport = pcms->vmport;
1820 visit_type_OnOffAuto(v, &vmport, name, errp);
1823 static void pc_machine_set_vmport(Object *obj, Visitor *v, void *opaque,
1824 const char *name, Error **errp)
1826 PCMachineState *pcms = PC_MACHINE(obj);
1828 visit_type_OnOffAuto(v, &pcms->vmport, name, errp);
1831 static bool pc_machine_get_aligned_dimm(Object *obj, Error **errp)
1833 PCMachineState *pcms = PC_MACHINE(obj);
1835 return pcms->enforce_aligned_dimm;
1838 static void pc_machine_initfn(Object *obj)
1840 PCMachineState *pcms = PC_MACHINE(obj);
1842 object_property_add(obj, PC_MACHINE_MEMHP_REGION_SIZE, "int",
1843 pc_machine_get_hotplug_memory_region_size,
1844 NULL, NULL, NULL, NULL);
1846 pcms->max_ram_below_4g = 1ULL << 32; /* 4G */
1847 object_property_add(obj, PC_MACHINE_MAX_RAM_BELOW_4G, "size",
1848 pc_machine_get_max_ram_below_4g,
1849 pc_machine_set_max_ram_below_4g,
1850 NULL, NULL, NULL);
1851 object_property_set_description(obj, PC_MACHINE_MAX_RAM_BELOW_4G,
1852 "Maximum ram below the 4G boundary (32bit boundary)",
1853 NULL);
1855 pcms->vmport = ON_OFF_AUTO_AUTO;
1856 object_property_add(obj, PC_MACHINE_VMPORT, "OnOffAuto",
1857 pc_machine_get_vmport,
1858 pc_machine_set_vmport,
1859 NULL, NULL, NULL);
1860 object_property_set_description(obj, PC_MACHINE_VMPORT,
1861 "Enable vmport (pc & q35)",
1862 NULL);
1864 pcms->enforce_aligned_dimm = true;
1865 object_property_add_bool(obj, PC_MACHINE_ENFORCE_ALIGNED_DIMM,
1866 pc_machine_get_aligned_dimm,
1867 NULL, NULL);
1870 static unsigned pc_cpu_index_to_socket_id(unsigned cpu_index)
1872 unsigned pkg_id, core_id, smt_id;
1873 x86_topo_ids_from_idx(smp_cores, smp_threads, cpu_index,
1874 &pkg_id, &core_id, &smt_id);
1875 return pkg_id;
1878 static void pc_machine_class_init(ObjectClass *oc, void *data)
1880 MachineClass *mc = MACHINE_CLASS(oc);
1881 PCMachineClass *pcmc = PC_MACHINE_CLASS(oc);
1882 HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
1884 pcmc->get_hotplug_handler = mc->get_hotplug_handler;
1885 mc->get_hotplug_handler = pc_get_hotpug_handler;
1886 mc->cpu_index_to_socket_id = pc_cpu_index_to_socket_id;
1887 hc->plug = pc_machine_device_plug_cb;
1888 hc->unplug_request = pc_machine_device_unplug_request_cb;
1889 hc->unplug = pc_machine_device_unplug_cb;
1892 static const TypeInfo pc_machine_info = {
1893 .name = TYPE_PC_MACHINE,
1894 .parent = TYPE_MACHINE,
1895 .abstract = true,
1896 .instance_size = sizeof(PCMachineState),
1897 .instance_init = pc_machine_initfn,
1898 .class_size = sizeof(PCMachineClass),
1899 .class_init = pc_machine_class_init,
1900 .interfaces = (InterfaceInfo[]) {
1901 { TYPE_HOTPLUG_HANDLER },
1906 static void pc_machine_register_types(void)
1908 type_register_static(&pc_machine_info);
1911 type_init(pc_machine_register_types)