target-i386: Return runnability information on query-cpu-definitions
[qemu.git] / hw / xtensa / sim.c
blob5e94004261ca11b52aacdaef3031d81ba3d3bfcd
1 /*
2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
3 * All rights reserved.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include "qemu/osdep.h"
29 #include "qapi/error.h"
30 #include "qemu-common.h"
31 #include "cpu.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/boards.h"
34 #include "hw/loader.h"
35 #include "elf.h"
36 #include "exec/memory.h"
37 #include "exec/address-spaces.h"
38 #include "qemu/error-report.h"
40 static uint64_t translate_phys_addr(void *opaque, uint64_t addr)
42 XtensaCPU *cpu = opaque;
44 return cpu_get_phys_page_debug(CPU(cpu), addr);
47 static void sim_reset(void *opaque)
49 XtensaCPU *cpu = opaque;
51 cpu_reset(CPU(cpu));
54 static void xtensa_sim_init(MachineState *machine)
56 XtensaCPU *cpu = NULL;
57 CPUXtensaState *env = NULL;
58 MemoryRegion *ram, *rom;
59 ram_addr_t ram_size = machine->ram_size;
60 const char *cpu_model = machine->cpu_model;
61 const char *kernel_filename = machine->kernel_filename;
62 int n;
64 if (!cpu_model) {
65 cpu_model = XTENSA_DEFAULT_CPU_MODEL;
68 for (n = 0; n < smp_cpus; n++) {
69 cpu = cpu_xtensa_init(cpu_model);
70 if (cpu == NULL) {
71 error_report("unable to find CPU definition '%s'",
72 cpu_model);
73 exit(EXIT_FAILURE);
75 env = &cpu->env;
77 env->sregs[PRID] = n;
78 qemu_register_reset(sim_reset, cpu);
79 /* Need MMU initialized prior to ELF loading,
80 * so that ELF gets loaded into virtual addresses
82 sim_reset(cpu);
85 ram = g_malloc(sizeof(*ram));
86 memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size, &error_fatal);
87 vmstate_register_ram_global(ram);
88 memory_region_add_subregion(get_system_memory(), 0, ram);
90 rom = g_malloc(sizeof(*rom));
91 memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000, &error_fatal);
92 vmstate_register_ram_global(rom);
93 memory_region_add_subregion(get_system_memory(), 0xfe000000, rom);
95 if (kernel_filename) {
96 uint64_t elf_entry;
97 uint64_t elf_lowaddr;
98 #ifdef TARGET_WORDS_BIGENDIAN
99 int success = load_elf(kernel_filename, translate_phys_addr, cpu,
100 &elf_entry, &elf_lowaddr, NULL, 1, EM_XTENSA, 0, 0);
101 #else
102 int success = load_elf(kernel_filename, translate_phys_addr, cpu,
103 &elf_entry, &elf_lowaddr, NULL, 0, EM_XTENSA, 0, 0);
104 #endif
105 if (success > 0) {
106 env->pc = elf_entry;
111 static void xtensa_sim_machine_init(MachineClass *mc)
113 mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")";
114 mc->is_default = true;
115 mc->init = xtensa_sim_init;
116 mc->max_cpus = 4;
119 DEFINE_MACHINE("sim", xtensa_sim_machine_init)