hw/mips.h

   1 #ifndef HW_MIPS_H
   2 #define HW_MIPS_H
   3 /* Definitions for mips board emulation.  */
   4
   5 /* gt64xxx.c */
   6 PCIBus *gt64120_register(qemu_irq *pic);
   7
   8 /* bonito.c */
   9 PCIBus *bonito_init(qemu_irq *pic);
  10
  11 /* ds1225y.c */
  12 void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
  13 void ds1225y_set_protection(void *opaque, int protection);
  14
  15 /* g364fb.c */
  16 int g364fb_mm_init(target_phys_addr_t vram_base,
  17                    target_phys_addr_t ctrl_base, int it_shift,
  18                    qemu_irq irq);
  19
  20 /* mipsnet.c */
  21 void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
  22
  23 /* jazz_led.c */
  24 void jazz_led_init(target_phys_addr_t base);
  25
  26 /* rc4030.c */
  27 typedef struct rc4030DMAState *rc4030_dma;
  28 void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
  29 void rc4030_dma_read(void *dma, uint8_t *buf, int len);
  30 void rc4030_dma_write(void *dma, uint8_t *buf, int len);
  31
  32 void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
  33                   qemu_irq **irqs, rc4030_dma **dmas);
  34
  35 /* dp8393x.c */
  36 void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
  37                   qemu_irq irq, void* mem_opaque,
  38                   void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write));
  39
  40 #endif