hw/ppc/spapr_cpu_core.c

   1 /*
   2  * sPAPR CPU core device, acts as container of CPU thread devices.
   3  *
   4  * Copyright (C) 2016 Bharata B Rao <bharata@linux.vnet.ibm.com>
   5  *
   6  * This work is licensed under the terms of the GNU GPL, version 2 or later.
   7  * See the COPYING file in the top-level directory.
   8  */
   9 #include "hw/cpu/core.h"
  10 #include "hw/ppc/spapr_cpu_core.h"
  11 #include "target-ppc/cpu.h"
  12 #include "hw/ppc/spapr.h"
  13 #include "hw/boards.h"
  14 #include "qapi/error.h"
  15 #include "sysemu/cpus.h"
  16 #include "target-ppc/kvm_ppc.h"
  17 #include "hw/ppc/ppc.h"
  18 #include "target-ppc/mmu-hash64.h"
  19 #include "sysemu/numa.h"
  20
  21 static void spapr_cpu_reset(void *opaque)
  22 {
  23     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
  24     PowerPCCPU *cpu = opaque;
  25     CPUState *cs = CPU(cpu);
  26     CPUPPCState *env = &cpu->env;
  27
  28     cpu_reset(cs);
  29
  30     /* All CPUs start halted.  CPU0 is unhalted from the machine level
  31      * reset code and the rest are explicitly started up by the guest
  32      * using an RTAS call */
  33     cs->halted = 1;
  34
  35     env->spr[SPR_HIOR] = 0;
  36
  37     ppc_hash64_set_external_hpt(cpu, spapr->htab, spapr->htab_shift,
  38                                 &error_fatal);
  39 }
  40
  41 static void spapr_cpu_destroy(PowerPCCPU *cpu)
  42 {
  43     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
  44
  45     xics_cpu_destroy(spapr->xics, cpu);
  46     qemu_unregister_reset(spapr_cpu_reset, cpu);
  47 }
  48
  49 void spapr_cpu_init(sPAPRMachineState *spapr, PowerPCCPU *cpu, Error **errp)
  50 {
  51     CPUPPCState *env = &cpu->env;
  52     CPUState *cs = CPU(cpu);
  53     int i;
  54
  55     /* Set time-base frequency to 512 MHz */
  56     cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ);
  57
  58     /* Enable PAPR mode in TCG or KVM */
  59     cpu_ppc_set_papr(cpu);
  60
  61     if (cpu->max_compat) {
  62         Error *local_err = NULL;
  63
  64         ppc_set_compat(cpu, cpu->max_compat, &local_err);
  65         if (local_err) {
  66             error_propagate(errp, local_err);
  67             return;
  68         }
  69     }
  70
  71     /* Set NUMA node for the added CPUs  */
  72     for (i = 0; i < nb_numa_nodes; i++) {
  73         if (test_bit(cs->cpu_index, numa_info[i].node_cpu)) {
  74             cs->numa_node = i;
  75             break;
  76         }
  77     }
  78
  79     xics_cpu_setup(spapr->xics, cpu);
  80
  81     qemu_register_reset(spapr_cpu_reset, cpu);
  82     spapr_cpu_reset(cpu);
  83 }
  84
  85 /*
  86  * Return the sPAPR CPU core type for @model which essentially is the CPU
  87  * model specified with -cpu cmdline option.
  88  */
  89 char *spapr_get_cpu_core_type(const char *model)
  90 {
  91     char *core_type;
  92     gchar **model_pieces = g_strsplit(model, ",", 2);
  93
  94     core_type = g_strdup_printf("%s-%s", model_pieces[0], TYPE_SPAPR_CPU_CORE);
  95     g_strfreev(model_pieces);
  96     return core_type;
  97 }
  98
  99 static void spapr_core_release(DeviceState *dev, void *opaque)
 100 {
 101     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
 102     const char *typename = object_class_get_name(sc->cpu_class);
 103     size_t size = object_type_get_instance_size(typename);
 104     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
 105     CPUCore *cc = CPU_CORE(dev);
 106     int i;
 107
 108     for (i = 0; i < cc->nr_threads; i++) {
 109         void *obj = sc->threads + i * size;
 110         DeviceState *dev = DEVICE(obj);
 111         CPUState *cs = CPU(dev);
 112         PowerPCCPU *cpu = POWERPC_CPU(cs);
 113
 114         spapr_cpu_destroy(cpu);
 115         cpu_remove_sync(cs);
 116         object_unparent(obj);
 117     }
 118
 119     spapr->cores[cc->core_id / smp_threads] = NULL;
 120
 121     g_free(sc->threads);
 122     object_unparent(OBJECT(dev));
 123 }
 124
 125 void spapr_core_unplug(HotplugHandler *hotplug_dev, DeviceState *dev,
 126                        Error **errp)
 127 {
 128     sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
 129     CPUCore *cc = CPU_CORE(dev);
 130     int smt = kvmppc_smt_threads();
 131     int index = cc->core_id / smp_threads;
 132     sPAPRDRConnector *drc =
 133         spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
 134     sPAPRDRConnectorClass *drck;
 135     Error *local_err = NULL;
 136     int spapr_max_cores = max_cpus / smp_threads;
 137     int i;
 138
 139     for (i = spapr_max_cores - 1; i > index; i--) {
 140         if (spapr->cores[i]) {
 141             error_setg(errp, "core-id %d should be removed first",
 142                        i * smp_threads);
 143             return;
 144         }
 145     }
 146     g_assert(drc);
 147
 148     drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
 149     drck->detach(drc, dev, spapr_core_release, NULL, &local_err);
 150     if (local_err) {
 151         error_propagate(errp, local_err);
 152         return;
 153     }
 154
 155     spapr_hotplug_req_remove_by_index(drc);
 156 }
 157
 158 void spapr_core_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
 159                      Error **errp)
 160 {
 161     sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(OBJECT(hotplug_dev));
 162     sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
 163     sPAPRCPUCore *core = SPAPR_CPU_CORE(OBJECT(dev));
 164     CPUCore *cc = CPU_CORE(dev);
 165     CPUState *cs = CPU(core->threads);
 166     sPAPRDRConnector *drc;
 167     sPAPRDRConnectorClass *drck;
 168     Error *local_err = NULL;
 169     void *fdt = NULL;
 170     int fdt_offset = 0;
 171     int index = cc->core_id / smp_threads;
 172     int smt = kvmppc_smt_threads();
 173
 174     drc = spapr_dr_connector_by_id(SPAPR_DR_CONNECTOR_TYPE_CPU, index * smt);
 175     spapr->cores[index] = OBJECT(dev);
 176
 177     if (!smc->dr_cpu_enabled) {
 178         /*
 179          * This is a cold plugged CPU core but the machine doesn't support
 180          * DR. So skip the hotplug path ensuring that the core is brought
 181          * up online with out an associated DR connector.
 182          */
 183         return;
 184     }
 185
 186     g_assert(drc);
 187
 188     /*
 189      * Setup CPU DT entries only for hotplugged CPUs. For boot time or
 190      * coldplugged CPUs DT entries are setup in spapr_finalize_fdt().
 191      */
 192     if (dev->hotplugged) {
 193         fdt = spapr_populate_hotplug_cpu_dt(cs, &fdt_offset, spapr);
 194     }
 195
 196     drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
 197     drck->attach(drc, dev, fdt, fdt_offset, !dev->hotplugged, &local_err);
 198     if (local_err) {
 199         g_free(fdt);
 200         spapr->cores[index] = NULL;
 201         error_propagate(errp, local_err);
 202         return;
 203     }
 204
 205     if (dev->hotplugged) {
 206         /*
 207          * Send hotplug notification interrupt to the guest only in case
 208          * of hotplugged CPUs.
 209          */
 210         spapr_hotplug_req_add_by_index(drc);
 211     } else {
 212         /*
 213          * Set the right DRC states for cold plugged CPU.
 214          */
 215         drck->set_allocation_state(drc, SPAPR_DR_ALLOCATION_STATE_USABLE);
 216         drck->set_isolation_state(drc, SPAPR_DR_ISOLATION_STATE_UNISOLATED);
 217     }
 218 }
 219
 220 void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *dev,
 221                          Error **errp)
 222 {
 223     MachineState *machine = MACHINE(OBJECT(hotplug_dev));
 224     sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(OBJECT(hotplug_dev));
 225     sPAPRMachineState *spapr = SPAPR_MACHINE(OBJECT(hotplug_dev));
 226     int spapr_max_cores = max_cpus / smp_threads;
 227     int index, i;
 228     Error *local_err = NULL;
 229     CPUCore *cc = CPU_CORE(dev);
 230     char *base_core_type = spapr_get_cpu_core_type(machine->cpu_model);
 231     const char *type = object_get_typename(OBJECT(dev));
 232
 233     if (strcmp(base_core_type, type)) {
 234         error_setg(&local_err, "CPU core type should be %s", base_core_type);
 235         goto out;
 236     }
 237
 238     if (!smc->dr_cpu_enabled && dev->hotplugged) {
 239         error_setg(&local_err, "CPU hotplug not supported for this machine");
 240         goto out;
 241     }
 242
 243     if (cc->nr_threads != smp_threads) {
 244         error_setg(&local_err, "threads must be %d", smp_threads);
 245         goto out;
 246     }
 247
 248     if (cc->core_id % smp_threads) {
 249         error_setg(&local_err, "invalid core id %d\n", cc->core_id);
 250         goto out;
 251     }
 252
 253     index = cc->core_id / smp_threads;
 254     if (index < 0 || index >= spapr_max_cores) {
 255         error_setg(&local_err, "core id %d out of range", cc->core_id);
 256         goto out;
 257     }
 258
 259     if (spapr->cores[index]) {
 260         error_setg(&local_err, "core %d already populated", cc->core_id);
 261         goto out;
 262     }
 263
 264     for (i = 0; i < index; i++) {
 265         if (!spapr->cores[i]) {
 266             error_setg(&local_err, "core-id %d should be added first",
 267                        i * smp_threads);
 268             goto out;
 269         }
 270     }
 271
 272 out:
 273     g_free(base_core_type);
 274     error_propagate(errp, local_err);
 275 }
 276
 277 static void spapr_cpu_core_realize_child(Object *child, Error **errp)
 278 {
 279     Error *local_err = NULL;
 280     sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
 281     CPUState *cs = CPU(child);
 282     PowerPCCPU *cpu = POWERPC_CPU(cs);
 283
 284     object_property_set_bool(child, true, "realized", &local_err);
 285     if (local_err) {
 286         error_propagate(errp, local_err);
 287         return;
 288     }
 289
 290     spapr_cpu_init(spapr, cpu, &local_err);
 291     if (local_err) {
 292         error_propagate(errp, local_err);
 293         return;
 294     }
 295 }
 296
 297 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp)
 298 {
 299     sPAPRCPUCore *sc = SPAPR_CPU_CORE(OBJECT(dev));
 300     CPUCore *cc = CPU_CORE(OBJECT(dev));
 301     const char *typename = object_class_get_name(sc->cpu_class);
 302     size_t size = object_type_get_instance_size(typename);
 303     Error *local_err = NULL;
 304     void *obj;
 305     int i, j;
 306
 307     sc->threads = g_malloc0(size * cc->nr_threads);
 308     for (i = 0; i < cc->nr_threads; i++) {
 309         char id[32];
 310         obj = sc->threads + i * size;
 311
 312         object_initialize(obj, size, typename);
 313         snprintf(id, sizeof(id), "thread[%d]", i);
 314         object_property_add_child(OBJECT(sc), id, obj, &local_err);
 315         if (local_err) {
 316             goto err;
 317         }
 318         object_unref(obj);
 319     }
 320
 321     for (j = 0; j < cc->nr_threads; j++) {
 322         obj = sc->threads + j * size;
 323
 324         spapr_cpu_core_realize_child(obj, &local_err);
 325         if (local_err) {
 326             goto err;
 327         }
 328     }
 329     return;
 330
 331 err:
 332     while (--i >= 0) {
 333         obj = sc->threads + i * size;
 334         object_unparent(obj);
 335     }
 336     g_free(sc->threads);
 337     error_propagate(errp, local_err);
 338 }
 339
 340 static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
 341 {
 342     DeviceClass *dc = DEVICE_CLASS(oc);
 343     dc->realize = spapr_cpu_core_realize;
 344 }
 345
 346 /*
 347  * instance_init routines from different flavours of sPAPR CPU cores.
 348  */
 349 #define SPAPR_CPU_CORE_INITFN(_type, _fname) \
 350 static void glue(glue(spapr_cpu_core_, _fname), _initfn(Object *obj)) \
 351 { \
 352     sPAPRCPUCore *core = SPAPR_CPU_CORE(obj); \
 353     char *name = g_strdup_printf("%s-" TYPE_POWERPC_CPU, stringify(_type)); \
 354     ObjectClass *oc = object_class_by_name(name); \
 355     g_assert(oc); \
 356     g_free((void *)name); \
 357     core->cpu_class = oc; \
 358 }
 359
 360 SPAPR_CPU_CORE_INITFN(970mp_v1.0, 970MP_v10);
 361 SPAPR_CPU_CORE_INITFN(970mp_v1.1, 970MP_v11);
 362 SPAPR_CPU_CORE_INITFN(970_v2.2, 970);
 363 SPAPR_CPU_CORE_INITFN(POWER5+_v2.1, POWER5plus);
 364 SPAPR_CPU_CORE_INITFN(POWER7_v2.3, POWER7);
 365 SPAPR_CPU_CORE_INITFN(POWER7+_v2.1, POWER7plus);
 366 SPAPR_CPU_CORE_INITFN(POWER8_v2.0, POWER8);
 367 SPAPR_CPU_CORE_INITFN(POWER8E_v2.1, POWER8E);
 368 SPAPR_CPU_CORE_INITFN(POWER8NVL_v1.0, POWER8NVL);
 369
 370 typedef struct SPAPRCoreInfo {
 371     const char *name;
 372     void (*initfn)(Object *obj);
 373 } SPAPRCoreInfo;
 374
 375 static const SPAPRCoreInfo spapr_cores[] = {
 376     /* 970 and aliaes */
 377     { .name = "970_v2.2", .initfn = spapr_cpu_core_970_initfn },
 378     { .name = "970", .initfn = spapr_cpu_core_970_initfn },
 379
 380     /* 970MP variants and aliases */
 381     { .name = "970MP_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn },
 382     { .name = "970mp_v1.0", .initfn = spapr_cpu_core_970MP_v10_initfn },
 383     { .name = "970MP_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn },
 384     { .name = "970mp_v1.1", .initfn = spapr_cpu_core_970MP_v11_initfn },
 385     { .name = "970mp", .initfn = spapr_cpu_core_970MP_v11_initfn },
 386
 387     /* POWER5 and aliases */
 388     { .name = "POWER5+_v2.1", .initfn = spapr_cpu_core_POWER5plus_initfn },
 389     { .name = "POWER5+", .initfn = spapr_cpu_core_POWER5plus_initfn },
 390
 391     /* POWER7 and aliases */
 392     { .name = "POWER7_v2.3", .initfn = spapr_cpu_core_POWER7_initfn },
 393     { .name = "POWER7", .initfn = spapr_cpu_core_POWER7_initfn },
 394
 395     /* POWER7+ and aliases */
 396     { .name = "POWER7+_v2.1", .initfn = spapr_cpu_core_POWER7plus_initfn },
 397     { .name = "POWER7+", .initfn = spapr_cpu_core_POWER7plus_initfn },
 398
 399     /* POWER8 and aliases */
 400     { .name = "POWER8_v2.0", .initfn = spapr_cpu_core_POWER8_initfn },
 401     { .name = "POWER8", .initfn = spapr_cpu_core_POWER8_initfn },
 402     { .name = "power8", .initfn = spapr_cpu_core_POWER8_initfn },
 403
 404     /* POWER8E and aliases */
 405     { .name = "POWER8E_v2.1", .initfn = spapr_cpu_core_POWER8E_initfn },
 406     { .name = "POWER8E", .initfn = spapr_cpu_core_POWER8E_initfn },
 407
 408     /* POWER8NVL and aliases */
 409     { .name = "POWER8NVL_v1.0", .initfn = spapr_cpu_core_POWER8NVL_initfn },
 410     { .name = "POWER8NVL", .initfn = spapr_cpu_core_POWER8NVL_initfn },
 411
 412     { .name = NULL }
 413 };
 414
 415 static void spapr_cpu_core_register(const SPAPRCoreInfo *info)
 416 {
 417     TypeInfo type_info = {
 418         .parent = TYPE_SPAPR_CPU_CORE,
 419         .instance_size = sizeof(sPAPRCPUCore),
 420         .instance_init = info->initfn,
 421     };
 422
 423     type_info.name = g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, info->name);
 424     type_register(&type_info);
 425     g_free((void *)type_info.name);
 426 }
 427
 428 static const TypeInfo spapr_cpu_core_type_info = {
 429     .name = TYPE_SPAPR_CPU_CORE,
 430     .parent = TYPE_CPU_CORE,
 431     .abstract = true,
 432     .instance_size = sizeof(sPAPRCPUCore),
 433     .class_init = spapr_cpu_core_class_init,
 434 };
 435
 436 static void spapr_cpu_core_register_types(void)
 437 {
 438     const SPAPRCoreInfo *info = spapr_cores;
 439
 440     type_register_static(&spapr_cpu_core_type_info);
 441     while (info->name) {
 442         spapr_cpu_core_register(info);
 443         info++;
 444     }
 445 }
 446
 447 type_init(spapr_cpu_core_register_types)