target-sh4/op_helper.c

   1 /*
   2  *  SH4 emulation
   3  *
   4  *  Copyright (c) 2005 Samuel Tardieu
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU Lesser General Public
  17  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include <assert.h>
  20 #include <stdlib.h>
  21 #include "cpu.h"
  22 #include "dyngen-exec.h"
  23 #include "helper.h"
  24
  25 static void cpu_restore_state_from_retaddr(void *retaddr)
  26 {
  27     TranslationBlock *tb;
  28     unsigned long pc;
  29
  30     if (retaddr) {
  31         pc = (unsigned long) retaddr;
  32         tb = tb_find_pc(pc);
  33         if (tb) {
  34             /* the PC is inside the translated code. It means that we have
  35                a virtual CPU fault */
  36             cpu_restore_state(tb, env, pc);
  37         }
  38     }
  39 }
  40
  41 #ifndef CONFIG_USER_ONLY
  42 #include "softmmu_exec.h"
  43
  44 #define MMUSUFFIX _mmu
  45
  46 #define SHIFT 0
  47 #include "softmmu_template.h"
  48
  49 #define SHIFT 1
  50 #include "softmmu_template.h"
  51
  52 #define SHIFT 2
  53 #include "softmmu_template.h"
  54
  55 #define SHIFT 3
  56 #include "softmmu_template.h"
  57
  58 void tlb_fill(target_ulong addr, int is_write, int mmu_idx, void *retaddr)
  59 {
  60     CPUState *saved_env;
  61     int ret;
  62
  63     /* XXX: hack to restore env in all cases, even if not called from
  64        generated code */
  65     saved_env = env;
  66     env = cpu_single_env;
  67     ret = cpu_sh4_handle_mmu_fault(env, addr, is_write, mmu_idx, 1);
  68     if (ret) {
  69         /* now we have a real cpu fault */
  70         cpu_restore_state_from_retaddr(retaddr);
  71         cpu_loop_exit(env);
  72     }
  73     env = saved_env;
  74 }
  75
  76 #endif
  77
  78 void helper_ldtlb(void)
  79 {
  80 #ifdef CONFIG_USER_ONLY
  81     /* XXXXX */
  82     cpu_abort(env, "Unhandled ldtlb");
  83 #else
  84     cpu_load_tlb(env);
  85 #endif
  86 }
  87
  88 static inline void raise_exception(int index, void *retaddr)
  89 {
  90     env->exception_index = index;
  91     cpu_restore_state_from_retaddr(retaddr);
  92     cpu_loop_exit(env);
  93 }
  94
  95 void helper_raise_illegal_instruction(void)
  96 {
  97     raise_exception(0x180, GETPC());
  98 }
  99
 100 void helper_raise_slot_illegal_instruction(void)
 101 {
 102     raise_exception(0x1a0, GETPC());
 103 }
 104
 105 void helper_raise_fpu_disable(void)
 106 {
 107     raise_exception(0x800, GETPC());
 108 }
 109
 110 void helper_raise_slot_fpu_disable(void)
 111 {
 112     raise_exception(0x820, GETPC());
 113 }
 114
 115 void helper_debug(void)
 116 {
 117     env->exception_index = EXCP_DEBUG;
 118     cpu_loop_exit(env);
 119 }
 120
 121 void helper_sleep(uint32_t next_pc)
 122 {
 123     env->halted = 1;
 124     env->in_sleep = 1;
 125     env->exception_index = EXCP_HLT;
 126     env->pc = next_pc;
 127     cpu_loop_exit(env);
 128 }
 129
 130 void helper_trapa(uint32_t tra)
 131 {
 132     env->tra = tra << 2;
 133     raise_exception(0x160, GETPC());
 134 }
 135
 136 void helper_movcal(uint32_t address, uint32_t value)
 137 {
 138     if (cpu_sh4_is_cached (env, address))
 139     {
 140         memory_content *r = malloc (sizeof(memory_content));
 141         r->address = address;
 142         r->value = value;
 143         r->next = NULL;
 144
 145         *(env->movcal_backup_tail) = r;
 146         env->movcal_backup_tail = &(r->next);
 147     }
 148 }
 149
 150 void helper_discard_movcal_backup(void)
 151 {
 152     memory_content *current = env->movcal_backup;
 153
 154     while(current)
 155     {
 156         memory_content *next = current->next;
 157         free (current);
 158         env->movcal_backup = current = next;
 159         if (current == NULL)
 160             env->movcal_backup_tail = &(env->movcal_backup);
 161     }
 162 }
 163
 164 void helper_ocbi(uint32_t address)
 165 {
 166     memory_content **current = &(env->movcal_backup);
 167     while (*current)
 168     {
 169         uint32_t a = (*current)->address;
 170         if ((a & ~0x1F) == (address & ~0x1F))
 171         {
 172             memory_content *next = (*current)->next;
 173             stl(a, (*current)->value);
 174
 175             if (next == NULL)
 176             {
 177                 env->movcal_backup_tail = current;
 178             }
 179
 180             free (*current);
 181             *current = next;
 182             break;
 183         }
 184     }
 185 }
 186
 187 uint32_t helper_addc(uint32_t arg0, uint32_t arg1)
 188 {
 189     uint32_t tmp0, tmp1;
 190
 191     tmp1 = arg0 + arg1;
 192     tmp0 = arg1;
 193     arg1 = tmp1 + (env->sr & 1);
 194     if (tmp0 > tmp1)
 195         env->sr |= SR_T;
 196     else
 197         env->sr &= ~SR_T;
 198     if (tmp1 > arg1)
 199         env->sr |= SR_T;
 200     return arg1;
 201 }
 202
 203 uint32_t helper_addv(uint32_t arg0, uint32_t arg1)
 204 {
 205     uint32_t dest, src, ans;
 206
 207     if ((int32_t) arg1 >= 0)
 208         dest = 0;
 209     else
 210         dest = 1;
 211     if ((int32_t) arg0 >= 0)
 212         src = 0;
 213     else
 214         src = 1;
 215     src += dest;
 216     arg1 += arg0;
 217     if ((int32_t) arg1 >= 0)
 218         ans = 0;
 219     else
 220         ans = 1;
 221     ans += dest;
 222     if (src == 0 || src == 2) {
 223         if (ans == 1)
 224             env->sr |= SR_T;
 225         else
 226             env->sr &= ~SR_T;
 227     } else
 228         env->sr &= ~SR_T;
 229     return arg1;
 230 }
 231
 232 #define T (env->sr & SR_T)
 233 #define Q (env->sr & SR_Q ? 1 : 0)
 234 #define M (env->sr & SR_M ? 1 : 0)
 235 #define SETT env->sr |= SR_T
 236 #define CLRT env->sr &= ~SR_T
 237 #define SETQ env->sr |= SR_Q
 238 #define CLRQ env->sr &= ~SR_Q
 239 #define SETM env->sr |= SR_M
 240 #define CLRM env->sr &= ~SR_M
 241
 242 uint32_t helper_div1(uint32_t arg0, uint32_t arg1)
 243 {
 244     uint32_t tmp0, tmp2;
 245     uint8_t old_q, tmp1 = 0xff;
 246
 247     //printf("div1 arg0=0x%08x arg1=0x%08x M=%d Q=%d T=%d\n", arg0, arg1, M, Q, T);
 248     old_q = Q;
 249     if ((0x80000000 & arg1) != 0)
 250         SETQ;
 251     else
 252         CLRQ;
 253     tmp2 = arg0;
 254     arg1 <<= 1;
 255     arg1 |= T;
 256     switch (old_q) {
 257     case 0:
 258         switch (M) {
 259         case 0:
 260             tmp0 = arg1;
 261             arg1 -= tmp2;
 262             tmp1 = arg1 > tmp0;
 263             switch (Q) {
 264             case 0:
 265                 if (tmp1)
 266                     SETQ;
 267                 else
 268                     CLRQ;
 269                 break;
 270             case 1:
 271                 if (tmp1 == 0)
 272                     SETQ;
 273                 else
 274                     CLRQ;
 275                 break;
 276             }
 277             break;
 278         case 1:
 279             tmp0 = arg1;
 280             arg1 += tmp2;
 281             tmp1 = arg1 < tmp0;
 282             switch (Q) {
 283             case 0:
 284                 if (tmp1 == 0)
 285                     SETQ;
 286                 else
 287                     CLRQ;
 288                 break;
 289             case 1:
 290                 if (tmp1)
 291                     SETQ;
 292                 else
 293                     CLRQ;
 294                 break;
 295             }
 296             break;
 297         }
 298         break;
 299     case 1:
 300         switch (M) {
 301         case 0:
 302             tmp0 = arg1;
 303             arg1 += tmp2;
 304             tmp1 = arg1 < tmp0;
 305             switch (Q) {
 306             case 0:
 307                 if (tmp1)
 308                     SETQ;
 309                 else
 310                     CLRQ;
 311                 break;
 312             case 1:
 313                 if (tmp1 == 0)
 314                     SETQ;
 315                 else
 316                     CLRQ;
 317                 break;
 318             }
 319             break;
 320         case 1:
 321             tmp0 = arg1;
 322             arg1 -= tmp2;
 323             tmp1 = arg1 > tmp0;
 324             switch (Q) {
 325             case 0:
 326                 if (tmp1 == 0)
 327                     SETQ;
 328                 else
 329                     CLRQ;
 330                 break;
 331             case 1:
 332                 if (tmp1)
 333                     SETQ;
 334                 else
 335                     CLRQ;
 336                 break;
 337             }
 338             break;
 339         }
 340         break;
 341     }
 342     if (Q == M)
 343         SETT;
 344     else
 345         CLRT;
 346     //printf("Output: arg1=0x%08x M=%d Q=%d T=%d\n", arg1, M, Q, T);
 347     return arg1;
 348 }
 349
 350 void helper_macl(uint32_t arg0, uint32_t arg1)
 351 {
 352     int64_t res;
 353
 354     res = ((uint64_t) env->mach << 32) | env->macl;
 355     res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1;
 356     env->mach = (res >> 32) & 0xffffffff;
 357     env->macl = res & 0xffffffff;
 358     if (env->sr & SR_S) {
 359         if (res < 0)
 360             env->mach |= 0xffff0000;
 361         else
 362             env->mach &= 0x00007fff;
 363     }
 364 }
 365
 366 void helper_macw(uint32_t arg0, uint32_t arg1)
 367 {
 368     int64_t res;
 369
 370     res = ((uint64_t) env->mach << 32) | env->macl;
 371     res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1;
 372     env->mach = (res >> 32) & 0xffffffff;
 373     env->macl = res & 0xffffffff;
 374     if (env->sr & SR_S) {
 375         if (res < -0x80000000) {
 376             env->mach = 1;
 377             env->macl = 0x80000000;
 378         } else if (res > 0x000000007fffffff) {
 379             env->mach = 1;
 380             env->macl = 0x7fffffff;
 381         }
 382     }
 383 }
 384
 385 uint32_t helper_subc(uint32_t arg0, uint32_t arg1)
 386 {
 387     uint32_t tmp0, tmp1;
 388
 389     tmp1 = arg1 - arg0;
 390     tmp0 = arg1;
 391     arg1 = tmp1 - (env->sr & SR_T);
 392     if (tmp0 < tmp1)
 393         env->sr |= SR_T;
 394     else
 395         env->sr &= ~SR_T;
 396     if (tmp1 < arg1)
 397         env->sr |= SR_T;
 398     return arg1;
 399 }
 400
 401 uint32_t helper_subv(uint32_t arg0, uint32_t arg1)
 402 {
 403     int32_t dest, src, ans;
 404
 405     if ((int32_t) arg1 >= 0)
 406         dest = 0;
 407     else
 408         dest = 1;
 409     if ((int32_t) arg0 >= 0)
 410         src = 0;
 411     else
 412         src = 1;
 413     src += dest;
 414     arg1 -= arg0;
 415     if ((int32_t) arg1 >= 0)
 416         ans = 0;
 417     else
 418         ans = 1;
 419     ans += dest;
 420     if (src == 1) {
 421         if (ans == 1)
 422             env->sr |= SR_T;
 423         else
 424             env->sr &= ~SR_T;
 425     } else
 426         env->sr &= ~SR_T;
 427     return arg1;
 428 }
 429
 430 static inline void set_t(void)
 431 {
 432     env->sr |= SR_T;
 433 }
 434
 435 static inline void clr_t(void)
 436 {
 437     env->sr &= ~SR_T;
 438 }
 439
 440 void helper_ld_fpscr(uint32_t val)
 441 {
 442     env->fpscr = val & FPSCR_MASK;
 443     if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) {
 444         set_float_rounding_mode(float_round_to_zero, &env->fp_status);
 445     } else {
 446         set_float_rounding_mode(float_round_nearest_even, &env->fp_status);
 447     }
 448     set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status);
 449 }
 450
 451 static void update_fpscr(void *retaddr)
 452 {
 453     int xcpt, cause, enable;
 454
 455     xcpt = get_float_exception_flags(&env->fp_status);
 456
 457     /* Clear the flag entries */
 458     env->fpscr &= ~FPSCR_FLAG_MASK;
 459
 460     if (unlikely(xcpt)) {
 461         if (xcpt & float_flag_invalid) {
 462             env->fpscr |= FPSCR_FLAG_V;
 463         }
 464         if (xcpt & float_flag_divbyzero) {
 465             env->fpscr |= FPSCR_FLAG_Z;
 466         }
 467         if (xcpt & float_flag_overflow) {
 468             env->fpscr |= FPSCR_FLAG_O;
 469         }
 470         if (xcpt & float_flag_underflow) {
 471             env->fpscr |= FPSCR_FLAG_U;
 472         }
 473         if (xcpt & float_flag_inexact) {
 474             env->fpscr |= FPSCR_FLAG_I;
 475         }
 476
 477         /* Accumulate in cause entries */
 478         env->fpscr |= (env->fpscr & FPSCR_FLAG_MASK)
 479                       << (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT);
 480
 481         /* Generate an exception if enabled */
 482         cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT;
 483         enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT;
 484         if (cause & enable) {
 485             cpu_restore_state_from_retaddr(retaddr);
 486             env->exception_index = 0x120;
 487             cpu_loop_exit(env);
 488         }
 489     }
 490 }
 491
 492 float32 helper_fabs_FT(float32 t0)
 493 {
 494     return float32_abs(t0);
 495 }
 496
 497 float64 helper_fabs_DT(float64 t0)
 498 {
 499     return float64_abs(t0);
 500 }
 501
 502 float32 helper_fadd_FT(float32 t0, float32 t1)
 503 {
 504     set_float_exception_flags(0, &env->fp_status);
 505     t0 = float32_add(t0, t1, &env->fp_status);
 506     update_fpscr(GETPC());
 507     return t0;
 508 }
 509
 510 float64 helper_fadd_DT(float64 t0, float64 t1)
 511 {
 512     set_float_exception_flags(0, &env->fp_status);
 513     t0 = float64_add(t0, t1, &env->fp_status);
 514     update_fpscr(GETPC());
 515     return t0;
 516 }
 517
 518 void helper_fcmp_eq_FT(float32 t0, float32 t1)
 519 {
 520     int relation;
 521
 522     set_float_exception_flags(0, &env->fp_status);
 523     relation = float32_compare(t0, t1, &env->fp_status);
 524     if (unlikely(relation == float_relation_unordered)) {
 525         update_fpscr(GETPC());
 526     } else if (relation == float_relation_equal) {
 527         set_t();
 528     } else {
 529         clr_t();
 530     }
 531 }
 532
 533 void helper_fcmp_eq_DT(float64 t0, float64 t1)
 534 {
 535     int relation;
 536
 537     set_float_exception_flags(0, &env->fp_status);
 538     relation = float64_compare(t0, t1, &env->fp_status);
 539     if (unlikely(relation == float_relation_unordered)) {
 540         update_fpscr(GETPC());
 541     } else if (relation == float_relation_equal) {
 542         set_t();
 543     } else {
 544         clr_t();
 545     }
 546 }
 547
 548 void helper_fcmp_gt_FT(float32 t0, float32 t1)
 549 {
 550     int relation;
 551
 552     set_float_exception_flags(0, &env->fp_status);
 553     relation = float32_compare(t0, t1, &env->fp_status);
 554     if (unlikely(relation == float_relation_unordered)) {
 555         update_fpscr(GETPC());
 556     } else if (relation == float_relation_greater) {
 557         set_t();
 558     } else {
 559         clr_t();
 560     }
 561 }
 562
 563 void helper_fcmp_gt_DT(float64 t0, float64 t1)
 564 {
 565     int relation;
 566
 567     set_float_exception_flags(0, &env->fp_status);
 568     relation = float64_compare(t0, t1, &env->fp_status);
 569     if (unlikely(relation == float_relation_unordered)) {
 570         update_fpscr(GETPC());
 571     } else if (relation == float_relation_greater) {
 572         set_t();
 573     } else {
 574         clr_t();
 575     }
 576 }
 577
 578 float64 helper_fcnvsd_FT_DT(float32 t0)
 579 {
 580     float64 ret;
 581     set_float_exception_flags(0, &env->fp_status);
 582     ret = float32_to_float64(t0, &env->fp_status);
 583     update_fpscr(GETPC());
 584     return ret;
 585 }
 586
 587 float32 helper_fcnvds_DT_FT(float64 t0)
 588 {
 589     float32 ret;
 590     set_float_exception_flags(0, &env->fp_status);
 591     ret = float64_to_float32(t0, &env->fp_status);
 592     update_fpscr(GETPC());
 593     return ret;
 594 }
 595
 596 float32 helper_fdiv_FT(float32 t0, float32 t1)
 597 {
 598     set_float_exception_flags(0, &env->fp_status);
 599     t0 = float32_div(t0, t1, &env->fp_status);
 600     update_fpscr(GETPC());
 601     return t0;
 602 }
 603
 604 float64 helper_fdiv_DT(float64 t0, float64 t1)
 605 {
 606     set_float_exception_flags(0, &env->fp_status);
 607     t0 = float64_div(t0, t1, &env->fp_status);
 608     update_fpscr(GETPC());
 609     return t0;
 610 }
 611
 612 float32 helper_float_FT(uint32_t t0)
 613 {
 614     float32 ret;
 615     set_float_exception_flags(0, &env->fp_status);
 616     ret = int32_to_float32(t0, &env->fp_status);
 617     update_fpscr(GETPC());
 618     return ret;
 619 }
 620
 621 float64 helper_float_DT(uint32_t t0)
 622 {
 623     float64 ret;
 624     set_float_exception_flags(0, &env->fp_status);
 625     ret = int32_to_float64(t0, &env->fp_status);
 626     update_fpscr(GETPC());
 627     return ret;
 628 }
 629
 630 float32 helper_fmac_FT(float32 t0, float32 t1, float32 t2)
 631 {
 632     set_float_exception_flags(0, &env->fp_status);
 633     t0 = float32_mul(t0, t1, &env->fp_status);
 634     t0 = float32_add(t0, t2, &env->fp_status);
 635     update_fpscr(GETPC());
 636     return t0;
 637 }
 638
 639 float32 helper_fmul_FT(float32 t0, float32 t1)
 640 {
 641     set_float_exception_flags(0, &env->fp_status);
 642     t0 = float32_mul(t0, t1, &env->fp_status);
 643     update_fpscr(GETPC());
 644     return t0;
 645 }
 646
 647 float64 helper_fmul_DT(float64 t0, float64 t1)
 648 {
 649     set_float_exception_flags(0, &env->fp_status);
 650     t0 = float64_mul(t0, t1, &env->fp_status);
 651     update_fpscr(GETPC());
 652     return t0;
 653 }
 654
 655 float32 helper_fneg_T(float32 t0)
 656 {
 657     return float32_chs(t0);
 658 }
 659
 660 float32 helper_fsqrt_FT(float32 t0)
 661 {
 662     set_float_exception_flags(0, &env->fp_status);
 663     t0 = float32_sqrt(t0, &env->fp_status);
 664     update_fpscr(GETPC());
 665     return t0;
 666 }
 667
 668 float64 helper_fsqrt_DT(float64 t0)
 669 {
 670     set_float_exception_flags(0, &env->fp_status);
 671     t0 = float64_sqrt(t0, &env->fp_status);
 672     update_fpscr(GETPC());
 673     return t0;
 674 }
 675
 676 float32 helper_fsub_FT(float32 t0, float32 t1)
 677 {
 678     set_float_exception_flags(0, &env->fp_status);
 679     t0 = float32_sub(t0, t1, &env->fp_status);
 680     update_fpscr(GETPC());
 681     return t0;
 682 }
 683
 684 float64 helper_fsub_DT(float64 t0, float64 t1)
 685 {
 686     set_float_exception_flags(0, &env->fp_status);
 687     t0 = float64_sub(t0, t1, &env->fp_status);
 688     update_fpscr(GETPC());
 689     return t0;
 690 }
 691
 692 uint32_t helper_ftrc_FT(float32 t0)
 693 {
 694     uint32_t ret;
 695     set_float_exception_flags(0, &env->fp_status);
 696     ret = float32_to_int32_round_to_zero(t0, &env->fp_status);
 697     update_fpscr(GETPC());
 698     return ret;
 699 }
 700
 701 uint32_t helper_ftrc_DT(float64 t0)
 702 {
 703     uint32_t ret;
 704     set_float_exception_flags(0, &env->fp_status);
 705     ret = float64_to_int32_round_to_zero(t0, &env->fp_status);
 706     update_fpscr(GETPC());
 707     return ret;
 708 }
 709
 710 void helper_fipr(uint32_t m, uint32_t n)
 711 {
 712     int bank, i;
 713     float32 r, p;
 714
 715     bank = (env->sr & FPSCR_FR) ? 16 : 0;
 716     r = float32_zero;
 717     set_float_exception_flags(0, &env->fp_status);
 718
 719     for (i = 0 ; i < 4 ; i++) {
 720         p = float32_mul(env->fregs[bank + m + i],
 721                         env->fregs[bank + n + i],
 722                         &env->fp_status);
 723         r = float32_add(r, p, &env->fp_status);
 724     }
 725     update_fpscr(GETPC());
 726
 727     env->fregs[bank + n + 3] = r;
 728 }
 729
 730 void helper_ftrv(uint32_t n)
 731 {
 732     int bank_matrix, bank_vector;
 733     int i, j;
 734     float32 r[4];
 735     float32 p;
 736
 737     bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16;
 738     bank_vector = (env->sr & FPSCR_FR) ? 16 : 0;
 739     set_float_exception_flags(0, &env->fp_status);
 740     for (i = 0 ; i < 4 ; i++) {
 741         r[i] = float32_zero;
 742         for (j = 0 ; j < 4 ; j++) {
 743             p = float32_mul(env->fregs[bank_matrix + 4 * j + i],
 744                             env->fregs[bank_vector + j],
 745                             &env->fp_status);
 746             r[i] = float32_add(r[i], p, &env->fp_status);
 747         }
 748     }
 749     update_fpscr(GETPC());
 750
 751     for (i = 0 ; i < 4 ; i++) {
 752         env->fregs[bank_vector + i] = r[i];
 753     }
 754 }