4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
22 #include "dyngen-exec.h"
25 #include "host-utils.h"
27 //#define CRIS_OP_HELPER_DEBUG
30 #ifdef CRIS_OP_HELPER_DEBUG
32 #define D_LOG(...) qemu_log(__VA__ARGS__)
35 #define D_LOG(...) do { } while (0)
38 #if !defined(CONFIG_USER_ONLY)
39 #include "softmmu_exec.h"
41 #define MMUSUFFIX _mmu
44 #include "softmmu_template.h"
47 #include "softmmu_template.h"
50 #include "softmmu_template.h"
53 #include "softmmu_template.h"
55 /* Try to fill the TLB and return an exception if error. If retaddr is
56 NULL, it means that the function was called in C code (i.e. not
57 from generated code or from helper.c) */
58 /* XXX: fix it to restore all registers */
59 void tlb_fill (target_ulong addr
, int is_write
, int mmu_idx
, void *retaddr
)
66 /* XXX: hack to restore env in all cases, even if not called from
71 D_LOG("%s pc=%x tpc=%x ra=%x\n", __func__
,
72 env
->pc
, env
->debug1
, retaddr
);
73 ret
= cpu_cris_handle_mmu_fault(env
, addr
, is_write
, mmu_idx
, 1);
76 /* now we have a real cpu fault */
77 pc
= (unsigned long)retaddr
;
80 /* the PC is inside the translated code. It means that we have
81 a virtual CPU fault */
82 cpu_restore_state(tb
, env
, pc
);
84 /* Evaluate flags after retranslation. */
85 helper_top_evaluate_flags();
95 void helper_raise_exception(uint32_t index
)
97 env
->exception_index
= index
;
101 void helper_tlb_flush_pid(uint32_t pid
)
103 #if !defined(CONFIG_USER_ONLY)
105 if (pid
!= (env
->pregs
[PR_PID
] & 0xff))
106 cris_mmu_flush_pid(env
, env
->pregs
[PR_PID
]);
110 void helper_spc_write(uint32_t new_spc
)
112 #if !defined(CONFIG_USER_ONLY)
113 tlb_flush_page(env
, env
->pregs
[PR_SPC
]);
114 tlb_flush_page(env
, new_spc
);
118 void helper_dump(uint32_t a0
, uint32_t a1
, uint32_t a2
)
120 qemu_log("%s: a0=%x a1=%x\n", __func__
, a0
, a1
);
123 /* Used by the tlb decoder. */
124 #define EXTRACT_FIELD(src, start, end) \
125 (((src) >> start) & ((1 << (end - start + 1)) - 1))
127 void helper_movl_sreg_reg (uint32_t sreg
, uint32_t reg
)
130 srs
= env
->pregs
[PR_SRS
];
132 env
->sregs
[srs
][sreg
] = env
->regs
[reg
];
134 #if !defined(CONFIG_USER_ONLY)
135 if (srs
== 1 || srs
== 2) {
137 /* Writes to tlb-hi write to mm_cause as a side
139 env
->sregs
[SFR_RW_MM_TLB_HI
] = env
->regs
[reg
];
140 env
->sregs
[SFR_R_MM_CAUSE
] = env
->regs
[reg
];
142 else if (sreg
== 5) {
149 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
154 /* We've just made a write to tlb_lo. */
155 lo
= env
->sregs
[SFR_RW_MM_TLB_LO
];
156 /* Writes are done via r_mm_cause. */
157 hi
= env
->sregs
[SFR_R_MM_CAUSE
];
159 vaddr
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].hi
,
161 vaddr
<<= TARGET_PAGE_BITS
;
162 tlb_v
= EXTRACT_FIELD(env
->tlbsets
[srs
-1][set
][idx
].lo
,
164 env
->tlbsets
[srs
- 1][set
][idx
].lo
= lo
;
165 env
->tlbsets
[srs
- 1][set
][idx
].hi
= hi
;
167 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
168 vaddr
, tlb_v
, env
->pc
);
170 tlb_flush_page(env
, vaddr
);
177 void helper_movl_reg_sreg (uint32_t reg
, uint32_t sreg
)
180 env
->pregs
[PR_SRS
] &= 3;
181 srs
= env
->pregs
[PR_SRS
];
183 #if !defined(CONFIG_USER_ONLY)
184 if (srs
== 1 || srs
== 2)
190 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
195 /* Update the mirror regs. */
196 hi
= env
->tlbsets
[srs
- 1][set
][idx
].hi
;
197 lo
= env
->tlbsets
[srs
- 1][set
][idx
].lo
;
198 env
->sregs
[SFR_RW_MM_TLB_HI
] = hi
;
199 env
->sregs
[SFR_RW_MM_TLB_LO
] = lo
;
202 env
->regs
[reg
] = env
->sregs
[srs
][sreg
];
205 static void cris_ccs_rshift(CPUState
*env
)
209 /* Apply the ccs shift. */
210 ccs
= env
->pregs
[PR_CCS
];
211 ccs
= (ccs
& 0xc0000000) | ((ccs
& 0x0fffffff) >> 10);
214 /* Enter user mode. */
215 env
->ksp
= env
->regs
[R_SP
];
216 env
->regs
[R_SP
] = env
->pregs
[PR_USP
];
219 env
->pregs
[PR_CCS
] = ccs
;
222 void helper_rfe(void)
224 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
226 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
227 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
231 cris_ccs_rshift(env
);
233 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
235 env
->pregs
[PR_CCS
] |= P_FLAG
;
238 void helper_rfn(void)
240 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
242 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
243 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
247 cris_ccs_rshift(env
);
249 /* Set the P_FLAG only if the R_FLAG is not set. */
251 env
->pregs
[PR_CCS
] |= P_FLAG
;
253 /* Always set the M flag. */
254 env
->pregs
[PR_CCS
] |= M_FLAG
;
257 uint32_t helper_lz(uint32_t t0
)
262 uint32_t helper_btst(uint32_t t0
, uint32_t t1
, uint32_t ccs
)
264 /* FIXME: clean this up. */
267 The N flag is set according to the selected bit in the dest reg.
268 The Z flag is set if the selected bit and all bits to the right are
270 The X flag is cleared.
271 Other flags are left untouched.
272 The destination reg is not affected.*/
273 unsigned int fz
, sbit
, bset
, mask
, masked_t0
;
276 bset
= !!(t0
& (1 << sbit
));
277 mask
= sbit
== 31 ? -1 : (1 << (sbit
+ 1)) - 1;
278 masked_t0
= t0
& mask
;
279 fz
= !(masked_t0
| bset
);
281 /* Clear the X, N and Z flags. */
282 ccs
= ccs
& ~(X_FLAG
| N_FLAG
| Z_FLAG
);
283 if (env
->pregs
[PR_VR
] < 32)
284 ccs
&= ~(V_FLAG
| C_FLAG
);
285 /* Set the N and Z flags accordingly. */
286 ccs
|= (bset
<< 3) | (fz
<< 2);
290 static inline uint32_t evaluate_flags_writeback(uint32_t flags
, uint32_t ccs
)
292 unsigned int x
, z
, mask
;
294 /* Extended arithmetics, leave the z flag alone. */
296 mask
= env
->cc_mask
| X_FLAG
;
303 /* all insn clear the x-flag except setf or clrf. */
309 uint32_t helper_evaluate_flags_muls(uint32_t ccs
, uint32_t res
, uint32_t mof
)
315 dneg
= ((int32_t)res
) < 0;
324 if ((dneg
&& mof
!= -1)
325 || (!dneg
&& mof
!= 0))
327 return evaluate_flags_writeback(flags
, ccs
);
330 uint32_t helper_evaluate_flags_mulu(uint32_t ccs
, uint32_t res
, uint32_t mof
)
345 return evaluate_flags_writeback(flags
, ccs
);
348 uint32_t helper_evaluate_flags_mcp(uint32_t ccs
,
349 uint32_t src
, uint32_t dst
, uint32_t res
)
353 src
= src
& 0x80000000;
354 dst
= dst
& 0x80000000;
356 if ((res
& 0x80000000L
) != 0L)
374 return evaluate_flags_writeback(flags
, ccs
);
377 uint32_t helper_evaluate_flags_alu_4(uint32_t ccs
,
378 uint32_t src
, uint32_t dst
, uint32_t res
)
382 src
= src
& 0x80000000;
383 dst
= dst
& 0x80000000;
385 if ((res
& 0x80000000L
) != 0L)
403 return evaluate_flags_writeback(flags
, ccs
);
406 uint32_t helper_evaluate_flags_sub_4(uint32_t ccs
,
407 uint32_t src
, uint32_t dst
, uint32_t res
)
411 src
= (~src
) & 0x80000000;
412 dst
= dst
& 0x80000000;
414 if ((res
& 0x80000000L
) != 0L)
433 return evaluate_flags_writeback(flags
, ccs
);
436 uint32_t helper_evaluate_flags_move_4(uint32_t ccs
, uint32_t res
)
440 if ((int32_t)res
< 0)
445 return evaluate_flags_writeback(flags
, ccs
);
447 uint32_t helper_evaluate_flags_move_2(uint32_t ccs
, uint32_t res
)
451 if ((int16_t)res
< 0L)
456 return evaluate_flags_writeback(flags
, ccs
);
459 /* TODO: This is expensive. We could split things up and only evaluate part of
460 CCR on a need to know basis. For now, we simply re-evaluate everything. */
461 void helper_evaluate_flags(void)
463 uint32_t src
, dst
, res
;
468 res
= env
->cc_result
;
470 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
473 /* Now, evaluate the flags. This stuff is based on
474 Per Zander's CRISv10 simulator. */
475 switch (env
->cc_size
)
478 if ((res
& 0x80L
) != 0L)
481 if (((src
& 0x80L
) == 0L)
482 && ((dst
& 0x80L
) == 0L))
486 else if (((src
& 0x80L
) != 0L)
487 && ((dst
& 0x80L
) != 0L))
494 if ((res
& 0xFFL
) == 0L)
498 if (((src
& 0x80L
) != 0L)
499 && ((dst
& 0x80L
) != 0L))
503 if ((dst
& 0x80L
) != 0L
504 || (src
& 0x80L
) != 0L)
511 if ((res
& 0x8000L
) != 0L)
514 if (((src
& 0x8000L
) == 0L)
515 && ((dst
& 0x8000L
) == 0L))
519 else if (((src
& 0x8000L
) != 0L)
520 && ((dst
& 0x8000L
) != 0L))
527 if ((res
& 0xFFFFL
) == 0L)
531 if (((src
& 0x8000L
) != 0L)
532 && ((dst
& 0x8000L
) != 0L))
536 if ((dst
& 0x8000L
) != 0L
537 || (src
& 0x8000L
) != 0L)
544 if ((res
& 0x80000000L
) != 0L)
547 if (((src
& 0x80000000L
) == 0L)
548 && ((dst
& 0x80000000L
) == 0L))
552 else if (((src
& 0x80000000L
) != 0L) &&
553 ((dst
& 0x80000000L
) != 0L))
562 if (((src
& 0x80000000L
) != 0L)
563 && ((dst
& 0x80000000L
) != 0L))
565 if ((dst
& 0x80000000L
) != 0L
566 || (src
& 0x80000000L
) != 0L)
574 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
)
577 env
->pregs
[PR_CCS
] = evaluate_flags_writeback(flags
, env
->pregs
[PR_CCS
]);
580 void helper_top_evaluate_flags(void)
585 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mcp(
586 env
->pregs
[PR_CCS
], env
->cc_src
,
587 env
->cc_dest
, env
->cc_result
);
590 env
->pregs
[PR_CCS
] = helper_evaluate_flags_muls(
591 env
->pregs
[PR_CCS
], env
->cc_result
,
595 env
->pregs
[PR_CCS
] = helper_evaluate_flags_mulu(
596 env
->pregs
[PR_CCS
], env
->cc_result
,
606 switch (env
->cc_size
)
610 helper_evaluate_flags_move_4(
616 helper_evaluate_flags_move_2(
621 helper_evaluate_flags();
630 if (env
->cc_size
== 4)
632 helper_evaluate_flags_sub_4(
634 env
->cc_src
, env
->cc_dest
,
637 helper_evaluate_flags();
641 switch (env
->cc_size
)
645 helper_evaluate_flags_alu_4(
647 env
->cc_src
, env
->cc_dest
,
651 helper_evaluate_flags();