hw/arm/spitz.c

   1 /*
   2  * PXA270-based Clamshell PDA platforms.
   3  *
   4  * Copyright (c) 2006 Openedhand Ltd.
   5  * Written by Andrzej Zaborowski <balrog@zabor.org>
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "hw/hw.h"
  14 #include "hw/arm/pxa.h"
  15 #include "hw/arm/arm.h"
  16 #include "sysemu/sysemu.h"
  17 #include "hw/pcmcia.h"
  18 #include "hw/i2c/i2c.h"
  19 #include "hw/ssi.h"
  20 #include "hw/block/flash.h"
  21 #include "qemu/timer.h"
  22 #include "hw/devices.h"
  23 #include "hw/arm/sharpsl.h"
  24 #include "ui/console.h"
  25 #include "audio/audio.h"
  26 #include "hw/boards.h"
  27 #include "sysemu/block-backend.h"
  28 #include "hw/sysbus.h"
  29 #include "exec/address-spaces.h"
  30
  31 #undef REG_FMT
  32 #define REG_FMT                 "0x%02lx"
  33
  34 /* Spitz Flash */
  35 #define FLASH_BASE              0x0c000000
  36 #define FLASH_ECCLPLB           0x00    /* Line parity 7 - 0 bit */
  37 #define FLASH_ECCLPUB           0x04    /* Line parity 15 - 8 bit */
  38 #define FLASH_ECCCP             0x08    /* Column parity 5 - 0 bit */
  39 #define FLASH_ECCCNTR           0x0c    /* ECC byte counter */
  40 #define FLASH_ECCCLRR           0x10    /* Clear ECC */
  41 #define FLASH_FLASHIO           0x14    /* Flash I/O */
  42 #define FLASH_FLASHCTL          0x18    /* Flash Control */
  43
  44 #define FLASHCTL_CE0            (1 << 0)
  45 #define FLASHCTL_CLE            (1 << 1)
  46 #define FLASHCTL_ALE            (1 << 2)
  47 #define FLASHCTL_WP             (1 << 3)
  48 #define FLASHCTL_CE1            (1 << 4)
  49 #define FLASHCTL_RYBY           (1 << 5)
  50 #define FLASHCTL_NCE            (FLASHCTL_CE0 | FLASHCTL_CE1)
  51
  52 #define TYPE_SL_NAND "sl-nand"
  53 #define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
  54
  55 typedef struct {
  56     SysBusDevice parent_obj;
  57
  58     MemoryRegion iomem;
  59     DeviceState *nand;
  60     uint8_t ctl;
  61     uint8_t manf_id;
  62     uint8_t chip_id;
  63     ECCState ecc;
  64 } SLNANDState;
  65
  66 static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
  67 {
  68     SLNANDState *s = (SLNANDState *) opaque;
  69     int ryby;
  70
  71     switch (addr) {
  72 #define BSHR(byte, from, to)    ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
  73     case FLASH_ECCLPLB:
  74         return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
  75                 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
  76
  77 #define BSHL(byte, from, to)    ((s->ecc.lp[byte] << (to - from)) & (1 << to))
  78     case FLASH_ECCLPUB:
  79         return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
  80                 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
  81
  82     case FLASH_ECCCP:
  83         return s->ecc.cp;
  84
  85     case FLASH_ECCCNTR:
  86         return s->ecc.count & 0xff;
  87
  88     case FLASH_FLASHCTL:
  89         nand_getpins(s->nand, &ryby);
  90         if (ryby)
  91             return s->ctl | FLASHCTL_RYBY;
  92         else
  93             return s->ctl;
  94
  95     case FLASH_FLASHIO:
  96         if (size == 4) {
  97             return ecc_digest(&s->ecc, nand_getio(s->nand)) |
  98                 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
  99         }
 100         return ecc_digest(&s->ecc, nand_getio(s->nand));
 101
 102     default:
 103         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 104     }
 105     return 0;
 106 }
 107
 108 static void sl_write(void *opaque, hwaddr addr,
 109                      uint64_t value, unsigned size)
 110 {
 111     SLNANDState *s = (SLNANDState *) opaque;
 112
 113     switch (addr) {
 114     case FLASH_ECCCLRR:
 115         /* Value is ignored.  */
 116         ecc_reset(&s->ecc);
 117         break;
 118
 119     case FLASH_FLASHCTL:
 120         s->ctl = value & 0xff & ~FLASHCTL_RYBY;
 121         nand_setpins(s->nand,
 122                         s->ctl & FLASHCTL_CLE,
 123                         s->ctl & FLASHCTL_ALE,
 124                         s->ctl & FLASHCTL_NCE,
 125                         s->ctl & FLASHCTL_WP,
 126                         0);
 127         break;
 128
 129     case FLASH_FLASHIO:
 130         nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
 131         break;
 132
 133     default:
 134         zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
 135     }
 136 }
 137
 138 enum {
 139     FLASH_128M,
 140     FLASH_1024M,
 141 };
 142
 143 static const MemoryRegionOps sl_ops = {
 144     .read = sl_read,
 145     .write = sl_write,
 146     .endianness = DEVICE_NATIVE_ENDIAN,
 147 };
 148
 149 static void sl_flash_register(PXA2xxState *cpu, int size)
 150 {
 151     DeviceState *dev;
 152
 153     dev = qdev_create(NULL, TYPE_SL_NAND);
 154
 155     qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
 156     if (size == FLASH_128M)
 157         qdev_prop_set_uint8(dev, "chip_id", 0x73);
 158     else if (size == FLASH_1024M)
 159         qdev_prop_set_uint8(dev, "chip_id", 0xf1);
 160
 161     qdev_init_nofail(dev);
 162     sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
 163 }
 164
 165 static int sl_nand_init(SysBusDevice *dev)
 166 {
 167     SLNANDState *s = SL_NAND(dev);
 168     DriveInfo *nand;
 169
 170     s->ctl = 0;
 171     /* FIXME use a qdev drive property instead of drive_get() */
 172     nand = drive_get(IF_MTD, 0, 0);
 173     s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
 174                         s->manf_id, s->chip_id);
 175
 176     memory_region_init_io(&s->iomem, OBJECT(s), &sl_ops, s, "sl", 0x40);
 177     sysbus_init_mmio(dev, &s->iomem);
 178
 179     return 0;
 180 }
 181
 182 /* Spitz Keyboard */
 183
 184 #define SPITZ_KEY_STROBE_NUM    11
 185 #define SPITZ_KEY_SENSE_NUM     7
 186
 187 static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
 188     12, 17, 91, 34, 36, 38, 39
 189 };
 190
 191 static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
 192     88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
 193 };
 194
 195 /* Eighth additional row maps the special keys */
 196 static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
 197     { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
 198     {  -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
 199     { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25,  -1 ,  -1 ,  -1  },
 200     { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26,  -1 , 0x36,  -1  },
 201     { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34,  -1 , 0x1c, 0x2a,  -1  },
 202     { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33,  -1 , 0x48,  -1 ,  -1 , 0x38 },
 203     { 0x37, 0x3d,  -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d,  -1 ,  -1  },
 204     { 0x52, 0x43, 0x01, 0x47, 0x49,  -1 ,  -1 ,  -1 ,  -1 ,  -1 ,  -1  },
 205 };
 206
 207 #define SPITZ_GPIO_AK_INT       13      /* Remote control */
 208 #define SPITZ_GPIO_SYNC         16      /* Sync button */
 209 #define SPITZ_GPIO_ON_KEY       95      /* Power button */
 210 #define SPITZ_GPIO_SWA          97      /* Lid */
 211 #define SPITZ_GPIO_SWB          96      /* Tablet mode */
 212
 213 /* The special buttons are mapped to unused keys */
 214 static const int spitz_gpiomap[5] = {
 215     SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
 216     SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
 217 };
 218
 219 #define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
 220 #define SPITZ_KEYBOARD(obj) \
 221     OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
 222
 223 typedef struct {
 224     SysBusDevice parent_obj;
 225
 226     qemu_irq sense[SPITZ_KEY_SENSE_NUM];
 227     qemu_irq gpiomap[5];
 228     int keymap[0x80];
 229     uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
 230     uint16_t strobe_state;
 231     uint16_t sense_state;
 232
 233     uint16_t pre_map[0x100];
 234     uint16_t modifiers;
 235     uint16_t imodifiers;
 236     uint8_t fifo[16];
 237     int fifopos, fifolen;
 238     QEMUTimer *kbdtimer;
 239 } SpitzKeyboardState;
 240
 241 static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
 242 {
 243     int i;
 244     uint16_t strobe, sense = 0;
 245     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
 246         strobe = s->keyrow[i] & s->strobe_state;
 247         if (strobe) {
 248             sense |= 1 << i;
 249             if (!(s->sense_state & (1 << i)))
 250                 qemu_irq_raise(s->sense[i]);
 251         } else if (s->sense_state & (1 << i))
 252             qemu_irq_lower(s->sense[i]);
 253     }
 254
 255     s->sense_state = sense;
 256 }
 257
 258 static void spitz_keyboard_strobe(void *opaque, int line, int level)
 259 {
 260     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 261
 262     if (level)
 263         s->strobe_state |= 1 << line;
 264     else
 265         s->strobe_state &= ~(1 << line);
 266     spitz_keyboard_sense_update(s);
 267 }
 268
 269 static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
 270 {
 271     int spitz_keycode = s->keymap[keycode & 0x7f];
 272     if (spitz_keycode == -1)
 273         return;
 274
 275     /* Handle the additional keys */
 276     if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
 277         qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
 278         return;
 279     }
 280
 281     if (keycode & 0x80)
 282         s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
 283     else
 284         s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
 285
 286     spitz_keyboard_sense_update(s);
 287 }
 288
 289 #define SPITZ_MOD_SHIFT   (1 << 7)
 290 #define SPITZ_MOD_CTRL    (1 << 8)
 291 #define SPITZ_MOD_FN      (1 << 9)
 292
 293 #define QUEUE_KEY(c)    s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
 294
 295 static void spitz_keyboard_handler(void *opaque, int keycode)
 296 {
 297     SpitzKeyboardState *s = opaque;
 298     uint16_t code;
 299     int mapcode;
 300     switch (keycode) {
 301     case 0x2a:  /* Left Shift */
 302         s->modifiers |= 1;
 303         break;
 304     case 0xaa:
 305         s->modifiers &= ~1;
 306         break;
 307     case 0x36:  /* Right Shift */
 308         s->modifiers |= 2;
 309         break;
 310     case 0xb6:
 311         s->modifiers &= ~2;
 312         break;
 313     case 0x1d:  /* Control */
 314         s->modifiers |= 4;
 315         break;
 316     case 0x9d:
 317         s->modifiers &= ~4;
 318         break;
 319     case 0x38:  /* Alt */
 320         s->modifiers |= 8;
 321         break;
 322     case 0xb8:
 323         s->modifiers &= ~8;
 324         break;
 325     }
 326
 327     code = s->pre_map[mapcode = ((s->modifiers & 3) ?
 328             (keycode | SPITZ_MOD_SHIFT) :
 329             (keycode & ~SPITZ_MOD_SHIFT))];
 330
 331     if (code != mapcode) {
 332 #if 0
 333         if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
 334             QUEUE_KEY(0x2a | (keycode & 0x80));
 335         }
 336         if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
 337             QUEUE_KEY(0x1d | (keycode & 0x80));
 338         }
 339         if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
 340             QUEUE_KEY(0x38 | (keycode & 0x80));
 341         }
 342         if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
 343             QUEUE_KEY(0x2a | (~keycode & 0x80));
 344         }
 345         if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
 346             QUEUE_KEY(0x36 | (~keycode & 0x80));
 347         }
 348 #else
 349         if (keycode & 0x80) {
 350             if ((s->imodifiers & 1   ) && !(s->modifiers & 1))
 351                 QUEUE_KEY(0x2a | 0x80);
 352             if ((s->imodifiers & 4   ) && !(s->modifiers & 4))
 353                 QUEUE_KEY(0x1d | 0x80);
 354             if ((s->imodifiers & 8   ) && !(s->modifiers & 8))
 355                 QUEUE_KEY(0x38 | 0x80);
 356             if ((s->imodifiers & 0x10) && (s->modifiers & 1))
 357                 QUEUE_KEY(0x2a);
 358             if ((s->imodifiers & 0x20) && (s->modifiers & 2))
 359                 QUEUE_KEY(0x36);
 360             s->imodifiers = 0;
 361         } else {
 362             if ((code & SPITZ_MOD_SHIFT) &&
 363                 !((s->modifiers | s->imodifiers) & 1)) {
 364                 QUEUE_KEY(0x2a);
 365                 s->imodifiers |= 1;
 366             }
 367             if ((code & SPITZ_MOD_CTRL) &&
 368                 !((s->modifiers | s->imodifiers) & 4)) {
 369                 QUEUE_KEY(0x1d);
 370                 s->imodifiers |= 4;
 371             }
 372             if ((code & SPITZ_MOD_FN) &&
 373                 !((s->modifiers | s->imodifiers) & 8)) {
 374                 QUEUE_KEY(0x38);
 375                 s->imodifiers |= 8;
 376             }
 377             if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
 378                             !(s->imodifiers & 0x10)) {
 379                 QUEUE_KEY(0x2a | 0x80);
 380                 s->imodifiers |= 0x10;
 381             }
 382             if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
 383                             !(s->imodifiers & 0x20)) {
 384                 QUEUE_KEY(0x36 | 0x80);
 385                 s->imodifiers |= 0x20;
 386             }
 387         }
 388 #endif
 389     }
 390
 391     QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
 392 }
 393
 394 static void spitz_keyboard_tick(void *opaque)
 395 {
 396     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 397
 398     if (s->fifolen) {
 399         spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
 400         s->fifolen --;
 401         if (s->fifopos >= 16)
 402             s->fifopos = 0;
 403     }
 404
 405     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
 406                    get_ticks_per_sec() / 32);
 407 }
 408
 409 static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
 410 {
 411     int i;
 412     for (i = 0; i < 0x100; i ++)
 413         s->pre_map[i] = i;
 414     s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
 415     s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
 416     s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
 417     s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
 418     s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
 419     s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
 420     s->pre_map[0x28]                   = 0x08 | SPITZ_MOD_SHIFT; /* ' */
 421     s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
 422     s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
 423     s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
 424     s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
 425     s->pre_map[0xd3]                   = 0x0e | SPITZ_MOD_FN;    /* Delete */
 426     s->pre_map[0x3a]                   = 0x0f | SPITZ_MOD_FN;    /* Caps_Lock */
 427     s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN;    /* ^ */
 428     s->pre_map[0x0d]                   = 0x12 | SPITZ_MOD_FN;    /* equal */
 429     s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN;    /* plus */
 430     s->pre_map[0x1a]                   = 0x14 | SPITZ_MOD_FN;    /* [ */
 431     s->pre_map[0x1b]                   = 0x15 | SPITZ_MOD_FN;    /* ] */
 432     s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN;    /* { */
 433     s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN;    /* } */
 434     s->pre_map[0x27]                   = 0x22 | SPITZ_MOD_FN;    /* semicolon */
 435     s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN;    /* colon */
 436     s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN;    /* asterisk */
 437     s->pre_map[0x2b]                   = 0x25 | SPITZ_MOD_FN;    /* backslash */
 438     s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN;    /* bar */
 439     s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN;    /* _ */
 440     s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN;    /* less */
 441     s->pre_map[0x35]                   = 0x33 | SPITZ_MOD_SHIFT; /* slash */
 442     s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN;    /* greater */
 443     s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
 444     s->pre_map[0x49]                   = 0x48 | SPITZ_MOD_FN;    /* Page_Up */
 445     s->pre_map[0x51]                   = 0x50 | SPITZ_MOD_FN;    /* Page_Down */
 446
 447     s->modifiers = 0;
 448     s->imodifiers = 0;
 449     s->fifopos = 0;
 450     s->fifolen = 0;
 451 }
 452
 453 #undef SPITZ_MOD_SHIFT
 454 #undef SPITZ_MOD_CTRL
 455 #undef SPITZ_MOD_FN
 456
 457 static int spitz_keyboard_post_load(void *opaque, int version_id)
 458 {
 459     SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
 460
 461     /* Release all pressed keys */
 462     memset(s->keyrow, 0, sizeof(s->keyrow));
 463     spitz_keyboard_sense_update(s);
 464     s->modifiers = 0;
 465     s->imodifiers = 0;
 466     s->fifopos = 0;
 467     s->fifolen = 0;
 468
 469     return 0;
 470 }
 471
 472 static void spitz_keyboard_register(PXA2xxState *cpu)
 473 {
 474     int i;
 475     DeviceState *dev;
 476     SpitzKeyboardState *s;
 477
 478     dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
 479     s = SPITZ_KEYBOARD(dev);
 480
 481     for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
 482         qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
 483
 484     for (i = 0; i < 5; i ++)
 485         s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
 486
 487     if (!graphic_rotate)
 488         s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
 489
 490     for (i = 0; i < 5; i++)
 491         qemu_set_irq(s->gpiomap[i], 0);
 492
 493     for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
 494         qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
 495                 qdev_get_gpio_in(dev, i));
 496
 497     timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
 498
 499     qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
 500 }
 501
 502 static int spitz_keyboard_init(SysBusDevice *sbd)
 503 {
 504     DeviceState *dev = DEVICE(sbd);
 505     SpitzKeyboardState *s = SPITZ_KEYBOARD(dev);
 506     int i, j;
 507
 508     for (i = 0; i < 0x80; i ++)
 509         s->keymap[i] = -1;
 510     for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
 511         for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
 512             if (spitz_keymap[i][j] != -1)
 513                 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
 514
 515     spitz_keyboard_pre_map(s);
 516
 517     s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
 518     qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
 519     qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
 520
 521     return 0;
 522 }
 523
 524 /* LCD backlight controller */
 525
 526 #define LCDTG_RESCTL    0x00
 527 #define LCDTG_PHACTRL   0x01
 528 #define LCDTG_DUTYCTRL  0x02
 529 #define LCDTG_POWERREG0 0x03
 530 #define LCDTG_POWERREG1 0x04
 531 #define LCDTG_GPOR3     0x05
 532 #define LCDTG_PICTRL    0x06
 533 #define LCDTG_POLCTRL   0x07
 534
 535 typedef struct {
 536     SSISlave ssidev;
 537     uint32_t bl_intensity;
 538     uint32_t bl_power;
 539 } SpitzLCDTG;
 540
 541 static void spitz_bl_update(SpitzLCDTG *s)
 542 {
 543     if (s->bl_power && s->bl_intensity)
 544         zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
 545     else
 546         zaurus_printf("LCD Backlight now off\n");
 547 }
 548
 549 /* FIXME: Implement GPIO properly and remove this hack.  */
 550 static SpitzLCDTG *spitz_lcdtg;
 551
 552 static inline void spitz_bl_bit5(void *opaque, int line, int level)
 553 {
 554     SpitzLCDTG *s = spitz_lcdtg;
 555     int prev = s->bl_intensity;
 556
 557     if (level)
 558         s->bl_intensity &= ~0x20;
 559     else
 560         s->bl_intensity |= 0x20;
 561
 562     if (s->bl_power && prev != s->bl_intensity)
 563         spitz_bl_update(s);
 564 }
 565
 566 static inline void spitz_bl_power(void *opaque, int line, int level)
 567 {
 568     SpitzLCDTG *s = spitz_lcdtg;
 569     s->bl_power = !!level;
 570     spitz_bl_update(s);
 571 }
 572
 573 static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
 574 {
 575     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 576     int addr;
 577     addr = value >> 5;
 578     value &= 0x1f;
 579
 580     switch (addr) {
 581     case LCDTG_RESCTL:
 582         if (value)
 583             zaurus_printf("LCD in QVGA mode\n");
 584         else
 585             zaurus_printf("LCD in VGA mode\n");
 586         break;
 587
 588     case LCDTG_DUTYCTRL:
 589         s->bl_intensity &= ~0x1f;
 590         s->bl_intensity |= value;
 591         if (s->bl_power)
 592             spitz_bl_update(s);
 593         break;
 594
 595     case LCDTG_POWERREG0:
 596         /* Set common voltage to M62332FP */
 597         break;
 598     }
 599     return 0;
 600 }
 601
 602 static int spitz_lcdtg_init(SSISlave *dev)
 603 {
 604     SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
 605
 606     spitz_lcdtg = s;
 607     s->bl_power = 0;
 608     s->bl_intensity = 0x20;
 609
 610     return 0;
 611 }
 612
 613 /* SSP devices */
 614
 615 #define CORGI_SSP_PORT          2
 616
 617 #define SPITZ_GPIO_LCDCON_CS    53
 618 #define SPITZ_GPIO_ADS7846_CS   14
 619 #define SPITZ_GPIO_MAX1111_CS   20
 620 #define SPITZ_GPIO_TP_INT       11
 621
 622 static DeviceState *max1111;
 623
 624 /* "Demux" the signal based on current chipselect */
 625 typedef struct {
 626     SSISlave ssidev;
 627     SSIBus *bus[3];
 628     uint32_t enable[3];
 629 } CorgiSSPState;
 630
 631 static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
 632 {
 633     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
 634     int i;
 635
 636     for (i = 0; i < 3; i++) {
 637         if (s->enable[i]) {
 638             return ssi_transfer(s->bus[i], value);
 639         }
 640     }
 641     return 0;
 642 }
 643
 644 static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
 645 {
 646     CorgiSSPState *s = (CorgiSSPState *)opaque;
 647     assert(line >= 0 && line < 3);
 648     s->enable[line] = !level;
 649 }
 650
 651 #define MAX1111_BATT_VOLT       1
 652 #define MAX1111_BATT_TEMP       2
 653 #define MAX1111_ACIN_VOLT       3
 654
 655 #define SPITZ_BATTERY_TEMP      0xe0    /* About 2.9V */
 656 #define SPITZ_BATTERY_VOLT      0xd0    /* About 4.0V */
 657 #define SPITZ_CHARGEON_ACIN     0x80    /* About 5.0V */
 658
 659 static void spitz_adc_temp_on(void *opaque, int line, int level)
 660 {
 661     if (!max1111)
 662         return;
 663
 664     if (level)
 665         max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
 666     else
 667         max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 668 }
 669
 670 static int corgi_ssp_init(SSISlave *d)
 671 {
 672     DeviceState *dev = DEVICE(d);
 673     CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
 674
 675     qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
 676     s->bus[0] = ssi_create_bus(dev, "ssi0");
 677     s->bus[1] = ssi_create_bus(dev, "ssi1");
 678     s->bus[2] = ssi_create_bus(dev, "ssi2");
 679
 680     return 0;
 681 }
 682
 683 static void spitz_ssp_attach(PXA2xxState *cpu)
 684 {
 685     DeviceState *mux;
 686     DeviceState *dev;
 687     void *bus;
 688
 689     mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
 690
 691     bus = qdev_get_child_bus(mux, "ssi0");
 692     ssi_create_slave(bus, "spitz-lcdtg");
 693
 694     bus = qdev_get_child_bus(mux, "ssi1");
 695     dev = ssi_create_slave(bus, "ads7846");
 696     qdev_connect_gpio_out(dev, 0,
 697                           qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
 698
 699     bus = qdev_get_child_bus(mux, "ssi2");
 700     max1111 = ssi_create_slave(bus, "max1111");
 701     max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
 702     max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
 703     max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
 704
 705     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
 706                         qdev_get_gpio_in(mux, 0));
 707     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
 708                         qdev_get_gpio_in(mux, 1));
 709     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
 710                         qdev_get_gpio_in(mux, 2));
 711 }
 712
 713 /* CF Microdrive */
 714
 715 static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
 716 {
 717     PCMCIACardState *md;
 718     DriveInfo *dinfo;
 719
 720     dinfo = drive_get(IF_IDE, 0, 0);
 721     if (!dinfo || dinfo->media_cd)
 722         return;
 723     md = dscm1xxxx_init(dinfo);
 724     pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
 725 }
 726
 727 /* Wm8750 and Max7310 on I2C */
 728
 729 #define AKITA_MAX_ADDR  0x18
 730 #define SPITZ_WM_ADDRL  0x1b
 731 #define SPITZ_WM_ADDRH  0x1a
 732
 733 #define SPITZ_GPIO_WM   5
 734
 735 static void spitz_wm8750_addr(void *opaque, int line, int level)
 736 {
 737     I2CSlave *wm = (I2CSlave *) opaque;
 738     if (level)
 739         i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
 740     else
 741         i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
 742 }
 743
 744 static void spitz_i2c_setup(PXA2xxState *cpu)
 745 {
 746     /* Attach the CPU on one end of our I2C bus.  */
 747     I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
 748
 749     DeviceState *wm;
 750
 751     /* Attach a WM8750 to the bus */
 752     wm = i2c_create_slave(bus, "wm8750", 0);
 753
 754     spitz_wm8750_addr(wm, 0, 0);
 755     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
 756                           qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
 757     /* .. and to the sound interface.  */
 758     cpu->i2s->opaque = wm;
 759     cpu->i2s->codec_out = wm8750_dac_dat;
 760     cpu->i2s->codec_in = wm8750_adc_dat;
 761     wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
 762 }
 763
 764 static void spitz_akita_i2c_setup(PXA2xxState *cpu)
 765 {
 766     /* Attach a Max7310 to Akita I2C bus.  */
 767     i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
 768                      AKITA_MAX_ADDR);
 769 }
 770
 771 /* Other peripherals */
 772
 773 static void spitz_out_switch(void *opaque, int line, int level)
 774 {
 775     switch (line) {
 776     case 0:
 777         zaurus_printf("Charging %s.\n", level ? "off" : "on");
 778         break;
 779     case 1:
 780         zaurus_printf("Discharging %s.\n", level ? "on" : "off");
 781         break;
 782     case 2:
 783         zaurus_printf("Green LED %s.\n", level ? "on" : "off");
 784         break;
 785     case 3:
 786         zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
 787         break;
 788     case 4:
 789         spitz_bl_bit5(opaque, line, level);
 790         break;
 791     case 5:
 792         spitz_bl_power(opaque, line, level);
 793         break;
 794     case 6:
 795         spitz_adc_temp_on(opaque, line, level);
 796         break;
 797     }
 798 }
 799
 800 #define SPITZ_SCP_LED_GREEN             1
 801 #define SPITZ_SCP_JK_B                  2
 802 #define SPITZ_SCP_CHRG_ON               3
 803 #define SPITZ_SCP_MUTE_L                4
 804 #define SPITZ_SCP_MUTE_R                5
 805 #define SPITZ_SCP_CF_POWER              6
 806 #define SPITZ_SCP_LED_ORANGE            7
 807 #define SPITZ_SCP_JK_A                  8
 808 #define SPITZ_SCP_ADC_TEMP_ON           9
 809 #define SPITZ_SCP2_IR_ON                1
 810 #define SPITZ_SCP2_AKIN_PULLUP          2
 811 #define SPITZ_SCP2_BACKLIGHT_CONT       7
 812 #define SPITZ_SCP2_BACKLIGHT_ON         8
 813 #define SPITZ_SCP2_MIC_BIAS             9
 814
 815 static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
 816                 DeviceState *scp0, DeviceState *scp1)
 817 {
 818     qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
 819
 820     qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
 821     qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
 822     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
 823     qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
 824
 825     if (scp1) {
 826         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
 827         qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
 828     }
 829
 830     qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
 831 }
 832
 833 #define SPITZ_GPIO_HSYNC                22
 834 #define SPITZ_GPIO_SD_DETECT            9
 835 #define SPITZ_GPIO_SD_WP                81
 836 #define SPITZ_GPIO_ON_RESET             89
 837 #define SPITZ_GPIO_BAT_COVER            90
 838 #define SPITZ_GPIO_CF1_IRQ              105
 839 #define SPITZ_GPIO_CF1_CD               94
 840 #define SPITZ_GPIO_CF2_IRQ              106
 841 #define SPITZ_GPIO_CF2_CD               93
 842
 843 static int spitz_hsync;
 844
 845 static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
 846 {
 847     PXA2xxState *cpu = (PXA2xxState *) opaque;
 848     qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
 849     spitz_hsync ^= 1;
 850 }
 851
 852 static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
 853 {
 854     qemu_irq lcd_hsync;
 855     /*
 856      * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
 857      * read to satisfy broken guests that poll-wait for hsync.
 858      * Simulating a real hsync event would be less practical and
 859      * wouldn't guarantee that a guest ever exits the loop.
 860      */
 861     spitz_hsync = 0;
 862     lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
 863     pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
 864     pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
 865
 866     /* MMC/SD host */
 867     pxa2xx_mmci_handlers(cpu->mmc,
 868                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
 869                     qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
 870
 871     /* Battery lock always closed */
 872     qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
 873
 874     /* Handle reset */
 875     qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset);
 876
 877     /* PCMCIA signals: card's IRQ and Card-Detect */
 878     if (slots >= 1)
 879         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
 880                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
 881                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
 882     if (slots >= 2)
 883         pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
 884                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
 885                         qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
 886 }
 887
 888 /* Board init.  */
 889 enum spitz_model_e { spitz, akita, borzoi, terrier };
 890
 891 #define SPITZ_RAM       0x04000000
 892 #define SPITZ_ROM       0x00800000
 893
 894 static struct arm_boot_info spitz_binfo = {
 895     .loader_start = PXA2XX_SDRAM_BASE,
 896     .ram_size = 0x04000000,
 897 };
 898
 899 static void spitz_common_init(MachineState *machine,
 900                               enum spitz_model_e model, int arm_id)
 901 {
 902     PXA2xxState *mpu;
 903     DeviceState *scp0, *scp1 = NULL;
 904     MemoryRegion *address_space_mem = get_system_memory();
 905     MemoryRegion *rom = g_new(MemoryRegion, 1);
 906     const char *cpu_model = machine->cpu_model;
 907
 908     if (!cpu_model)
 909         cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0";
 910
 911     /* Setup CPU & memory */
 912     mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model);
 913
 914     sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
 915
 916     memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_abort);
 917     vmstate_register_ram_global(rom);
 918     memory_region_set_readonly(rom, true);
 919     memory_region_add_subregion(address_space_mem, 0, rom);
 920
 921     /* Setup peripherals */
 922     spitz_keyboard_register(mpu);
 923
 924     spitz_ssp_attach(mpu);
 925
 926     scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
 927     if (model != akita) {
 928         scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
 929     }
 930
 931     spitz_scoop_gpio_setup(mpu, scp0, scp1);
 932
 933     spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
 934
 935     spitz_i2c_setup(mpu);
 936
 937     if (model == akita)
 938         spitz_akita_i2c_setup(mpu);
 939
 940     if (model == terrier)
 941         /* A 6.0 GB microdrive is permanently sitting in CF slot 1.  */
 942         spitz_microdrive_attach(mpu, 1);
 943     else if (model != akita)
 944         /* A 4.0 GB microdrive is permanently sitting in CF slot 0.  */
 945         spitz_microdrive_attach(mpu, 0);
 946
 947     spitz_binfo.kernel_filename = machine->kernel_filename;
 948     spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
 949     spitz_binfo.initrd_filename = machine->initrd_filename;
 950     spitz_binfo.board_id = arm_id;
 951     arm_load_kernel(mpu->cpu, &spitz_binfo);
 952     sl_bootparam_write(SL_PXA_PARAM_BASE);
 953 }
 954
 955 static void spitz_init(MachineState *machine)
 956 {
 957     spitz_common_init(machine, spitz, 0x2c9);
 958 }
 959
 960 static void borzoi_init(MachineState *machine)
 961 {
 962     spitz_common_init(machine, borzoi, 0x33f);
 963 }
 964
 965 static void akita_init(MachineState *machine)
 966 {
 967     spitz_common_init(machine, akita, 0x2e8);
 968 }
 969
 970 static void terrier_init(MachineState *machine)
 971 {
 972     spitz_common_init(machine, terrier, 0x33f);
 973 }
 974
 975 static QEMUMachine akitapda_machine = {
 976     .name = "akita",
 977     .desc = "Akita PDA (PXA270)",
 978     .init = akita_init,
 979 };
 980
 981 static QEMUMachine spitzpda_machine = {
 982     .name = "spitz",
 983     .desc = "Spitz PDA (PXA270)",
 984     .init = spitz_init,
 985 };
 986
 987 static QEMUMachine borzoipda_machine = {
 988     .name = "borzoi",
 989     .desc = "Borzoi PDA (PXA270)",
 990     .init = borzoi_init,
 991 };
 992
 993 static QEMUMachine terrierpda_machine = {
 994     .name = "terrier",
 995     .desc = "Terrier PDA (PXA270)",
 996     .init = terrier_init,
 997 };
 998
 999 static void spitz_machine_init(void)
1000 {
1001     qemu_register_machine(&akitapda_machine);
1002     qemu_register_machine(&spitzpda_machine);
1003     qemu_register_machine(&borzoipda_machine);
1004     qemu_register_machine(&terrierpda_machine);
1005 }
1006
1007 machine_init(spitz_machine_init);
1008
1009 static bool is_version_0(void *opaque, int version_id)
1010 {
1011     return version_id == 0;
1012 }
1013
1014 static VMStateDescription vmstate_sl_nand_info = {
1015     .name = "sl-nand",
1016     .version_id = 0,
1017     .minimum_version_id = 0,
1018     .fields = (VMStateField[]) {
1019         VMSTATE_UINT8(ctl, SLNANDState),
1020         VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1021         VMSTATE_END_OF_LIST(),
1022     },
1023 };
1024
1025 static Property sl_nand_properties[] = {
1026     DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1027     DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1028     DEFINE_PROP_END_OF_LIST(),
1029 };
1030
1031 static void sl_nand_class_init(ObjectClass *klass, void *data)
1032 {
1033     DeviceClass *dc = DEVICE_CLASS(klass);
1034     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1035
1036     k->init = sl_nand_init;
1037     dc->vmsd = &vmstate_sl_nand_info;
1038     dc->props = sl_nand_properties;
1039     /* Reason: init() method uses drive_get() */
1040     dc->cannot_instantiate_with_device_add_yet = true;
1041 }
1042
1043 static const TypeInfo sl_nand_info = {
1044     .name          = TYPE_SL_NAND,
1045     .parent        = TYPE_SYS_BUS_DEVICE,
1046     .instance_size = sizeof(SLNANDState),
1047     .class_init    = sl_nand_class_init,
1048 };
1049
1050 static VMStateDescription vmstate_spitz_kbd = {
1051     .name = "spitz-keyboard",
1052     .version_id = 1,
1053     .minimum_version_id = 0,
1054     .post_load = spitz_keyboard_post_load,
1055     .fields = (VMStateField[]) {
1056         VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1057         VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1058         VMSTATE_UNUSED_TEST(is_version_0, 5),
1059         VMSTATE_END_OF_LIST(),
1060     },
1061 };
1062
1063 static Property spitz_keyboard_properties[] = {
1064     DEFINE_PROP_END_OF_LIST(),
1065 };
1066
1067 static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1068 {
1069     DeviceClass *dc = DEVICE_CLASS(klass);
1070     SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
1071
1072     k->init = spitz_keyboard_init;
1073     dc->vmsd = &vmstate_spitz_kbd;
1074     dc->props = spitz_keyboard_properties;
1075 }
1076
1077 static const TypeInfo spitz_keyboard_info = {
1078     .name          = TYPE_SPITZ_KEYBOARD,
1079     .parent        = TYPE_SYS_BUS_DEVICE,
1080     .instance_size = sizeof(SpitzKeyboardState),
1081     .class_init    = spitz_keyboard_class_init,
1082 };
1083
1084 static const VMStateDescription vmstate_corgi_ssp_regs = {
1085     .name = "corgi-ssp",
1086     .version_id = 2,
1087     .minimum_version_id = 2,
1088     .fields = (VMStateField[]) {
1089         VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
1090         VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1091         VMSTATE_END_OF_LIST(),
1092     }
1093 };
1094
1095 static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1096 {
1097     DeviceClass *dc = DEVICE_CLASS(klass);
1098     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1099
1100     k->init = corgi_ssp_init;
1101     k->transfer = corgi_ssp_transfer;
1102     dc->vmsd = &vmstate_corgi_ssp_regs;
1103 }
1104
1105 static const TypeInfo corgi_ssp_info = {
1106     .name          = "corgi-ssp",
1107     .parent        = TYPE_SSI_SLAVE,
1108     .instance_size = sizeof(CorgiSSPState),
1109     .class_init    = corgi_ssp_class_init,
1110 };
1111
1112 static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1113     .name = "spitz-lcdtg",
1114     .version_id = 1,
1115     .minimum_version_id = 1,
1116     .fields = (VMStateField[]) {
1117         VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
1118         VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1119         VMSTATE_UINT32(bl_power, SpitzLCDTG),
1120         VMSTATE_END_OF_LIST(),
1121     }
1122 };
1123
1124 static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1125 {
1126     DeviceClass *dc = DEVICE_CLASS(klass);
1127     SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1128
1129     k->init = spitz_lcdtg_init;
1130     k->transfer = spitz_lcdtg_transfer;
1131     dc->vmsd = &vmstate_spitz_lcdtg_regs;
1132 }
1133
1134 static const TypeInfo spitz_lcdtg_info = {
1135     .name          = "spitz-lcdtg",
1136     .parent        = TYPE_SSI_SLAVE,
1137     .instance_size = sizeof(SpitzLCDTG),
1138     .class_init    = spitz_lcdtg_class_init,
1139 };
1140
1141 static void spitz_register_types(void)
1142 {
1143     type_register_static(&corgi_ssp_info);
1144     type_register_static(&spitz_lcdtg_info);
1145     type_register_static(&spitz_keyboard_info);
1146     type_register_static(&sl_nand_info);
1147 }
1148
1149 type_init(spitz_register_types)