2 * QEMU IDE Emulation: PCI Bus support.
4 * Copyright (c) 2003 Fabrice Bellard
5 * Copyright (c) 2006 Openedhand Ltd.
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
30 #include "block_int.h"
34 #include <hw/ide/pci.h>
36 #define BMDMA_PAGE_SIZE 4096
38 static void bmdma_start_dma(IDEDMA
*dma
, IDEState
*s
,
39 BlockDriverCompletionFunc
*dma_cb
)
41 BMDMAState
*bm
= DO_UPCAST(BMDMAState
, dma
, dma
);
48 bm
->sector_num
= ide_get_sector(s
);
49 bm
->nsector
= s
->nsector
;
51 if (bm
->status
& BM_STATUS_DMAING
) {
52 bm
->dma_cb(bmdma_active_if(bm
), 0);
56 /* return 0 if buffer completed */
57 static int bmdma_prepare_buf(IDEDMA
*dma
, int is_write
)
59 BMDMAState
*bm
= DO_UPCAST(BMDMAState
, dma
, dma
);
60 IDEState
*s
= bmdma_active_if(bm
);
67 qemu_sglist_init(&s
->sg
, s
->nsector
/ (BMDMA_PAGE_SIZE
/ 512) + 1);
68 s
->io_buffer_size
= 0;
70 if (bm
->cur_prd_len
== 0) {
71 /* end of table (with a fail safe of one page) */
72 if (bm
->cur_prd_last
||
73 (bm
->cur_addr
- bm
->addr
) >= BMDMA_PAGE_SIZE
)
74 return s
->io_buffer_size
!= 0;
75 cpu_physical_memory_read(bm
->cur_addr
, (uint8_t *)&prd
, 8);
77 prd
.addr
= le32_to_cpu(prd
.addr
);
78 prd
.size
= le32_to_cpu(prd
.size
);
79 len
= prd
.size
& 0xfffe;
82 bm
->cur_prd_len
= len
;
83 bm
->cur_prd_addr
= prd
.addr
;
84 bm
->cur_prd_last
= (prd
.size
& 0x80000000);
88 qemu_sglist_add(&s
->sg
, bm
->cur_prd_addr
, l
);
89 bm
->cur_prd_addr
+= l
;
91 s
->io_buffer_size
+= l
;
97 /* return 0 if buffer completed */
98 static int bmdma_rw_buf(IDEDMA
*dma
, int is_write
)
100 BMDMAState
*bm
= DO_UPCAST(BMDMAState
, dma
, dma
);
101 IDEState
*s
= bmdma_active_if(bm
);
109 l
= s
->io_buffer_size
- s
->io_buffer_index
;
112 if (bm
->cur_prd_len
== 0) {
113 /* end of table (with a fail safe of one page) */
114 if (bm
->cur_prd_last
||
115 (bm
->cur_addr
- bm
->addr
) >= BMDMA_PAGE_SIZE
)
117 cpu_physical_memory_read(bm
->cur_addr
, (uint8_t *)&prd
, 8);
119 prd
.addr
= le32_to_cpu(prd
.addr
);
120 prd
.size
= le32_to_cpu(prd
.size
);
121 len
= prd
.size
& 0xfffe;
124 bm
->cur_prd_len
= len
;
125 bm
->cur_prd_addr
= prd
.addr
;
126 bm
->cur_prd_last
= (prd
.size
& 0x80000000);
128 if (l
> bm
->cur_prd_len
)
132 cpu_physical_memory_write(bm
->cur_prd_addr
,
133 s
->io_buffer
+ s
->io_buffer_index
, l
);
135 cpu_physical_memory_read(bm
->cur_prd_addr
,
136 s
->io_buffer
+ s
->io_buffer_index
, l
);
138 bm
->cur_prd_addr
+= l
;
139 bm
->cur_prd_len
-= l
;
140 s
->io_buffer_index
+= l
;
146 static int bmdma_set_unit(IDEDMA
*dma
, int unit
)
148 BMDMAState
*bm
= DO_UPCAST(BMDMAState
, dma
, dma
);
154 static int bmdma_add_status(IDEDMA
*dma
, int status
)
156 BMDMAState
*bm
= DO_UPCAST(BMDMAState
, dma
, dma
);
157 bm
->status
|= status
;
162 static int bmdma_set_inactive(IDEDMA
*dma
)
164 BMDMAState
*bm
= DO_UPCAST(BMDMAState
, dma
, dma
);
166 bm
->status
&= ~BM_STATUS_DMAING
;
173 static void bmdma_restart_dma(BMDMAState
*bm
, int is_read
)
175 IDEState
*s
= bmdma_active_if(bm
);
177 ide_set_sector(s
, bm
->sector_num
);
178 s
->io_buffer_index
= 0;
179 s
->io_buffer_size
= 0;
180 s
->nsector
= bm
->nsector
;
181 bm
->cur_addr
= bm
->addr
;
184 bm
->dma_cb
= ide_read_dma_cb
;
186 bm
->dma_cb
= ide_write_dma_cb
;
189 bmdma_start_dma(&bm
->dma
, s
, bm
->dma_cb
);
192 static void bmdma_restart_bh(void *opaque
)
194 BMDMAState
*bm
= opaque
;
197 qemu_bh_delete(bm
->bh
);
200 is_read
= !!(bm
->status
& BM_STATUS_RETRY_READ
);
202 if (bm
->status
& BM_STATUS_DMA_RETRY
) {
203 bm
->status
&= ~(BM_STATUS_DMA_RETRY
| BM_STATUS_RETRY_READ
);
204 bmdma_restart_dma(bm
, is_read
);
205 } else if (bm
->status
& BM_STATUS_PIO_RETRY
) {
206 bm
->status
&= ~(BM_STATUS_PIO_RETRY
| BM_STATUS_RETRY_READ
);
208 ide_sector_read(bmdma_active_if(bm
));
210 ide_sector_write(bmdma_active_if(bm
));
212 } else if (bm
->status
& BM_STATUS_RETRY_FLUSH
) {
213 ide_flush_cache(bmdma_active_if(bm
));
217 static void bmdma_restart_cb(void *opaque
, int running
, int reason
)
219 IDEDMA
*dma
= opaque
;
220 BMDMAState
*bm
= DO_UPCAST(BMDMAState
, dma
, dma
);
226 bm
->bh
= qemu_bh_new(bmdma_restart_bh
, &bm
->dma
);
227 qemu_bh_schedule(bm
->bh
);
231 static void bmdma_cancel(BMDMAState
*bm
)
233 if (bm
->status
& BM_STATUS_DMAING
) {
234 /* cancel DMA request */
235 bmdma_set_inactive(&bm
->dma
);
239 static int bmdma_reset(IDEDMA
*dma
)
241 BMDMAState
*bm
= DO_UPCAST(BMDMAState
, dma
, dma
);
244 printf("ide: dma_reset\n");
251 bm
->cur_prd_last
= 0;
252 bm
->cur_prd_addr
= 0;
260 static int bmdma_start_transfer(IDEDMA
*dma
)
265 static void bmdma_irq(void *opaque
, int n
, int level
)
267 BMDMAState
*bm
= opaque
;
270 /* pass through lower */
271 qemu_set_irq(bm
->irq
, level
);
276 bm
->status
|= BM_STATUS_INT
;
279 /* trigger the real irq */
280 qemu_set_irq(bm
->irq
, level
);
283 void bmdma_cmd_writeb(void *opaque
, uint32_t addr
, uint32_t val
)
285 BMDMAState
*bm
= opaque
;
287 printf("%s: 0x%08x\n", __func__
, val
);
290 /* Ignore writes to SSBM if it keeps the old value */
291 if ((val
& BM_CMD_START
) != (bm
->cmd
& BM_CMD_START
)) {
292 if (!(val
& BM_CMD_START
)) {
294 * We can't cancel Scatter Gather DMA in the middle of the
295 * operation or a partial (not full) DMA transfer would reach
296 * the storage so we wait for completion instead (we beahve
297 * like if the DMA was completed by the time the guest trying
298 * to cancel dma with bmdma_cmd_writeb with BM_CMD_START not
301 * In the future we'll be able to safely cancel the I/O if the
302 * whole DMA operation will be submitted to disk with a single
303 * aio operation with preadv/pwritev.
305 if (bm
->bus
->dma
->aiocb
) {
308 if (bm
->bus
->dma
->aiocb
)
309 printf("ide_dma_cancel: aiocb still pending");
310 if (bm
->status
& BM_STATUS_DMAING
)
311 printf("ide_dma_cancel: BM_STATUS_DMAING still pending");
315 bm
->cur_addr
= bm
->addr
;
316 if (!(bm
->status
& BM_STATUS_DMAING
)) {
317 bm
->status
|= BM_STATUS_DMAING
;
318 /* start dma transfer if possible */
320 bm
->dma_cb(bmdma_active_if(bm
), 0);
325 bm
->cmd
= val
& 0x09;
328 static void bmdma_addr_read(IORange
*ioport
, uint64_t addr
,
329 unsigned width
, uint64_t *data
)
331 BMDMAState
*bm
= container_of(ioport
, BMDMAState
, addr_ioport
);
332 uint32_t mask
= (1ULL << (width
* 8)) - 1;
334 *data
= (bm
->addr
>> (addr
* 8)) & mask
;
336 printf("%s: 0x%08x\n", __func__
, (unsigned)*data
);
340 static void bmdma_addr_write(IORange
*ioport
, uint64_t addr
,
341 unsigned width
, uint64_t data
)
343 BMDMAState
*bm
= container_of(ioport
, BMDMAState
, addr_ioport
);
344 int shift
= addr
* 8;
345 uint32_t mask
= (1ULL << (width
* 8)) - 1;
348 printf("%s: 0x%08x\n", __func__
, (unsigned)data
);
350 bm
->addr
&= ~(mask
<< shift
);
351 bm
->addr
|= ((data
& mask
) << shift
) & ~3;
354 const IORangeOps bmdma_addr_ioport_ops
= {
355 .read
= bmdma_addr_read
,
356 .write
= bmdma_addr_write
,
359 static bool ide_bmdma_current_needed(void *opaque
)
361 BMDMAState
*bm
= opaque
;
363 return (bm
->cur_prd_len
!= 0);
366 static const VMStateDescription vmstate_bmdma_current
= {
367 .name
= "ide bmdma_current",
369 .minimum_version_id
= 1,
370 .minimum_version_id_old
= 1,
371 .fields
= (VMStateField
[]) {
372 VMSTATE_UINT32(cur_addr
, BMDMAState
),
373 VMSTATE_UINT32(cur_prd_last
, BMDMAState
),
374 VMSTATE_UINT32(cur_prd_addr
, BMDMAState
),
375 VMSTATE_UINT32(cur_prd_len
, BMDMAState
),
376 VMSTATE_END_OF_LIST()
381 static const VMStateDescription vmstate_bmdma
= {
384 .minimum_version_id
= 0,
385 .minimum_version_id_old
= 0,
386 .fields
= (VMStateField
[]) {
387 VMSTATE_UINT8(cmd
, BMDMAState
),
388 VMSTATE_UINT8(status
, BMDMAState
),
389 VMSTATE_UINT32(addr
, BMDMAState
),
390 VMSTATE_INT64(sector_num
, BMDMAState
),
391 VMSTATE_UINT32(nsector
, BMDMAState
),
392 VMSTATE_UINT8(unit
, BMDMAState
),
393 VMSTATE_END_OF_LIST()
395 .subsections
= (VMStateSubsection
[]) {
397 .vmsd
= &vmstate_bmdma_current
,
398 .needed
= ide_bmdma_current_needed
,
405 static int ide_pci_post_load(void *opaque
, int version_id
)
407 PCIIDEState
*d
= opaque
;
410 for(i
= 0; i
< 2; i
++) {
411 /* current versions always store 0/1, but older version
412 stored bigger values. We only need last bit */
413 d
->bmdma
[i
].unit
&= 1;
418 const VMStateDescription vmstate_ide_pci
= {
421 .minimum_version_id
= 0,
422 .minimum_version_id_old
= 0,
423 .post_load
= ide_pci_post_load
,
424 .fields
= (VMStateField
[]) {
425 VMSTATE_PCI_DEVICE(dev
, PCIIDEState
),
426 VMSTATE_STRUCT_ARRAY(bmdma
, PCIIDEState
, 2, 0,
427 vmstate_bmdma
, BMDMAState
),
428 VMSTATE_IDE_BUS_ARRAY(bus
, PCIIDEState
, 2),
429 VMSTATE_IDE_DRIVES(bus
[0].ifs
, PCIIDEState
),
430 VMSTATE_IDE_DRIVES(bus
[1].ifs
, PCIIDEState
),
431 VMSTATE_END_OF_LIST()
435 void pci_ide_create_devs(PCIDevice
*dev
, DriveInfo
**hd_table
)
437 PCIIDEState
*d
= DO_UPCAST(PCIIDEState
, dev
, dev
);
438 static const int bus
[4] = { 0, 0, 1, 1 };
439 static const int unit
[4] = { 0, 1, 0, 1 };
442 for (i
= 0; i
< 4; i
++) {
443 if (hd_table
[i
] == NULL
)
445 ide_create_drive(d
->bus
+bus
[i
], unit
[i
], hd_table
[i
]);
449 static const struct IDEDMAOps bmdma_ops
= {
450 .start_dma
= bmdma_start_dma
,
451 .start_transfer
= bmdma_start_transfer
,
452 .prepare_buf
= bmdma_prepare_buf
,
453 .rw_buf
= bmdma_rw_buf
,
454 .set_unit
= bmdma_set_unit
,
455 .add_status
= bmdma_add_status
,
456 .set_inactive
= bmdma_set_inactive
,
457 .restart_cb
= bmdma_restart_cb
,
458 .reset
= bmdma_reset
,
461 void bmdma_init(IDEBus
*bus
, BMDMAState
*bm
)
465 if (bus
->dma
== &bm
->dma
) {
469 bm
->dma
.ops
= &bmdma_ops
;
472 irq
= qemu_allocate_irqs(bmdma_irq
, bm
, 1);