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virtio: combine the read of a descriptor
[qemu.git] / hw / timer / twl92230.c
blob1c92438b18b6094cc14e81747ef88ab394a27ab3
1 /*
2 * TI TWL92230C energy-management companion device for the OMAP24xx.
3 * Aka. Menelaus (N4200 MENELAUS1_V2.2)
4 *
5 * Copyright (C) 2008 Nokia Corporation
6 * Written by Andrzej Zaborowski <andrew@openedhand.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 or
11 * (at your option) version 3 of the License.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, see <http://www.gnu.org/licenses/>.
20 */
21
22 #include "qemu/osdep.h"
23 #include "hw/hw.h"
24 #include "qemu/timer.h"
25 #include "hw/i2c/i2c.h"
26 #include "sysemu/sysemu.h"
27 #include "ui/console.h"
28
29 #define VERBOSE 1
30
31 #define TYPE_TWL92230 "twl92230"
32 #define TWL92230(obj) OBJECT_CHECK(MenelausState, (obj), TYPE_TWL92230)
33
34 typedef struct MenelausState {
35 I2CSlave parent_obj;
36
37 int firstbyte;
38 uint8_t reg;
39
40 uint8_t vcore[5];
41 uint8_t dcdc[3];
42 uint8_t ldo[8];
43 uint8_t sleep[2];
44 uint8_t osc;
45 uint8_t detect;
46 uint16_t mask;
47 uint16_t status;
48 uint8_t dir;
49 uint8_t inputs;
50 uint8_t outputs;
51 uint8_t bbsms;
52 uint8_t pull[4];
53 uint8_t mmc_ctrl[3];
54 uint8_t mmc_debounce;
55 struct {
56 uint8_t ctrl;
57 uint16_t comp;
58 QEMUTimer *hz_tm;
59 int64_t next;
60 struct tm tm;
61 struct tm new;
62 struct tm alm;
63 int sec_offset;
64 int alm_sec;
65 int next_comp;
66 } rtc;
67 uint16_t rtc_next_vmstate;
68 qemu_irq out[4];
69 uint8_t pwrbtn_state;
70 } MenelausState;
71
72 static inline void menelaus_update(MenelausState *s)
73 {
74 qemu_set_irq(s->out[3], s->status & ~s->mask);
75 }
76
77 static inline void menelaus_rtc_start(MenelausState *s)
78 {
79 s->rtc.next += qemu_clock_get_ms(rtc_clock);
80 timer_mod(s->rtc.hz_tm, s->rtc.next);
81 }
82
83 static inline void menelaus_rtc_stop(MenelausState *s)
84 {
85 timer_del(s->rtc.hz_tm);
86 s->rtc.next -= qemu_clock_get_ms(rtc_clock);
87 if (s->rtc.next < 1)
88 s->rtc.next = 1;
89 }
90
91 static void menelaus_rtc_update(MenelausState *s)
92 {
93 qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset);
94 }
95
96 static void menelaus_alm_update(MenelausState *s)
97 {
98 if ((s->rtc.ctrl & 3) == 3)
99 s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset;
100 }
101
102 static void menelaus_rtc_hz(void *opaque)
103 {
104 MenelausState *s = (MenelausState *) opaque;
105
106 s->rtc.next_comp --;
107 s->rtc.alm_sec --;
108 s->rtc.next += 1000;
109 timer_mod(s->rtc.hz_tm, s->rtc.next);
110 if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */
111 menelaus_rtc_update(s);
112 if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec)
113 s->status |= 1 << 8; /* RTCTMR */
114 else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min)
115 s->status |= 1 << 8; /* RTCTMR */
116 else if (!s->rtc.tm.tm_hour)
117 s->status |= 1 << 8; /* RTCTMR */
118 } else
119 s->status |= 1 << 8; /* RTCTMR */
120 if ((s->rtc.ctrl >> 1) & 1) { /* RTC_AL_EN */
121 if (s->rtc.alm_sec == 0)
122 s->status |= 1 << 9; /* RTCALM */
123 /* TODO: wake-up */
124 }
125 if (s->rtc.next_comp <= 0) {
126 s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000);
127 s->rtc.next_comp = 3600;
128 }
129 menelaus_update(s);
130 }
131
132 static void menelaus_reset(I2CSlave *i2c)
133 {
134 MenelausState *s = TWL92230(i2c);
135
136 s->reg = 0x00;
137
138 s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */
139 s->vcore[1] = 0x05;
140 s->vcore[2] = 0x02;
141 s->vcore[3] = 0x0c;
142 s->vcore[4] = 0x03;
143 s->dcdc[0] = 0x33; /* Depends on wiring */
144 s->dcdc[1] = 0x03;
145 s->dcdc[2] = 0x00;
146 s->ldo[0] = 0x95;
147 s->ldo[1] = 0x7e;
148 s->ldo[2] = 0x00;
149 s->ldo[3] = 0x00; /* Depends on wiring */
150 s->ldo[4] = 0x03; /* Depends on wiring */
151 s->ldo[5] = 0x00;
152 s->ldo[6] = 0x00;
153 s->ldo[7] = 0x00;
154 s->sleep[0] = 0x00;
155 s->sleep[1] = 0x00;
156 s->osc = 0x01;
157 s->detect = 0x09;
158 s->mask = 0x0fff;
159 s->status = 0;
160 s->dir = 0x07;
161 s->outputs = 0x00;
162 s->bbsms = 0x00;
163 s->pull[0] = 0x00;
164 s->pull[1] = 0x00;
165 s->pull[2] = 0x00;
166 s->pull[3] = 0x00;
167 s->mmc_ctrl[0] = 0x03;
168 s->mmc_ctrl[1] = 0xc0;
169 s->mmc_ctrl[2] = 0x00;
170 s->mmc_debounce = 0x05;
171
172 if (s->rtc.ctrl & 1)
173 menelaus_rtc_stop(s);
174 s->rtc.ctrl = 0x00;
175 s->rtc.comp = 0x0000;
176 s->rtc.next = 1000;
177 s->rtc.sec_offset = 0;
178 s->rtc.next_comp = 1800;
179 s->rtc.alm_sec = 1800;
180 s->rtc.alm.tm_sec = 0x00;
181 s->rtc.alm.tm_min = 0x00;
182 s->rtc.alm.tm_hour = 0x00;
183 s->rtc.alm.tm_mday = 0x01;
184 s->rtc.alm.tm_mon = 0x00;
185 s->rtc.alm.tm_year = 2004;
186 menelaus_update(s);
187 }
188
189 static void menelaus_gpio_set(void *opaque, int line, int level)
190 {
191 MenelausState *s = (MenelausState *) opaque;
192
193 if (line < 3) {
194 /* No interrupt generated */
195 s->inputs &= ~(1 << line);
196 s->inputs |= level << line;
197 return;
198 }
199
200 if (!s->pwrbtn_state && level) {
201 s->status |= 1 << 11; /* PSHBTN */
202 menelaus_update(s);
203 }
204 s->pwrbtn_state = level;
205 }
206
207 #define MENELAUS_REV 0x01
208 #define MENELAUS_VCORE_CTRL1 0x02
209 #define MENELAUS_VCORE_CTRL2 0x03
210 #define MENELAUS_VCORE_CTRL3 0x04
211 #define MENELAUS_VCORE_CTRL4 0x05
212 #define MENELAUS_VCORE_CTRL5 0x06
213 #define MENELAUS_DCDC_CTRL1 0x07
214 #define MENELAUS_DCDC_CTRL2 0x08
215 #define MENELAUS_DCDC_CTRL3 0x09
216 #define MENELAUS_LDO_CTRL1 0x0a
217 #define MENELAUS_LDO_CTRL2 0x0b
218 #define MENELAUS_LDO_CTRL3 0x0c
219 #define MENELAUS_LDO_CTRL4 0x0d
220 #define MENELAUS_LDO_CTRL5 0x0e
221 #define MENELAUS_LDO_CTRL6 0x0f
222 #define MENELAUS_LDO_CTRL7 0x10
223 #define MENELAUS_LDO_CTRL8 0x11
224 #define MENELAUS_SLEEP_CTRL1 0x12
225 #define MENELAUS_SLEEP_CTRL2 0x13
226 #define MENELAUS_DEVICE_OFF 0x14
227 #define MENELAUS_OSC_CTRL 0x15
228 #define MENELAUS_DETECT_CTRL 0x16
229 #define MENELAUS_INT_MASK1 0x17
230 #define MENELAUS_INT_MASK2 0x18
231 #define MENELAUS_INT_STATUS1 0x19
232 #define MENELAUS_INT_STATUS2 0x1a
233 #define MENELAUS_INT_ACK1 0x1b
234 #define MENELAUS_INT_ACK2 0x1c
235 #define MENELAUS_GPIO_CTRL 0x1d
236 #define MENELAUS_GPIO_IN 0x1e
237 #define MENELAUS_GPIO_OUT 0x1f
238 #define MENELAUS_BBSMS 0x20
239 #define MENELAUS_RTC_CTRL 0x21
240 #define MENELAUS_RTC_UPDATE 0x22
241 #define MENELAUS_RTC_SEC 0x23
242 #define MENELAUS_RTC_MIN 0x24
243 #define MENELAUS_RTC_HR 0x25
244 #define MENELAUS_RTC_DAY 0x26
245 #define MENELAUS_RTC_MON 0x27
246 #define MENELAUS_RTC_YR 0x28
247 #define MENELAUS_RTC_WKDAY 0x29
248 #define MENELAUS_RTC_AL_SEC 0x2a
249 #define MENELAUS_RTC_AL_MIN 0x2b
250 #define MENELAUS_RTC_AL_HR 0x2c
251 #define MENELAUS_RTC_AL_DAY 0x2d
252 #define MENELAUS_RTC_AL_MON 0x2e
253 #define MENELAUS_RTC_AL_YR 0x2f
254 #define MENELAUS_RTC_COMP_MSB 0x30
255 #define MENELAUS_RTC_COMP_LSB 0x31
256 #define MENELAUS_S1_PULL_EN 0x32
257 #define MENELAUS_S1_PULL_DIR 0x33
258 #define MENELAUS_S2_PULL_EN 0x34
259 #define MENELAUS_S2_PULL_DIR 0x35
260 #define MENELAUS_MCT_CTRL1 0x36
261 #define MENELAUS_MCT_CTRL2 0x37
262 #define MENELAUS_MCT_CTRL3 0x38
263 #define MENELAUS_MCT_PIN_ST 0x39
264 #define MENELAUS_DEBOUNCE1 0x3a
265
266 static uint8_t menelaus_read(void *opaque, uint8_t addr)
267 {
268 MenelausState *s = (MenelausState *) opaque;
269 int reg = 0;
270
271 switch (addr) {
272 case MENELAUS_REV:
273 return 0x22;
274
275 case MENELAUS_VCORE_CTRL5: reg ++;
276 case MENELAUS_VCORE_CTRL4: reg ++;
277 case MENELAUS_VCORE_CTRL3: reg ++;
278 case MENELAUS_VCORE_CTRL2: reg ++;
279 case MENELAUS_VCORE_CTRL1:
280 return s->vcore[reg];
281
282 case MENELAUS_DCDC_CTRL3: reg ++;
283 case MENELAUS_DCDC_CTRL2: reg ++;
284 case MENELAUS_DCDC_CTRL1:
285 return s->dcdc[reg];
286
287 case MENELAUS_LDO_CTRL8: reg ++;
288 case MENELAUS_LDO_CTRL7: reg ++;
289 case MENELAUS_LDO_CTRL6: reg ++;
290 case MENELAUS_LDO_CTRL5: reg ++;
291 case MENELAUS_LDO_CTRL4: reg ++;
292 case MENELAUS_LDO_CTRL3: reg ++;
293 case MENELAUS_LDO_CTRL2: reg ++;
294 case MENELAUS_LDO_CTRL1:
295 return s->ldo[reg];
296
297 case MENELAUS_SLEEP_CTRL2: reg ++;
298 case MENELAUS_SLEEP_CTRL1:
299 return s->sleep[reg];
300
301 case MENELAUS_DEVICE_OFF:
302 return 0;
303
304 case MENELAUS_OSC_CTRL:
305 return s->osc | (1 << 7); /* CLK32K_GOOD */
306
307 case MENELAUS_DETECT_CTRL:
308 return s->detect;
309
310 case MENELAUS_INT_MASK1:
311 return (s->mask >> 0) & 0xff;
312 case MENELAUS_INT_MASK2:
313 return (s->mask >> 8) & 0xff;
314
315 case MENELAUS_INT_STATUS1:
316 return (s->status >> 0) & 0xff;
317 case MENELAUS_INT_STATUS2:
318 return (s->status >> 8) & 0xff;
319
320 case MENELAUS_INT_ACK1:
321 case MENELAUS_INT_ACK2:
322 return 0;
323
324 case MENELAUS_GPIO_CTRL:
325 return s->dir;
326 case MENELAUS_GPIO_IN:
327 return s->inputs | (~s->dir & s->outputs);
328 case MENELAUS_GPIO_OUT:
329 return s->outputs;
330
331 case MENELAUS_BBSMS:
332 return s->bbsms;
333
334 case MENELAUS_RTC_CTRL:
335 return s->rtc.ctrl;
336 case MENELAUS_RTC_UPDATE:
337 return 0x00;
338 case MENELAUS_RTC_SEC:
339 menelaus_rtc_update(s);
340 return to_bcd(s->rtc.tm.tm_sec);
341 case MENELAUS_RTC_MIN:
342 menelaus_rtc_update(s);
343 return to_bcd(s->rtc.tm.tm_min);
344 case MENELAUS_RTC_HR:
345 menelaus_rtc_update(s);
346 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
347 return to_bcd((s->rtc.tm.tm_hour % 12) + 1) |
348 (!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */
349 else
350 return to_bcd(s->rtc.tm.tm_hour);
351 case MENELAUS_RTC_DAY:
352 menelaus_rtc_update(s);
353 return to_bcd(s->rtc.tm.tm_mday);
354 case MENELAUS_RTC_MON:
355 menelaus_rtc_update(s);
356 return to_bcd(s->rtc.tm.tm_mon + 1);
357 case MENELAUS_RTC_YR:
358 menelaus_rtc_update(s);
359 return to_bcd(s->rtc.tm.tm_year - 2000);
360 case MENELAUS_RTC_WKDAY:
361 menelaus_rtc_update(s);
362 return to_bcd(s->rtc.tm.tm_wday);
363 case MENELAUS_RTC_AL_SEC:
364 return to_bcd(s->rtc.alm.tm_sec);
365 case MENELAUS_RTC_AL_MIN:
366 return to_bcd(s->rtc.alm.tm_min);
367 case MENELAUS_RTC_AL_HR:
368 if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
369 return to_bcd((s->rtc.alm.tm_hour % 12) + 1) |
370 (!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */
371 else
372 return to_bcd(s->rtc.alm.tm_hour);
373 case MENELAUS_RTC_AL_DAY:
374 return to_bcd(s->rtc.alm.tm_mday);
375 case MENELAUS_RTC_AL_MON:
376 return to_bcd(s->rtc.alm.tm_mon + 1);
377 case MENELAUS_RTC_AL_YR:
378 return to_bcd(s->rtc.alm.tm_year - 2000);
379 case MENELAUS_RTC_COMP_MSB:
380 return (s->rtc.comp >> 8) & 0xff;
381 case MENELAUS_RTC_COMP_LSB:
382 return (s->rtc.comp >> 0) & 0xff;
383
384 case MENELAUS_S1_PULL_EN:
385 return s->pull[0];
386 case MENELAUS_S1_PULL_DIR:
387 return s->pull[1];
388 case MENELAUS_S2_PULL_EN:
389 return s->pull[2];
390 case MENELAUS_S2_PULL_DIR:
391 return s->pull[3];
392
393 case MENELAUS_MCT_CTRL3: reg ++;
394 case MENELAUS_MCT_CTRL2: reg ++;
395 case MENELAUS_MCT_CTRL1:
396 return s->mmc_ctrl[reg];
397 case MENELAUS_MCT_PIN_ST:
398 /* TODO: return the real Card Detect */
399 return 0;
400 case MENELAUS_DEBOUNCE1:
401 return s->mmc_debounce;
402
403 default:
404 #ifdef VERBOSE
405 printf("%s: unknown register %02x\n", __FUNCTION__, addr);
406 #endif
407 break;
408 }
409 return 0;
410 }
411
412 static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
413 {
414 MenelausState *s = (MenelausState *) opaque;
415 int line;
416 int reg = 0;
417 struct tm tm;
418
419 switch (addr) {
420 case MENELAUS_VCORE_CTRL1:
421 s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12);
422 break;
423 case MENELAUS_VCORE_CTRL2:
424 s->vcore[1] = value;
425 break;
426 case MENELAUS_VCORE_CTRL3:
427 s->vcore[2] = MIN(value & 0x1f, 0x12);
428 break;
429 case MENELAUS_VCORE_CTRL4:
430 s->vcore[3] = MIN(value & 0x1f, 0x12);
431 break;
432 case MENELAUS_VCORE_CTRL5:
433 s->vcore[4] = value & 3;
434 /* XXX
435 * auto set to 3 on M_Active, nRESWARM
436 * auto set to 0 on M_WaitOn, M_Backup
437 */
438 break;
439
440 case MENELAUS_DCDC_CTRL1:
441 s->dcdc[0] = value & 0x3f;
442 break;
443 case MENELAUS_DCDC_CTRL2:
444 s->dcdc[1] = value & 0x07;
445 /* XXX
446 * auto set to 3 on M_Active, nRESWARM
447 * auto set to 0 on M_WaitOn, M_Backup
448 */
449 break;
450 case MENELAUS_DCDC_CTRL3:
451 s->dcdc[2] = value & 0x07;
452 break;
453
454 case MENELAUS_LDO_CTRL1:
455 s->ldo[0] = value;
456 break;
457 case MENELAUS_LDO_CTRL2:
458 s->ldo[1] = value & 0x7f;
459 /* XXX
460 * auto set to 0x7e on M_WaitOn, M_Backup
461 */
462 break;
463 case MENELAUS_LDO_CTRL3:
464 s->ldo[2] = value & 3;
465 /* XXX
466 * auto set to 3 on M_Active, nRESWARM
467 * auto set to 0 on M_WaitOn, M_Backup
468 */
469 break;
470 case MENELAUS_LDO_CTRL4:
471 s->ldo[3] = value & 3;
472 /* XXX
473 * auto set to 3 on M_Active, nRESWARM
474 * auto set to 0 on M_WaitOn, M_Backup
475 */
476 break;
477 case MENELAUS_LDO_CTRL5:
478 s->ldo[4] = value & 3;
479 /* XXX
480 * auto set to 3 on M_Active, nRESWARM
481 * auto set to 0 on M_WaitOn, M_Backup
482 */
483 break;
484 case MENELAUS_LDO_CTRL6:
485 s->ldo[5] = value & 3;
486 break;
487 case MENELAUS_LDO_CTRL7:
488 s->ldo[6] = value & 3;
489 break;
490 case MENELAUS_LDO_CTRL8:
491 s->ldo[7] = value & 3;
492 break;
493
494 case MENELAUS_SLEEP_CTRL2: reg ++;
495 case MENELAUS_SLEEP_CTRL1:
496 s->sleep[reg] = value;
497 break;
498
499 case MENELAUS_DEVICE_OFF:
500 if (value & 1) {
501 menelaus_reset(I2C_SLAVE(s));
502 }
503 break;
504
505 case MENELAUS_OSC_CTRL:
506 s->osc = value & 7;
507 break;
508
509 case MENELAUS_DETECT_CTRL:
510 s->detect = value & 0x7f;
511 break;
512
513 case MENELAUS_INT_MASK1:
514 s->mask &= 0xf00;
515 s->mask |= value << 0;
516 menelaus_update(s);
517 break;
518 case MENELAUS_INT_MASK2:
519 s->mask &= 0x0ff;
520 s->mask |= value << 8;
521 menelaus_update(s);
522 break;
523
524 case MENELAUS_INT_ACK1:
525 s->status &= ~(((uint16_t) value) << 0);
526 menelaus_update(s);
527 break;
528 case MENELAUS_INT_ACK2:
529 s->status &= ~(((uint16_t) value) << 8);
530 menelaus_update(s);
531 break;
532
533 case MENELAUS_GPIO_CTRL:
534 for (line = 0; line < 3; line ++) {
535 if (((s->dir ^ value) >> line) & 1) {
536 qemu_set_irq(s->out[line],
537 ((s->outputs & ~s->dir) >> line) & 1);
538 }
539 }
540 s->dir = value & 0x67;
541 break;
542 case MENELAUS_GPIO_OUT:
543 for (line = 0; line < 3; line ++) {
544 if ((((s->outputs ^ value) & ~s->dir) >> line) & 1) {
545 qemu_set_irq(s->out[line], (s->outputs >> line) & 1);
546 }
547 }
548 s->outputs = value & 0x07;
549 break;
550
551 case MENELAUS_BBSMS:
552 s->bbsms = 0x0d;
553 break;
554
555 case MENELAUS_RTC_CTRL:
556 if ((s->rtc.ctrl ^ value) & 1) { /* RTC_EN */
557 if (value & 1)
558 menelaus_rtc_start(s);
559 else
560 menelaus_rtc_stop(s);
561 }
562 s->rtc.ctrl = value & 0x1f;
563 menelaus_alm_update(s);
564 break;
565 case MENELAUS_RTC_UPDATE:
566 menelaus_rtc_update(s);
567 memcpy(&tm, &s->rtc.tm, sizeof(tm));
568 switch (value & 0xf) {
569 case 0:
570 break;
571 case 1:
572 tm.tm_sec = s->rtc.new.tm_sec;
573 break;
574 case 2:
575 tm.tm_min = s->rtc.new.tm_min;
576 break;
577 case 3:
578 if (s->rtc.new.tm_hour > 23)
579 goto rtc_badness;
580 tm.tm_hour = s->rtc.new.tm_hour;
581 break;
582 case 4:
583 if (s->rtc.new.tm_mday < 1)
584 goto rtc_badness;
585 /* TODO check range */
586 tm.tm_mday = s->rtc.new.tm_mday;
587 break;
588 case 5:
589 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
590 goto rtc_badness;
591 tm.tm_mon = s->rtc.new.tm_mon;
592 break;
593 case 6:
594 tm.tm_year = s->rtc.new.tm_year;
595 break;
596 case 7:
597 /* TODO set .tm_mday instead */
598 tm.tm_wday = s->rtc.new.tm_wday;
599 break;
600 case 8:
601 if (s->rtc.new.tm_hour > 23)
602 goto rtc_badness;
603 if (s->rtc.new.tm_mday < 1)
604 goto rtc_badness;
605 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
606 goto rtc_badness;
607 tm.tm_sec = s->rtc.new.tm_sec;
608 tm.tm_min = s->rtc.new.tm_min;
609 tm.tm_hour = s->rtc.new.tm_hour;
610 tm.tm_mday = s->rtc.new.tm_mday;
611 tm.tm_mon = s->rtc.new.tm_mon;
612 tm.tm_year = s->rtc.new.tm_year;
613 break;
614 rtc_badness:
615 default:
616 fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n",
617 __FUNCTION__, value);
618 s->status |= 1 << 10; /* RTCERR */
619 menelaus_update(s);
620 }
621 s->rtc.sec_offset = qemu_timedate_diff(&tm);
622 break;
623 case MENELAUS_RTC_SEC:
624 s->rtc.tm.tm_sec = from_bcd(value & 0x7f);
625 break;
626 case MENELAUS_RTC_MIN:
627 s->rtc.tm.tm_min = from_bcd(value & 0x7f);
628 break;
629 case MENELAUS_RTC_HR:
630 s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
631 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
632 from_bcd(value & 0x3f);
633 break;
634 case MENELAUS_RTC_DAY:
635 s->rtc.tm.tm_mday = from_bcd(value);
636 break;
637 case MENELAUS_RTC_MON:
638 s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1;
639 break;
640 case MENELAUS_RTC_YR:
641 s->rtc.tm.tm_year = 2000 + from_bcd(value);
642 break;
643 case MENELAUS_RTC_WKDAY:
644 s->rtc.tm.tm_mday = from_bcd(value);
645 break;
646 case MENELAUS_RTC_AL_SEC:
647 s->rtc.alm.tm_sec = from_bcd(value & 0x7f);
648 menelaus_alm_update(s);
649 break;
650 case MENELAUS_RTC_AL_MIN:
651 s->rtc.alm.tm_min = from_bcd(value & 0x7f);
652 menelaus_alm_update(s);
653 break;
654 case MENELAUS_RTC_AL_HR:
655 s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
656 MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
657 from_bcd(value & 0x3f);
658 menelaus_alm_update(s);
659 break;
660 case MENELAUS_RTC_AL_DAY:
661 s->rtc.alm.tm_mday = from_bcd(value);
662 menelaus_alm_update(s);
663 break;
664 case MENELAUS_RTC_AL_MON:
665 s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1;
666 menelaus_alm_update(s);
667 break;
668 case MENELAUS_RTC_AL_YR:
669 s->rtc.alm.tm_year = 2000 + from_bcd(value);
670 menelaus_alm_update(s);
671 break;
672 case MENELAUS_RTC_COMP_MSB:
673 s->rtc.comp &= 0xff;
674 s->rtc.comp |= value << 8;
675 break;
676 case MENELAUS_RTC_COMP_LSB:
677 s->rtc.comp &= 0xff << 8;
678 s->rtc.comp |= value;
679 break;
680
681 case MENELAUS_S1_PULL_EN:
682 s->pull[0] = value;
683 break;
684 case MENELAUS_S1_PULL_DIR:
685 s->pull[1] = value & 0x1f;
686 break;
687 case MENELAUS_S2_PULL_EN:
688 s->pull[2] = value;
689 break;
690 case MENELAUS_S2_PULL_DIR:
691 s->pull[3] = value & 0x1f;
692 break;
693
694 case MENELAUS_MCT_CTRL1:
695 s->mmc_ctrl[0] = value & 0x7f;
696 break;
697 case MENELAUS_MCT_CTRL2:
698 s->mmc_ctrl[1] = value;
699 /* TODO update Card Detect interrupts */
700 break;
701 case MENELAUS_MCT_CTRL3:
702 s->mmc_ctrl[2] = value & 0xf;
703 break;
704 case MENELAUS_DEBOUNCE1:
705 s->mmc_debounce = value & 0x3f;
706 break;
707
708 default:
709 #ifdef VERBOSE
710 printf("%s: unknown register %02x\n", __FUNCTION__, addr);
711 #endif
712 }
713 }
714
715 static void menelaus_event(I2CSlave *i2c, enum i2c_event event)
716 {
717 MenelausState *s = TWL92230(i2c);
718
719 if (event == I2C_START_SEND)
720 s->firstbyte = 1;
721 }
722
723 static int menelaus_tx(I2CSlave *i2c, uint8_t data)
724 {
725 MenelausState *s = TWL92230(i2c);
726
727 /* Interpret register address byte */
728 if (s->firstbyte) {
729 s->reg = data;
730 s->firstbyte = 0;
731 } else
732 menelaus_write(s, s->reg ++, data);
733
734 return 0;
735 }
736
737 static int menelaus_rx(I2CSlave *i2c)
738 {
739 MenelausState *s = TWL92230(i2c);
740
741 return menelaus_read(s, s->reg ++);
742 }
743
744 /* Save restore 32 bit int as uint16_t
745 This is a Big hack, but it is how the old state did it.
746 Or we broke compatibility in the state, or we can't use struct tm
747 */
748
749 static int get_int32_as_uint16(QEMUFile *f, void *pv, size_t size)
750 {
751 int *v = pv;
752 *v = qemu_get_be16(f);
753 return 0;
754 }
755
756 static void put_int32_as_uint16(QEMUFile *f, void *pv, size_t size)
757 {
758 int *v = pv;
759 qemu_put_be16(f, *v);
760 }
761
762 static const VMStateInfo vmstate_hack_int32_as_uint16 = {
763 .name = "int32_as_uint16",
764 .get = get_int32_as_uint16,
765 .put = put_int32_as_uint16,
766 };
767
768 #define VMSTATE_UINT16_HACK(_f, _s) \
769 VMSTATE_SINGLE(_f, _s, 0, vmstate_hack_int32_as_uint16, int32_t)
770
771
772 static const VMStateDescription vmstate_menelaus_tm = {
773 .name = "menelaus_tm",
774 .version_id = 0,
775 .minimum_version_id = 0,
776 .fields = (VMStateField[]) {
777 VMSTATE_UINT16_HACK(tm_sec, struct tm),
778 VMSTATE_UINT16_HACK(tm_min, struct tm),
779 VMSTATE_UINT16_HACK(tm_hour, struct tm),
780 VMSTATE_UINT16_HACK(tm_mday, struct tm),
781 VMSTATE_UINT16_HACK(tm_min, struct tm),
782 VMSTATE_UINT16_HACK(tm_year, struct tm),
783 VMSTATE_END_OF_LIST()
784 }
785 };
786
787 static void menelaus_pre_save(void *opaque)
788 {
789 MenelausState *s = opaque;
790 /* Should be <= 1000 */
791 s->rtc_next_vmstate = s->rtc.next - qemu_clock_get_ms(rtc_clock);
792 }
793
794 static int menelaus_post_load(void *opaque, int version_id)
795 {
796 MenelausState *s = opaque;
797
798 if (s->rtc.ctrl & 1) /* RTC_EN */
799 menelaus_rtc_stop(s);
800
801 s->rtc.next = s->rtc_next_vmstate;
802
803 menelaus_alm_update(s);
804 menelaus_update(s);
805 if (s->rtc.ctrl & 1) /* RTC_EN */
806 menelaus_rtc_start(s);
807 return 0;
808 }
809
810 static const VMStateDescription vmstate_menelaus = {
811 .name = "menelaus",
812 .version_id = 0,
813 .minimum_version_id = 0,
814 .pre_save = menelaus_pre_save,
815 .post_load = menelaus_post_load,
816 .fields = (VMStateField[]) {
817 VMSTATE_INT32(firstbyte, MenelausState),
818 VMSTATE_UINT8(reg, MenelausState),
819 VMSTATE_UINT8_ARRAY(vcore, MenelausState, 5),
820 VMSTATE_UINT8_ARRAY(dcdc, MenelausState, 3),
821 VMSTATE_UINT8_ARRAY(ldo, MenelausState, 8),
822 VMSTATE_UINT8_ARRAY(sleep, MenelausState, 2),
823 VMSTATE_UINT8(osc, MenelausState),
824 VMSTATE_UINT8(detect, MenelausState),
825 VMSTATE_UINT16(mask, MenelausState),
826 VMSTATE_UINT16(status, MenelausState),
827 VMSTATE_UINT8(dir, MenelausState),
828 VMSTATE_UINT8(inputs, MenelausState),
829 VMSTATE_UINT8(outputs, MenelausState),
830 VMSTATE_UINT8(bbsms, MenelausState),
831 VMSTATE_UINT8_ARRAY(pull, MenelausState, 4),
832 VMSTATE_UINT8_ARRAY(mmc_ctrl, MenelausState, 3),
833 VMSTATE_UINT8(mmc_debounce, MenelausState),
834 VMSTATE_UINT8(rtc.ctrl, MenelausState),
835 VMSTATE_UINT16(rtc.comp, MenelausState),
836 VMSTATE_UINT16(rtc_next_vmstate, MenelausState),
837 VMSTATE_STRUCT(rtc.new, MenelausState, 0, vmstate_menelaus_tm,
838 struct tm),
839 VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm,
840 struct tm),
841 VMSTATE_UINT8(pwrbtn_state, MenelausState),
842 VMSTATE_I2C_SLAVE(parent_obj, MenelausState),
843 VMSTATE_END_OF_LIST()
844 }
845 };
846
847 static int twl92230_init(I2CSlave *i2c)
848 {
849 DeviceState *dev = DEVICE(i2c);
850 MenelausState *s = TWL92230(i2c);
851
852 s->rtc.hz_tm = timer_new_ms(rtc_clock, menelaus_rtc_hz, s);
853 /* Three output pins plus one interrupt pin. */
854 qdev_init_gpio_out(dev, s->out, 4);
855
856 /* Three input pins plus one power-button pin. */
857 qdev_init_gpio_in(dev, menelaus_gpio_set, 4);
858
859 menelaus_reset(i2c);
860
861 return 0;
862 }
863
864 static void twl92230_class_init(ObjectClass *klass, void *data)
865 {
866 DeviceClass *dc = DEVICE_CLASS(klass);
867 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
868
869 sc->init = twl92230_init;
870 sc->event = menelaus_event;
871 sc->recv = menelaus_rx;
872 sc->send = menelaus_tx;
873 dc->vmsd = &vmstate_menelaus;
874 }
875
876 static const TypeInfo twl92230_info = {
877 .name = TYPE_TWL92230,
878 .parent = TYPE_I2C_SLAVE,
879 .instance_size = sizeof(MenelausState),
880 .class_init = twl92230_class_init,
881 };
882
883 static void twl92230_register_types(void)
884 {
885 type_register_static(&twl92230_info);
886 }
887
888 type_init(twl92230_register_types)
QEmu