hw/arm/digic.c

   1 /*
   2  * QEMU model of the Canon DIGIC SoC.
   3  *
   4  * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
   5  *
   6  * This model is based on reverse engineering efforts
   7  * made by CHDK (http://chdk.wikia.com) and
   8  * Magic Lantern (http://www.magiclantern.fm) projects
   9  * contributors.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License as published by
  13  * the Free Software Foundation; either version 2 of the License, or
  14  * (at your option) any later version.
  15  *
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19  * GNU General Public License for more details.
  20  *
  21  */
  22
  23 #include "qemu/osdep.h"
  24 #include "hw/arm/digic.h"
  25
  26 #define DIGIC4_TIMER_BASE(n)    (0xc0210000 + (n) * 0x100)
  27
  28 #define DIGIC_UART_BASE          0xc0800000
  29
  30 static void digic_init(Object *obj)
  31 {
  32     DigicState *s = DIGIC(obj);
  33     DeviceState *dev;
  34     int i;
  35
  36     object_initialize(&s->cpu, sizeof(s->cpu), "arm946-" TYPE_ARM_CPU);
  37     object_property_add_child(obj, "cpu", OBJECT(&s->cpu), NULL);
  38
  39     for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
  40 #define DIGIC_TIMER_NAME_MLEN    11
  41         char name[DIGIC_TIMER_NAME_MLEN];
  42
  43         object_initialize(&s->timer[i], sizeof(s->timer[i]), TYPE_DIGIC_TIMER);
  44         dev = DEVICE(&s->timer[i]);
  45         qdev_set_parent_bus(dev, sysbus_get_default());
  46         snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
  47         object_property_add_child(obj, name, OBJECT(&s->timer[i]), NULL);
  48     }
  49
  50     object_initialize(&s->uart, sizeof(s->uart), TYPE_DIGIC_UART);
  51     dev = DEVICE(&s->uart);
  52     qdev_set_parent_bus(dev, sysbus_get_default());
  53     object_property_add_child(obj, "uart", OBJECT(&s->uart), NULL);
  54 }
  55
  56 static void digic_realize(DeviceState *dev, Error **errp)
  57 {
  58     DigicState *s = DIGIC(dev);
  59     Error *err = NULL;
  60     SysBusDevice *sbd;
  61     int i;
  62
  63     object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
  64     if (err != NULL) {
  65         error_propagate(errp, err);
  66         return;
  67     }
  68
  69     object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
  70     if (err != NULL) {
  71         error_propagate(errp, err);
  72         return;
  73     }
  74
  75     for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
  76         object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err);
  77         if (err != NULL) {
  78             error_propagate(errp, err);
  79             return;
  80         }
  81
  82         sbd = SYS_BUS_DEVICE(&s->timer[i]);
  83         sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
  84     }
  85
  86     object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
  87     if (err != NULL) {
  88         error_propagate(errp, err);
  89         return;
  90     }
  91
  92     sbd = SYS_BUS_DEVICE(&s->uart);
  93     sysbus_mmio_map(sbd, 0, DIGIC_UART_BASE);
  94 }
  95
  96 static void digic_class_init(ObjectClass *oc, void *data)
  97 {
  98     DeviceClass *dc = DEVICE_CLASS(oc);
  99
 100     dc->realize = digic_realize;
 101
 102     /*
 103      * Reason: creates an ARM CPU, thus use after free(), see
 104      * arm_cpu_class_init()
 105      */
 106     dc->cannot_destroy_with_object_finalize_yet = true;
 107 }
 108
 109 static const TypeInfo digic_type_info = {
 110     .name = TYPE_DIGIC,
 111     .parent = TYPE_DEVICE,
 112     .instance_size = sizeof(DigicState),
 113     .instance_init = digic_init,
 114     .class_init = digic_class_init,
 115 };
 116
 117 static void digic_register_types(void)
 118 {
 119     type_register_static(&digic_type_info);
 120 }
 121
 122 type_init(digic_register_types)