4 * Copyright (c) 2007 AXIS Communications
5 * Written by Edgar E. Iglesias
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include "qemu/osdep.h"
24 #include "exec/helper-proto.h"
25 #include "qemu/host-utils.h"
26 #include "exec/exec-all.h"
27 #include "exec/cpu_ldst.h"
29 //#define CRIS_OP_HELPER_DEBUG
32 #ifdef CRIS_OP_HELPER_DEBUG
34 #define D_LOG(...) qemu_log(__VA_ARGS__)
37 #define D_LOG(...) do { } while (0)
40 void helper_raise_exception(CPUCRISState
*env
, uint32_t index
)
42 CPUState
*cs
= env_cpu(env
);
44 cs
->exception_index
= index
;
48 void helper_tlb_flush_pid(CPUCRISState
*env
, uint32_t pid
)
50 #if !defined(CONFIG_USER_ONLY)
52 if (pid
!= (env
->pregs
[PR_PID
] & 0xff)) {
53 cris_mmu_flush_pid(env
, env
->pregs
[PR_PID
]);
58 void helper_spc_write(CPUCRISState
*env
, uint32_t new_spc
)
60 #if !defined(CONFIG_USER_ONLY)
61 CPUState
*cs
= env_cpu(env
);
63 tlb_flush_page(cs
, env
->pregs
[PR_SPC
]);
64 tlb_flush_page(cs
, new_spc
);
68 /* Used by the tlb decoder. */
69 #define EXTRACT_FIELD(src, start, end) \
70 (((src) >> start) & ((1 << (end - start + 1)) - 1))
72 void helper_movl_sreg_reg(CPUCRISState
*env
, uint32_t sreg
, uint32_t reg
)
75 srs
= env
->pregs
[PR_SRS
];
77 env
->sregs
[srs
][sreg
] = env
->regs
[reg
];
79 #if !defined(CONFIG_USER_ONLY)
80 if (srs
== 1 || srs
== 2) {
82 /* Writes to tlb-hi write to mm_cause as a side effect. */
83 env
->sregs
[SFR_RW_MM_TLB_HI
] = env
->regs
[reg
];
84 env
->sregs
[SFR_R_MM_CAUSE
] = env
->regs
[reg
];
85 } else if (sreg
== 5) {
92 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
97 /* We've just made a write to tlb_lo. */
98 lo
= env
->sregs
[SFR_RW_MM_TLB_LO
];
99 /* Writes are done via r_mm_cause. */
100 hi
= env
->sregs
[SFR_R_MM_CAUSE
];
102 vaddr
= EXTRACT_FIELD(env
->tlbsets
[srs
- 1][set
][idx
].hi
, 13, 31);
103 vaddr
<<= TARGET_PAGE_BITS
;
104 tlb_v
= EXTRACT_FIELD(env
->tlbsets
[srs
- 1][set
][idx
].lo
, 3, 3);
105 env
->tlbsets
[srs
- 1][set
][idx
].lo
= lo
;
106 env
->tlbsets
[srs
- 1][set
][idx
].hi
= hi
;
108 D_LOG("tlb flush vaddr=%x v=%d pc=%x\n",
109 vaddr
, tlb_v
, env
->pc
);
111 tlb_flush_page(env_cpu(env
), vaddr
);
118 void helper_movl_reg_sreg(CPUCRISState
*env
, uint32_t reg
, uint32_t sreg
)
121 env
->pregs
[PR_SRS
] &= 3;
122 srs
= env
->pregs
[PR_SRS
];
124 #if !defined(CONFIG_USER_ONLY)
125 if (srs
== 1 || srs
== 2) {
130 idx
= set
= env
->sregs
[SFR_RW_MM_TLB_SEL
];
135 /* Update the mirror regs. */
136 hi
= env
->tlbsets
[srs
- 1][set
][idx
].hi
;
137 lo
= env
->tlbsets
[srs
- 1][set
][idx
].lo
;
138 env
->sregs
[SFR_RW_MM_TLB_HI
] = hi
;
139 env
->sregs
[SFR_RW_MM_TLB_LO
] = lo
;
142 env
->regs
[reg
] = env
->sregs
[srs
][sreg
];
145 static void cris_ccs_rshift(CPUCRISState
*env
)
149 /* Apply the ccs shift. */
150 ccs
= env
->pregs
[PR_CCS
];
151 ccs
= (ccs
& 0xc0000000) | ((ccs
& 0x0fffffff) >> 10);
153 /* Enter user mode. */
154 env
->ksp
= env
->regs
[R_SP
];
155 env
->regs
[R_SP
] = env
->pregs
[PR_USP
];
158 env
->pregs
[PR_CCS
] = ccs
;
161 void helper_rfe(CPUCRISState
*env
)
163 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
165 D_LOG("rfe: erp=%x pid=%x ccs=%x btarget=%x\n",
166 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
170 cris_ccs_rshift(env
);
172 /* RFE sets the P_FLAG only if the R_FLAG is not set. */
174 env
->pregs
[PR_CCS
] |= P_FLAG
;
178 void helper_rfn(CPUCRISState
*env
)
180 int rflag
= env
->pregs
[PR_CCS
] & R_FLAG
;
182 D_LOG("rfn: erp=%x pid=%x ccs=%x btarget=%x\n",
183 env
->pregs
[PR_ERP
], env
->pregs
[PR_PID
],
187 cris_ccs_rshift(env
);
189 /* Set the P_FLAG only if the R_FLAG is not set. */
191 env
->pregs
[PR_CCS
] |= P_FLAG
;
194 /* Always set the M flag. */
195 env
->pregs
[PR_CCS
] |= M_FLAG_V32
;
198 uint32_t helper_btst(CPUCRISState
*env
, uint32_t t0
, uint32_t t1
, uint32_t ccs
)
200 /* FIXME: clean this up. */
204 * The N flag is set according to the selected bit in the dest reg.
205 * The Z flag is set if the selected bit and all bits to the right are
207 * The X flag is cleared.
208 * Other flags are left untouched.
209 * The destination reg is not affected.
211 unsigned int fz
, sbit
, bset
, mask
, masked_t0
;
214 bset
= !!(t0
& (1 << sbit
));
215 mask
= sbit
== 31 ? -1 : (1 << (sbit
+ 1)) - 1;
216 masked_t0
= t0
& mask
;
217 fz
= !(masked_t0
| bset
);
219 /* Clear the X, N and Z flags. */
220 ccs
= ccs
& ~(X_FLAG
| N_FLAG
| Z_FLAG
);
221 if (env
->pregs
[PR_VR
] < 32) {
222 ccs
&= ~(V_FLAG
| C_FLAG
);
224 /* Set the N and Z flags accordingly. */
225 ccs
|= (bset
<< 3) | (fz
<< 2);
229 static inline uint32_t evaluate_flags_writeback(CPUCRISState
*env
,
230 uint32_t flags
, uint32_t ccs
)
232 unsigned int x
, z
, mask
;
234 /* Extended arithmetics, leave the z flag alone. */
236 mask
= env
->cc_mask
| X_FLAG
;
243 /* all insn clear the x-flag except setf or clrf. */
249 uint32_t helper_evaluate_flags_muls(CPUCRISState
*env
,
250 uint32_t ccs
, uint32_t res
, uint32_t mof
)
256 dneg
= ((int32_t)res
) < 0;
263 } else if (tmp
< 0) {
266 if ((dneg
&& mof
!= -1) || (!dneg
&& mof
!= 0)) {
269 return evaluate_flags_writeback(env
, flags
, ccs
);
272 uint32_t helper_evaluate_flags_mulu(CPUCRISState
*env
,
273 uint32_t ccs
, uint32_t res
, uint32_t mof
)
283 } else if (tmp
>> 63) {
290 return evaluate_flags_writeback(env
, flags
, ccs
);
293 uint32_t helper_evaluate_flags_mcp(CPUCRISState
*env
, uint32_t ccs
,
294 uint32_t src
, uint32_t dst
, uint32_t res
)
298 src
= src
& 0x80000000;
299 dst
= dst
& 0x80000000;
301 if ((res
& 0x80000000L
) != 0L) {
305 } else if (src
& dst
) {
320 return evaluate_flags_writeback(env
, flags
, ccs
);
323 uint32_t helper_evaluate_flags_alu_4(CPUCRISState
*env
, uint32_t ccs
,
324 uint32_t src
, uint32_t dst
, uint32_t res
)
328 src
= src
& 0x80000000;
329 dst
= dst
& 0x80000000;
331 if ((res
& 0x80000000L
) != 0L) {
335 } else if (src
& dst
) {
350 return evaluate_flags_writeback(env
, flags
, ccs
);
353 uint32_t helper_evaluate_flags_sub_4(CPUCRISState
*env
, uint32_t ccs
,
354 uint32_t src
, uint32_t dst
, uint32_t res
)
358 src
= (~src
) & 0x80000000;
359 dst
= dst
& 0x80000000;
361 if ((res
& 0x80000000L
) != 0L) {
365 } else if (src
& dst
) {
381 return evaluate_flags_writeback(env
, flags
, ccs
);
384 uint32_t helper_evaluate_flags_move_4(CPUCRISState
*env
,
385 uint32_t ccs
, uint32_t res
)
389 if ((int32_t)res
< 0) {
391 } else if (res
== 0L) {
395 return evaluate_flags_writeback(env
, flags
, ccs
);
398 uint32_t helper_evaluate_flags_move_2(CPUCRISState
*env
,
399 uint32_t ccs
, uint32_t res
)
403 if ((int16_t)res
< 0L) {
405 } else if (res
== 0) {
409 return evaluate_flags_writeback(env
, flags
, ccs
);
413 * TODO: This is expensive. We could split things up and only evaluate part of
414 * CCR on a need to know basis. For now, we simply re-evaluate everything.
416 void helper_evaluate_flags(CPUCRISState
*env
)
418 uint32_t src
, dst
, res
;
423 res
= env
->cc_result
;
425 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
) {
430 * Now, evaluate the flags. This stuff is based on
431 * Per Zander's CRISv10 simulator.
433 switch (env
->cc_size
) {
435 if ((res
& 0x80L
) != 0L) {
437 if (((src
& 0x80L
) == 0L) && ((dst
& 0x80L
) == 0L)) {
439 } else if (((src
& 0x80L
) != 0L) && ((dst
& 0x80L
) != 0L)) {
443 if ((res
& 0xFFL
) == 0L) {
446 if (((src
& 0x80L
) != 0L) && ((dst
& 0x80L
) != 0L)) {
449 if ((dst
& 0x80L
) != 0L || (src
& 0x80L
) != 0L) {
455 if ((res
& 0x8000L
) != 0L) {
457 if (((src
& 0x8000L
) == 0L) && ((dst
& 0x8000L
) == 0L)) {
459 } else if (((src
& 0x8000L
) != 0L) && ((dst
& 0x8000L
) != 0L)) {
463 if ((res
& 0xFFFFL
) == 0L) {
466 if (((src
& 0x8000L
) != 0L) && ((dst
& 0x8000L
) != 0L)) {
469 if ((dst
& 0x8000L
) != 0L || (src
& 0x8000L
) != 0L) {
475 if ((res
& 0x80000000L
) != 0L) {
477 if (((src
& 0x80000000L
) == 0L) && ((dst
& 0x80000000L
) == 0L)) {
479 } else if (((src
& 0x80000000L
) != 0L) &&
480 ((dst
& 0x80000000L
) != 0L)) {
487 if (((src
& 0x80000000L
) != 0L) && ((dst
& 0x80000000L
) != 0L)) {
490 if ((dst
& 0x80000000L
) != 0L || (src
& 0x80000000L
) != 0L) {
499 if (env
->cc_op
== CC_OP_SUB
|| env
->cc_op
== CC_OP_CMP
) {
503 env
->pregs
[PR_CCS
] = evaluate_flags_writeback(env
, flags
,
507 void helper_top_evaluate_flags(CPUCRISState
*env
)
509 switch (env
->cc_op
) {
512 = helper_evaluate_flags_mcp(env
, env
->pregs
[PR_CCS
],
513 env
->cc_src
, env
->cc_dest
,
518 = helper_evaluate_flags_muls(env
, env
->pregs
[PR_CCS
],
519 env
->cc_result
, env
->pregs
[PR_MOF
]);
523 = helper_evaluate_flags_mulu(env
, env
->pregs
[PR_CCS
],
524 env
->cc_result
, env
->pregs
[PR_MOF
]);
533 switch (env
->cc_size
) {
536 helper_evaluate_flags_move_4(env
,
542 helper_evaluate_flags_move_2(env
,
547 helper_evaluate_flags(env
);
556 if (env
->cc_size
== 4) {
558 helper_evaluate_flags_sub_4(env
,
560 env
->cc_src
, env
->cc_dest
,
563 helper_evaluate_flags(env
);
567 switch (env
->cc_size
) {
570 helper_evaluate_flags_alu_4(env
,
572 env
->cc_src
, env
->cc_dest
,
576 helper_evaluate_flags(env
);