hw/intc/ioapic_common.c

   1 /*
   2  *  IOAPIC emulation logic - common bits of emulated and KVM kernel model
   3  *
   4  *  Copyright (c) 2004-2005 Fabrice Bellard
   5  *  Copyright (c) 2009      Xiantao Zhang, Intel
   6  *  Copyright (c) 2011      Jan Kiszka, Siemens AG
   7  *
   8  * This library is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU Lesser General Public
  10  * License as published by the Free Software Foundation; either
  11  * version 2 of the License, or (at your option) any later version.
  12  *
  13  * This library is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * Lesser General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU Lesser General Public
  19  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  20  */
  21
  22 #include "qemu/osdep.h"
  23 #include "qapi/error.h"
  24 #include "monitor/monitor.h"
  25 #include "hw/i386/ioapic.h"
  26 #include "hw/i386/ioapic_internal.h"
  27 #include "hw/sysbus.h"
  28
  29 /* ioapic_no count start from 0 to MAX_IOAPICS,
  30  * remove as static variable from ioapic_common_init.
  31  * now as a global variable, let child to increase the counter
  32  * then we can drop the 'instance_no' argument
  33  * and convert to our QOM's realize function
  34  */
  35 int ioapic_no;
  36
  37 static void ioapic_irr_dump(Monitor *mon, const char *name, uint32_t bitmap)
  38 {
  39     int i;
  40
  41     monitor_printf(mon, "%-10s ", name);
  42     if (bitmap == 0) {
  43         monitor_printf(mon, "(none)\n");
  44         return;
  45     }
  46     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  47         if (bitmap & (1 << i)) {
  48             monitor_printf(mon, "%-2u ", i);
  49         }
  50     }
  51     monitor_printf(mon, "\n");
  52 }
  53
  54 void ioapic_print_redtbl(Monitor *mon, IOAPICCommonState *s)
  55 {
  56     static const char *delm_str[] = {
  57         "fixed", "lowest", "SMI", "...", "NMI", "INIT", "...", "extINT"};
  58     uint32_t remote_irr = 0;
  59     int i;
  60
  61     monitor_printf(mon, "ioapic ver=0x%x id=0x%02x sel=0x%02x",
  62                    s->version, s->id, s->ioregsel);
  63     if (s->ioregsel) {
  64         monitor_printf(mon, " (redir[%u])\n",
  65                        (s->ioregsel - IOAPIC_REG_REDTBL_BASE) >> 1);
  66     } else {
  67         monitor_printf(mon, "\n");
  68     }
  69     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
  70         uint64_t entry = s->ioredtbl[i];
  71         uint32_t delm = (uint32_t)((entry & IOAPIC_LVT_DELIV_MODE) >>
  72                                    IOAPIC_LVT_DELIV_MODE_SHIFT);
  73         monitor_printf(mon, "pin %-2u 0x%016"PRIx64" dest=%"PRIx64
  74                        " vec=%-3"PRIu64" %s %-5s %-6s %-6s %s\n",
  75                        i, entry,
  76                        (entry >> IOAPIC_LVT_DEST_SHIFT) &
  77                             (entry & IOAPIC_LVT_DEST_MODE ? 0xff : 0xf),
  78                        entry & IOAPIC_VECTOR_MASK,
  79                        entry & IOAPIC_LVT_POLARITY ? "active-lo" : "active-hi",
  80                        entry & IOAPIC_LVT_TRIGGER_MODE ? "level" : "edge",
  81                        entry & IOAPIC_LVT_MASKED ? "masked" : "",
  82                        delm_str[delm],
  83                        entry & IOAPIC_LVT_DEST_MODE ? "logical" : "physical");
  84
  85         remote_irr |= entry & IOAPIC_LVT_TRIGGER_MODE ?
  86                         (entry & IOAPIC_LVT_REMOTE_IRR ? (1 << i) : 0) : 0;
  87     }
  88     ioapic_irr_dump(mon, "IRR", s->irr);
  89     ioapic_irr_dump(mon, "Remote IRR", remote_irr);
  90 }
  91
  92 void ioapic_reset_common(DeviceState *dev)
  93 {
  94     IOAPICCommonState *s = IOAPIC_COMMON(dev);
  95     int i;
  96
  97     s->id = 0;
  98     s->ioregsel = 0;
  99     s->irr = 0;
 100     for (i = 0; i < IOAPIC_NUM_PINS; i++) {
 101         s->ioredtbl[i] = 1 << IOAPIC_LVT_MASKED_SHIFT;
 102     }
 103 }
 104
 105 static void ioapic_dispatch_pre_save(void *opaque)
 106 {
 107     IOAPICCommonState *s = IOAPIC_COMMON(opaque);
 108     IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
 109
 110     if (info->pre_save) {
 111         info->pre_save(s);
 112     }
 113 }
 114
 115 static int ioapic_dispatch_post_load(void *opaque, int version_id)
 116 {
 117     IOAPICCommonState *s = IOAPIC_COMMON(opaque);
 118     IOAPICCommonClass *info = IOAPIC_COMMON_GET_CLASS(s);
 119
 120     if (info->post_load) {
 121         info->post_load(s);
 122     }
 123     return 0;
 124 }
 125
 126 static void ioapic_common_realize(DeviceState *dev, Error **errp)
 127 {
 128     IOAPICCommonState *s = IOAPIC_COMMON(dev);
 129     IOAPICCommonClass *info;
 130
 131     if (ioapic_no >= MAX_IOAPICS) {
 132         error_setg(errp, "Only %d ioapics allowed", MAX_IOAPICS);
 133         return;
 134     }
 135
 136     info = IOAPIC_COMMON_GET_CLASS(s);
 137     info->realize(dev, errp);
 138
 139     sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->io_memory);
 140     ioapic_no++;
 141 }
 142
 143 static const VMStateDescription vmstate_ioapic_common = {
 144     .name = "ioapic",
 145     .version_id = 3,
 146     .minimum_version_id = 1,
 147     .pre_save = ioapic_dispatch_pre_save,
 148     .post_load = ioapic_dispatch_post_load,
 149     .fields = (VMStateField[]) {
 150         VMSTATE_UINT8(id, IOAPICCommonState),
 151         VMSTATE_UINT8(ioregsel, IOAPICCommonState),
 152         VMSTATE_UNUSED_V(2, 8), /* to account for qemu-kvm's v2 format */
 153         VMSTATE_UINT32_V(irr, IOAPICCommonState, 2),
 154         VMSTATE_UINT64_ARRAY(ioredtbl, IOAPICCommonState, IOAPIC_NUM_PINS),
 155         VMSTATE_END_OF_LIST()
 156     }
 157 };
 158
 159 static void ioapic_common_class_init(ObjectClass *klass, void *data)
 160 {
 161     DeviceClass *dc = DEVICE_CLASS(klass);
 162
 163     dc->realize = ioapic_common_realize;
 164     dc->vmsd = &vmstate_ioapic_common;
 165 }
 166
 167 static const TypeInfo ioapic_common_type = {
 168     .name = TYPE_IOAPIC_COMMON,
 169     .parent = TYPE_SYS_BUS_DEVICE,
 170     .instance_size = sizeof(IOAPICCommonState),
 171     .class_size = sizeof(IOAPICCommonClass),
 172     .class_init = ioapic_common_class_init,
 173     .abstract = true,
 174 };
 175
 176 static void ioapic_common_register_types(void)
 177 {
 178     type_register_static(&ioapic_common_type);
 179 }
 180
 181 type_init(ioapic_common_register_types)