block: clarify the meaning of BDRV_O_NOCACHE
[qemu.git] / hw / grackle_pci.c
blobd35701f4a566f6800eae9ac38adb970430bcbc46
1 /*
2 * QEMU Grackle PCI host (heathrow OldWorld PowerMac)
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
26 #include "sysbus.h"
27 #include "ppc_mac.h"
28 #include "pci.h"
29 #include "pci_host.h"
31 /* debug Grackle */
32 //#define DEBUG_GRACKLE
34 #ifdef DEBUG_GRACKLE
35 #define GRACKLE_DPRINTF(fmt, ...) \
36 do { printf("GRACKLE: " fmt , ## __VA_ARGS__); } while (0)
37 #else
38 #define GRACKLE_DPRINTF(fmt, ...)
39 #endif
41 typedef struct GrackleState {
42 SysBusDevice busdev;
43 PCIHostState host_state;
44 } GrackleState;
46 /* Don't know if this matches real hardware, but it agrees with OHW. */
47 static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num)
49 return (irq_num + (pci_dev->devfn >> 3)) & 3;
52 static void pci_grackle_set_irq(void *opaque, int irq_num, int level)
54 qemu_irq *pic = opaque;
56 GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level);
57 qemu_set_irq(pic[irq_num + 0x15], level);
60 static void pci_grackle_reset(void *opaque)
64 PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
66 DeviceState *dev;
67 SysBusDevice *s;
68 GrackleState *d;
70 dev = qdev_create(NULL, "grackle");
71 qdev_init_nofail(dev);
72 s = sysbus_from_qdev(dev);
73 d = FROM_SYSBUS(GrackleState, s);
74 d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
75 pci_grackle_set_irq,
76 pci_grackle_map_irq,
77 pic, 0, 4);
79 pci_create_simple(d->host_state.bus, 0, "grackle");
81 sysbus_mmio_map(s, 0, base);
82 sysbus_mmio_map(s, 1, base + 0x00200000);
84 return d->host_state.bus;
87 static int pci_grackle_init_device(SysBusDevice *dev)
89 GrackleState *s;
90 int pci_mem_config, pci_mem_data;
92 s = FROM_SYSBUS(GrackleState, dev);
94 pci_mem_config = pci_host_conf_register_mmio(&s->host_state,
95 DEVICE_LITTLE_ENDIAN);
96 pci_mem_data = pci_host_data_register_mmio(&s->host_state,
97 DEVICE_LITTLE_ENDIAN);
98 sysbus_init_mmio(dev, 0x1000, pci_mem_config);
99 sysbus_init_mmio(dev, 0x1000, pci_mem_data);
101 qemu_register_reset(pci_grackle_reset, &s->host_state);
102 return 0;
105 static int grackle_pci_host_init(PCIDevice *d)
107 pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_MOTOROLA);
108 pci_config_set_device_id(d->config, PCI_DEVICE_ID_MOTOROLA_MPC106);
109 d->config[0x08] = 0x00; // revision
110 d->config[0x09] = 0x01;
111 pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST);
112 return 0;
115 static PCIDeviceInfo grackle_pci_host_info = {
116 .qdev.name = "grackle",
117 .qdev.size = sizeof(PCIDevice),
118 .init = grackle_pci_host_init,
121 static void grackle_register_devices(void)
123 sysbus_register_dev("grackle", sizeof(GrackleState),
124 pci_grackle_init_device);
125 pci_qdev_register(&grackle_pci_host_info);
128 device_init(grackle_register_devices)