intel_iommu: define interrupt remap table addr register
[qemu.git] / disas.c
blob05a7a1260acbf389e08521927fae8bcde420dcad
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "qemu/osdep.h"
3 #include "qemu-common.h"
4 #include "disas/bfd.h"
5 #include "elf.h"
7 #include "cpu.h"
8 #include "disas/disas.h"
10 typedef struct CPUDebug {
11 struct disassemble_info info;
12 CPUState *cpu;
13 } CPUDebug;
15 /* Filled in by elfload.c. Simplistic, but will do for now. */
16 struct syminfo *syminfos = NULL;
18 /* Get LENGTH bytes from info's buffer, at target address memaddr.
19 Transfer them to myaddr. */
20 int
21 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
22 struct disassemble_info *info)
24 if (memaddr < info->buffer_vma
25 || memaddr + length > info->buffer_vma + info->buffer_length)
26 /* Out of bounds. Use EIO because GDB uses it. */
27 return EIO;
28 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
29 return 0;
32 /* Get LENGTH bytes from info's buffer, at target address memaddr.
33 Transfer them to myaddr. */
34 static int
35 target_read_memory (bfd_vma memaddr,
36 bfd_byte *myaddr,
37 int length,
38 struct disassemble_info *info)
40 CPUDebug *s = container_of(info, CPUDebug, info);
42 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
43 return 0;
46 /* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48 void
49 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
51 if (status != EIO)
52 /* Can't happen. */
53 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
54 else
55 /* Actually, address between memaddr and memaddr + len was
56 out of bounds. */
57 (*info->fprintf_func) (info->stream,
58 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
61 /* This could be in a separate file, to save minuscule amounts of space
62 in statically linked executables. */
64 /* Just print the address is hex. This is included for completeness even
65 though both GDB and objdump provide their own (to print symbolic
66 addresses). */
68 void
69 generic_print_address (bfd_vma addr, struct disassemble_info *info)
71 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
74 /* Print address in hex, truncated to the width of a host virtual address. */
75 static void
76 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
78 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
79 generic_print_address(addr & mask, info);
82 /* Just return the given address. */
84 int
85 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
87 return 1;
90 bfd_vma bfd_getl64 (const bfd_byte *addr)
92 unsigned long long v;
94 v = (unsigned long long) addr[0];
95 v |= (unsigned long long) addr[1] << 8;
96 v |= (unsigned long long) addr[2] << 16;
97 v |= (unsigned long long) addr[3] << 24;
98 v |= (unsigned long long) addr[4] << 32;
99 v |= (unsigned long long) addr[5] << 40;
100 v |= (unsigned long long) addr[6] << 48;
101 v |= (unsigned long long) addr[7] << 56;
102 return (bfd_vma) v;
105 bfd_vma bfd_getl32 (const bfd_byte *addr)
107 unsigned long v;
109 v = (unsigned long) addr[0];
110 v |= (unsigned long) addr[1] << 8;
111 v |= (unsigned long) addr[2] << 16;
112 v |= (unsigned long) addr[3] << 24;
113 return (bfd_vma) v;
116 bfd_vma bfd_getb32 (const bfd_byte *addr)
118 unsigned long v;
120 v = (unsigned long) addr[0] << 24;
121 v |= (unsigned long) addr[1] << 16;
122 v |= (unsigned long) addr[2] << 8;
123 v |= (unsigned long) addr[3];
124 return (bfd_vma) v;
127 bfd_vma bfd_getl16 (const bfd_byte *addr)
129 unsigned long v;
131 v = (unsigned long) addr[0];
132 v |= (unsigned long) addr[1] << 8;
133 return (bfd_vma) v;
136 bfd_vma bfd_getb16 (const bfd_byte *addr)
138 unsigned long v;
140 v = (unsigned long) addr[0] << 24;
141 v |= (unsigned long) addr[1] << 16;
142 return (bfd_vma) v;
145 static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
146 const char *prefix)
148 int i, n = info->buffer_length;
149 uint8_t *buf = g_malloc(n);
151 info->read_memory_func(pc, buf, n, info);
153 for (i = 0; i < n; ++i) {
154 if (i % 32 == 0) {
155 info->fprintf_func(info->stream, "\n%s: ", prefix);
157 info->fprintf_func(info->stream, "%02x", buf[i]);
160 g_free(buf);
161 return n;
164 static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
166 return print_insn_objdump(pc, info, "OBJD-H");
169 static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
171 return print_insn_objdump(pc, info, "OBJD-T");
174 /* Disassemble this for me please... (debugging). 'flags' has the following
175 values:
176 i386 - 1 means 16 bit code, 2 means 64 bit code
177 ppc - bits 0:15 specify (optionally) the machine instruction set;
178 bit 16 indicates little endian.
179 other targets - unused
181 void target_disas(FILE *out, CPUState *cpu, target_ulong code,
182 target_ulong size, int flags)
184 CPUClass *cc = CPU_GET_CLASS(cpu);
185 target_ulong pc;
186 int count;
187 CPUDebug s;
189 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
191 s.cpu = cpu;
192 s.info.read_memory_func = target_read_memory;
193 s.info.buffer_vma = code;
194 s.info.buffer_length = size;
195 s.info.print_address_func = generic_print_address;
197 #ifdef TARGET_WORDS_BIGENDIAN
198 s.info.endian = BFD_ENDIAN_BIG;
199 #else
200 s.info.endian = BFD_ENDIAN_LITTLE;
201 #endif
203 if (cc->disas_set_info) {
204 cc->disas_set_info(cpu, &s.info);
207 #if defined(TARGET_I386)
208 if (flags == 2) {
209 s.info.mach = bfd_mach_x86_64;
210 } else if (flags == 1) {
211 s.info.mach = bfd_mach_i386_i8086;
212 } else {
213 s.info.mach = bfd_mach_i386_i386;
215 s.info.print_insn = print_insn_i386;
216 #elif defined(TARGET_PPC)
217 if ((flags >> 16) & 1) {
218 s.info.endian = BFD_ENDIAN_LITTLE;
220 if (flags & 0xFFFF) {
221 /* If we have a precise definition of the instruction set, use it. */
222 s.info.mach = flags & 0xFFFF;
223 } else {
224 #ifdef TARGET_PPC64
225 s.info.mach = bfd_mach_ppc64;
226 #else
227 s.info.mach = bfd_mach_ppc;
228 #endif
230 s.info.disassembler_options = (char *)"any";
231 s.info.print_insn = print_insn_ppc;
232 #endif
233 if (s.info.print_insn == NULL) {
234 s.info.print_insn = print_insn_od_target;
237 for (pc = code; size > 0; pc += count, size -= count) {
238 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
239 count = s.info.print_insn(pc, &s.info);
240 #if 0
242 int i;
243 uint8_t b;
244 fprintf(out, " {");
245 for(i = 0; i < count; i++) {
246 target_read_memory(pc + i, &b, 1, &s.info);
247 fprintf(out, " %02x", b);
249 fprintf(out, " }");
251 #endif
252 fprintf(out, "\n");
253 if (count < 0)
254 break;
255 if (size < count) {
256 fprintf(out,
257 "Disassembler disagrees with translator over instruction "
258 "decoding\n"
259 "Please report this to qemu-devel@nongnu.org\n");
260 break;
265 /* Disassemble this for me please... (debugging). */
266 void disas(FILE *out, void *code, unsigned long size)
268 uintptr_t pc;
269 int count;
270 CPUDebug s;
271 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
273 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
274 s.info.print_address_func = generic_print_host_address;
276 s.info.buffer = code;
277 s.info.buffer_vma = (uintptr_t)code;
278 s.info.buffer_length = size;
280 #ifdef HOST_WORDS_BIGENDIAN
281 s.info.endian = BFD_ENDIAN_BIG;
282 #else
283 s.info.endian = BFD_ENDIAN_LITTLE;
284 #endif
285 #if defined(CONFIG_TCG_INTERPRETER)
286 print_insn = print_insn_tci;
287 #elif defined(__i386__)
288 s.info.mach = bfd_mach_i386_i386;
289 print_insn = print_insn_i386;
290 #elif defined(__x86_64__)
291 s.info.mach = bfd_mach_x86_64;
292 print_insn = print_insn_i386;
293 #elif defined(_ARCH_PPC)
294 s.info.disassembler_options = (char *)"any";
295 print_insn = print_insn_ppc;
296 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
297 print_insn = print_insn_arm_a64;
298 #elif defined(__alpha__)
299 print_insn = print_insn_alpha;
300 #elif defined(__sparc__)
301 print_insn = print_insn_sparc;
302 s.info.mach = bfd_mach_sparc_v9b;
303 #elif defined(__arm__)
304 print_insn = print_insn_arm;
305 #elif defined(__MIPSEB__)
306 print_insn = print_insn_big_mips;
307 #elif defined(__MIPSEL__)
308 print_insn = print_insn_little_mips;
309 #elif defined(__m68k__)
310 print_insn = print_insn_m68k;
311 #elif defined(__s390__)
312 print_insn = print_insn_s390;
313 #elif defined(__hppa__)
314 print_insn = print_insn_hppa;
315 #elif defined(__ia64__)
316 print_insn = print_insn_ia64;
317 #endif
318 if (print_insn == NULL) {
319 print_insn = print_insn_od_host;
321 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
322 fprintf(out, "0x%08" PRIxPTR ": ", pc);
323 count = print_insn(pc, &s.info);
324 fprintf(out, "\n");
325 if (count < 0)
326 break;
330 /* Look up symbol for debugging purpose. Returns "" if unknown. */
331 const char *lookup_symbol(target_ulong orig_addr)
333 const char *symbol = "";
334 struct syminfo *s;
336 for (s = syminfos; s; s = s->next) {
337 symbol = s->lookup_symbol(s, orig_addr);
338 if (symbol[0] != '\0') {
339 break;
343 return symbol;
346 #if !defined(CONFIG_USER_ONLY)
348 #include "monitor/monitor.h"
350 static int monitor_disas_is_physical;
352 static int
353 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
354 struct disassemble_info *info)
356 CPUDebug *s = container_of(info, CPUDebug, info);
358 if (monitor_disas_is_physical) {
359 cpu_physical_memory_read(memaddr, myaddr, length);
360 } else {
361 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
363 return 0;
366 /* Disassembler for the monitor.
367 See target_disas for a description of flags. */
368 void monitor_disas(Monitor *mon, CPUState *cpu,
369 target_ulong pc, int nb_insn, int is_physical, int flags)
371 CPUClass *cc = CPU_GET_CLASS(cpu);
372 int count, i;
373 CPUDebug s;
375 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
377 s.cpu = cpu;
378 monitor_disas_is_physical = is_physical;
379 s.info.read_memory_func = monitor_read_memory;
380 s.info.print_address_func = generic_print_address;
382 s.info.buffer_vma = pc;
384 #ifdef TARGET_WORDS_BIGENDIAN
385 s.info.endian = BFD_ENDIAN_BIG;
386 #else
387 s.info.endian = BFD_ENDIAN_LITTLE;
388 #endif
390 if (cc->disas_set_info) {
391 cc->disas_set_info(cpu, &s.info);
394 #if defined(TARGET_I386)
395 if (flags == 2) {
396 s.info.mach = bfd_mach_x86_64;
397 } else if (flags == 1) {
398 s.info.mach = bfd_mach_i386_i8086;
399 } else {
400 s.info.mach = bfd_mach_i386_i386;
402 s.info.print_insn = print_insn_i386;
403 #elif defined(TARGET_PPC)
404 if (flags & 0xFFFF) {
405 /* If we have a precise definition of the instruction set, use it. */
406 s.info.mach = flags & 0xFFFF;
407 } else {
408 #ifdef TARGET_PPC64
409 s.info.mach = bfd_mach_ppc64;
410 #else
411 s.info.mach = bfd_mach_ppc;
412 #endif
414 if ((flags >> 16) & 1) {
415 s.info.endian = BFD_ENDIAN_LITTLE;
417 s.info.print_insn = print_insn_ppc;
418 #endif
419 if (!s.info.print_insn) {
420 monitor_printf(mon, "0x" TARGET_FMT_lx
421 ": Asm output not supported on this arch\n", pc);
422 return;
425 for(i = 0; i < nb_insn; i++) {
426 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
427 count = s.info.print_insn(pc, &s.info);
428 monitor_printf(mon, "\n");
429 if (count < 0)
430 break;
431 pc += count;
434 #endif