spapr: handle cpu core unplug via hotplug handler chain
[qemu.git] / hw / ppc / mac_oldworld.c
blob4608bab014c7f3fa9ddd5354b3301b00a99fabd3
2 /*
3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
26 #include "qemu/osdep.h"
27 #include "qapi/error.h"
28 #include "hw/hw.h"
29 #include "hw/ppc/ppc.h"
30 #include "mac.h"
31 #include "hw/input/adb.h"
32 #include "hw/timer/m48t59.h"
33 #include "sysemu/sysemu.h"
34 #include "net/net.h"
35 #include "hw/isa/isa.h"
36 #include "hw/pci/pci.h"
37 #include "hw/pci/pci_host.h"
38 #include "hw/boards.h"
39 #include "hw/nvram/fw_cfg.h"
40 #include "hw/char/escc.h"
41 #include "hw/misc/macio/macio.h"
42 #include "hw/ide.h"
43 #include "hw/loader.h"
44 #include "elf.h"
45 #include "qemu/error-report.h"
46 #include "sysemu/kvm.h"
47 #include "kvm_ppc.h"
48 #include "exec/address-spaces.h"
49 #include "qemu/cutils.h"
51 #define MAX_IDE_BUS 2
52 #define CFG_ADDR 0xf0000510
53 #define TBFREQ 16600000UL
54 #define CLOCKFREQ 266000000UL
55 #define BUSFREQ 66000000UL
57 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
59 #define GRACKLE_BASE 0xfec00000
61 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
62 Error **errp)
64 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
67 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
69 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
72 static void ppc_heathrow_reset(void *opaque)
74 PowerPCCPU *cpu = opaque;
76 cpu_reset(CPU(cpu));
79 static void ppc_heathrow_init(MachineState *machine)
81 ram_addr_t ram_size = machine->ram_size;
82 const char *kernel_filename = machine->kernel_filename;
83 const char *kernel_cmdline = machine->kernel_cmdline;
84 const char *initrd_filename = machine->initrd_filename;
85 const char *boot_device = machine->boot_order;
86 MemoryRegion *sysmem = get_system_memory();
87 PowerPCCPU *cpu = NULL;
88 CPUPPCState *env = NULL;
89 char *filename;
90 int linux_boot, i;
91 MemoryRegion *ram = g_new(MemoryRegion, 1);
92 MemoryRegion *bios = g_new(MemoryRegion, 1);
93 uint32_t kernel_base, initrd_base, cmdline_base = 0;
94 int32_t kernel_size, initrd_size;
95 PCIBus *pci_bus;
96 OldWorldMacIOState *macio;
97 MACIOIDEState *macio_ide;
98 SysBusDevice *s;
99 DeviceState *dev, *pic_dev;
100 BusState *adb_bus;
101 int bios_size, ndrv_size;
102 uint8_t *ndrv_file;
103 uint16_t ppc_boot_device;
104 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
105 void *fw_cfg;
106 uint64_t tbfreq;
108 linux_boot = (kernel_filename != NULL);
110 /* init CPUs */
111 for (i = 0; i < smp_cpus; i++) {
112 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
113 env = &cpu->env;
115 /* Set time-base frequency to 16.6 Mhz */
116 cpu_ppc_tb_init(env, TBFREQ);
117 qemu_register_reset(ppc_heathrow_reset, cpu);
120 /* allocate RAM */
121 if (ram_size > (2047 << 20)) {
122 fprintf(stderr,
123 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
124 ((unsigned int)ram_size / (1 << 20)));
125 exit(1);
128 memory_region_allocate_system_memory(ram, NULL, "ppc_heathrow.ram",
129 ram_size);
130 memory_region_add_subregion(sysmem, 0, ram);
132 /* allocate and load BIOS */
133 memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE,
134 &error_fatal);
136 if (bios_name == NULL)
137 bios_name = PROM_FILENAME;
138 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
139 memory_region_set_readonly(bios, true);
140 memory_region_add_subregion(sysmem, PROM_ADDR, bios);
142 /* Load OpenBIOS (ELF) */
143 if (filename) {
144 bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
145 1, PPC_ELF_MACHINE, 0, 0);
146 g_free(filename);
147 } else {
148 bios_size = -1;
150 if (bios_size < 0 || bios_size > BIOS_SIZE) {
151 error_report("could not load PowerPC bios '%s'", bios_name);
152 exit(1);
155 if (linux_boot) {
156 uint64_t lowaddr = 0;
157 int bswap_needed;
159 #ifdef BSWAP_NEEDED
160 bswap_needed = 1;
161 #else
162 bswap_needed = 0;
163 #endif
164 kernel_base = KERNEL_LOAD_ADDR;
165 kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
166 NULL, &lowaddr, NULL, 1, PPC_ELF_MACHINE,
167 0, 0);
168 if (kernel_size < 0)
169 kernel_size = load_aout(kernel_filename, kernel_base,
170 ram_size - kernel_base, bswap_needed,
171 TARGET_PAGE_SIZE);
172 if (kernel_size < 0)
173 kernel_size = load_image_targphys(kernel_filename,
174 kernel_base,
175 ram_size - kernel_base);
176 if (kernel_size < 0) {
177 error_report("could not load kernel '%s'", kernel_filename);
178 exit(1);
180 /* load initrd */
181 if (initrd_filename) {
182 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
183 initrd_size = load_image_targphys(initrd_filename, initrd_base,
184 ram_size - initrd_base);
185 if (initrd_size < 0) {
186 error_report("could not load initial ram disk '%s'",
187 initrd_filename);
188 exit(1);
190 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
191 } else {
192 initrd_base = 0;
193 initrd_size = 0;
194 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
196 ppc_boot_device = 'm';
197 } else {
198 kernel_base = 0;
199 kernel_size = 0;
200 initrd_base = 0;
201 initrd_size = 0;
202 ppc_boot_device = '\0';
203 for (i = 0; boot_device[i] != '\0'; i++) {
204 /* TOFIX: for now, the second IDE channel is not properly
205 * used by OHW. The Mac floppy disk are not emulated.
206 * For now, OHW cannot boot from the network.
208 #if 0
209 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
210 ppc_boot_device = boot_device[i];
211 break;
213 #else
214 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
215 ppc_boot_device = boot_device[i];
216 break;
218 #endif
220 if (ppc_boot_device == '\0') {
221 error_report("No valid boot device for G3 Beige machine");
222 exit(1);
226 /* XXX: we register only 1 output pin for heathrow PIC */
227 pic_dev = qdev_create(NULL, TYPE_HEATHROW);
228 qdev_init_nofail(pic_dev);
230 /* Connect the heathrow PIC outputs to the 6xx bus */
231 for (i = 0; i < smp_cpus; i++) {
232 switch (PPC_INPUT(env)) {
233 case PPC_FLAGS_INPUT_6xx:
234 qdev_connect_gpio_out(pic_dev, 0,
235 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
236 break;
237 default:
238 error_report("Bus model not supported on OldWorld Mac machine");
239 exit(1);
243 /* Timebase Frequency */
244 if (kvm_enabled()) {
245 tbfreq = kvmppc_get_tbfreq();
246 } else {
247 tbfreq = TBFREQ;
250 /* init basic PC hardware */
251 if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
252 error_report("Only 6xx bus is supported on heathrow machine");
253 exit(1);
256 /* Grackle PCI host bridge */
257 dev = qdev_create(NULL, TYPE_GRACKLE_PCI_HOST_BRIDGE);
258 object_property_set_link(OBJECT(dev), OBJECT(pic_dev), "pic",
259 &error_abort);
260 qdev_init_nofail(dev);
261 s = SYS_BUS_DEVICE(dev);
262 sysbus_mmio_map(s, 0, GRACKLE_BASE);
263 sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
264 /* PCI hole */
265 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
266 sysbus_mmio_get_region(s, 2));
267 /* Register 2 MB of ISA IO space */
268 memory_region_add_subregion(get_system_memory(), 0xfe000000,
269 sysbus_mmio_get_region(s, 3));
271 pci_bus = PCI_HOST_BRIDGE(dev)->bus;
273 pci_vga_init(pci_bus);
275 for (i = 0; i < nb_nics; i++) {
276 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
279 ide_drive_get(hd, ARRAY_SIZE(hd));
281 /* MacIO */
282 macio = OLDWORLD_MACIO(pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO));
283 dev = DEVICE(macio);
284 qdev_prop_set_uint64(dev, "frequency", tbfreq);
285 object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
286 &error_abort);
287 qdev_init_nofail(dev);
289 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
290 "ide[0]"));
291 macio_ide_init_drives(macio_ide, hd);
293 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
294 "ide[1]"));
295 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
297 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
298 adb_bus = qdev_get_child_bus(dev, "adb.0");
299 dev = qdev_create(adb_bus, TYPE_ADB_KEYBOARD);
300 qdev_init_nofail(dev);
301 dev = qdev_create(adb_bus, TYPE_ADB_MOUSE);
302 qdev_init_nofail(dev);
304 if (machine_usb(machine)) {
305 pci_create_simple(pci_bus, -1, "pci-ohci");
308 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
309 graphic_depth = 15;
311 /* No PCI init: the BIOS will do it */
313 fw_cfg = fw_cfg_init_mem(CFG_ADDR, CFG_ADDR + 2);
314 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
315 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
316 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
317 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
318 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
319 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
320 if (kernel_cmdline) {
321 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
322 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
323 } else {
324 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
326 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
327 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
328 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
330 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
331 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
332 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
334 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
335 if (kvm_enabled()) {
336 #ifdef CONFIG_KVM
337 uint8_t *hypercall;
339 hypercall = g_malloc(16);
340 kvmppc_get_hypercall(env, hypercall, 16);
341 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
342 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
343 #endif
345 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
346 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
347 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
348 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
350 /* MacOS NDRV VGA driver */
351 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
352 if (filename) {
353 ndrv_size = get_image_size(filename);
354 if (ndrv_size != -1) {
355 ndrv_file = g_malloc(ndrv_size);
356 ndrv_size = load_image(filename, ndrv_file);
358 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
360 g_free(filename);
363 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
366 static int heathrow_kvm_type(const char *arg)
368 /* Always force PR KVM */
369 return 2;
372 static void heathrow_class_init(ObjectClass *oc, void *data)
374 MachineClass *mc = MACHINE_CLASS(oc);
376 mc->desc = "Heathrow based PowerMAC";
377 mc->init = ppc_heathrow_init;
378 mc->block_default_type = IF_IDE;
379 mc->max_cpus = MAX_CPUS;
380 #ifndef TARGET_PPC64
381 mc->is_default = 1;
382 #endif
383 /* TOFIX "cad" when Mac floppy is implemented */
384 mc->default_boot_order = "cd";
385 mc->kvm_type = heathrow_kvm_type;
386 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
389 static const TypeInfo ppc_heathrow_machine_info = {
390 .name = MACHINE_TYPE_NAME("g3beige"),
391 .parent = TYPE_MACHINE,
392 .class_init = heathrow_class_init
395 static void ppc_heathrow_register_types(void)
397 type_register_static(&ppc_heathrow_machine_info);
400 type_init(ppc_heathrow_register_types);