spapr: handle cpu core unplug via hotplug handler chain
[qemu.git] / hw / net / e1000x_common.h
blob0268884e72be8309c743b564ee2c70855ad9e2b7
1 /*
2 * QEMU e1000(e) emulation - shared code
4 * Copyright (c) 2008 Qumranet
6 * Based on work done by:
7 * Nir Peleg, Tutis Systems Ltd. for Qumranet Inc.
8 * Copyright (c) 2007 Dan Aloni
9 * Copyright (c) 2004 Antony T Curtis
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
25 #include "e1000_regs.h"
27 #define defreg(x) x = (E1000_##x >> 2)
28 enum {
29 defreg(CTRL), defreg(EECD), defreg(EERD), defreg(GPRC),
30 defreg(GPTC), defreg(ICR), defreg(ICS), defreg(IMC),
31 defreg(IMS), defreg(LEDCTL), defreg(MANC), defreg(MDIC),
32 defreg(MPC), defreg(PBA), defreg(RCTL), defreg(RDBAH0),
33 defreg(RDBAL0), defreg(RDH0), defreg(RDLEN0), defreg(RDT0),
34 defreg(STATUS), defreg(SWSM), defreg(TCTL), defreg(TDBAH),
35 defreg(TDBAL), defreg(TDH), defreg(TDLEN), defreg(TDT),
36 defreg(TDLEN1), defreg(TDBAL1), defreg(TDBAH1), defreg(TDH1),
37 defreg(TDT1), defreg(TORH), defreg(TORL), defreg(TOTH),
38 defreg(TOTL), defreg(TPR), defreg(TPT), defreg(TXDCTL),
39 defreg(WUFC), defreg(RA), defreg(MTA), defreg(CRCERRS),
40 defreg(VFTA), defreg(VET), defreg(RDTR), defreg(RADV),
41 defreg(TADV), defreg(ITR), defreg(SCC), defreg(ECOL),
42 defreg(MCC), defreg(LATECOL), defreg(COLC), defreg(DC),
43 defreg(TNCRS), defreg(SEQEC), defreg(CEXTERR), defreg(RLEC),
44 defreg(XONRXC), defreg(XONTXC), defreg(XOFFRXC), defreg(XOFFTXC),
45 defreg(FCRUC), defreg(AIT), defreg(TDFH), defreg(TDFT),
46 defreg(TDFHS), defreg(TDFTS), defreg(TDFPC), defreg(WUC),
47 defreg(WUS), defreg(POEMB), defreg(PBS), defreg(RDFH),
48 defreg(RDFT), defreg(RDFHS), defreg(RDFTS), defreg(RDFPC),
49 defreg(PBM), defreg(IPAV), defreg(IP4AT), defreg(IP6AT),
50 defreg(WUPM), defreg(FFLT), defreg(FFMT), defreg(FFVT),
51 defreg(TARC0), defreg(TARC1), defreg(IAM), defreg(EXTCNF_CTRL),
52 defreg(GCR), defreg(TIMINCA), defreg(EIAC), defreg(CTRL_EXT),
53 defreg(IVAR), defreg(MFUTP01), defreg(MFUTP23), defreg(MANC2H),
54 defreg(MFVAL), defreg(MDEF), defreg(FACTPS), defreg(FTFT),
55 defreg(RUC), defreg(ROC), defreg(RFC), defreg(RJC),
56 defreg(PRC64), defreg(PRC127), defreg(PRC255), defreg(PRC511),
57 defreg(PRC1023), defreg(PRC1522), defreg(PTC64), defreg(PTC127),
58 defreg(PTC255), defreg(PTC511), defreg(PTC1023), defreg(PTC1522),
59 defreg(GORCL), defreg(GORCH), defreg(GOTCL), defreg(GOTCH),
60 defreg(RNBC), defreg(BPRC), defreg(MPRC), defreg(RFCTL),
61 defreg(PSRCTL), defreg(MPTC), defreg(BPTC), defreg(TSCTFC),
62 defreg(IAC), defreg(MGTPRC), defreg(MGTPDC), defreg(MGTPTC),
63 defreg(TSCTC), defreg(RXCSUM), defreg(FUNCTAG), defreg(GSCL_1),
64 defreg(GSCL_2), defreg(GSCL_3), defreg(GSCL_4), defreg(GSCN_0),
65 defreg(GSCN_1), defreg(GSCN_2), defreg(GSCN_3), defreg(GCR2),
66 defreg(RAID), defreg(RSRPD), defreg(TIDV), defreg(EITR),
67 defreg(MRQC), defreg(RETA), defreg(RSSRK), defreg(RDBAH1),
68 defreg(RDBAL1), defreg(RDLEN1), defreg(RDH1), defreg(RDT1),
69 defreg(PBACLR), defreg(FCAL), defreg(FCAH), defreg(FCT),
70 defreg(FCRTH), defreg(FCRTL), defreg(FCTTV), defreg(FCRTV),
71 defreg(FLA), defreg(EEWR), defreg(FLOP), defreg(FLOL),
72 defreg(FLSWCTL), defreg(FLSWCNT), defreg(RXDCTL), defreg(RXDCTL1),
73 defreg(MAVTV0), defreg(MAVTV1), defreg(MAVTV2), defreg(MAVTV3),
74 defreg(TXSTMPL), defreg(TXSTMPH), defreg(SYSTIML), defreg(SYSTIMH),
75 defreg(RXCFGL), defreg(RXUDP), defreg(TIMADJL), defreg(TIMADJH),
76 defreg(RXSTMPH), defreg(RXSTMPL), defreg(RXSATRL), defreg(RXSATRH),
77 defreg(FLASHT), defreg(TIPG), defreg(RDH), defreg(RDT),
78 defreg(RDLEN), defreg(RDBAH), defreg(RDBAL),
79 defreg(TXDCTL1),
80 defreg(FLSWDATA),
81 defreg(CTRL_DUP),
82 defreg(EXTCNF_SIZE),
83 defreg(EEMNGCTL),
84 defreg(EEMNGDATA),
85 defreg(FLMNGCTL),
86 defreg(FLMNGDATA),
87 defreg(FLMNGCNT),
88 defreg(TSYNCRXCTL),
89 defreg(TSYNCTXCTL),
91 /* Aliases */
92 defreg(RDH0_A), defreg(RDT0_A), defreg(RDTR_A), defreg(RDFH_A),
93 defreg(RDFT_A), defreg(TDH_A), defreg(TDT_A), defreg(TIDV_A),
94 defreg(TDFH_A), defreg(TDFT_A), defreg(RA_A), defreg(RDBAL0_A),
95 defreg(TDBAL_A), defreg(TDLEN_A), defreg(VFTA_A), defreg(RDLEN0_A),
96 defreg(FCRTL_A), defreg(FCRTH_A)
99 static inline void
100 e1000x_inc_reg_if_not_full(uint32_t *mac, int index)
102 if (mac[index] != 0xffffffff) {
103 mac[index]++;
107 static inline void
108 e1000x_grow_8reg_if_not_full(uint32_t *mac, int index, int size)
110 uint64_t sum = mac[index] | (uint64_t)mac[index + 1] << 32;
112 if (sum + size < sum) {
113 sum = ~0ULL;
114 } else {
115 sum += size;
117 mac[index] = sum;
118 mac[index + 1] = sum >> 32;
121 static inline int
122 e1000x_vlan_enabled(uint32_t *mac)
124 return ((mac[CTRL] & E1000_CTRL_VME) != 0);
127 static inline int
128 e1000x_is_vlan_txd(uint32_t txd_lower)
130 return ((txd_lower & E1000_TXD_CMD_VLE) != 0);
133 static inline int
134 e1000x_vlan_rx_filter_enabled(uint32_t *mac)
136 return ((mac[RCTL] & E1000_RCTL_VFE) != 0);
139 static inline int
140 e1000x_fcs_len(uint32_t *mac)
142 /* FCS aka Ethernet CRC-32. We don't get it from backends and can't
143 * fill it in, just pad descriptor length by 4 bytes unless guest
144 * told us to strip it off the packet. */
145 return (mac[RCTL] & E1000_RCTL_SECRC) ? 0 : 4;
148 static inline void
149 e1000x_update_regs_on_link_down(uint32_t *mac, uint16_t *phy)
151 mac[STATUS] &= ~E1000_STATUS_LU;
152 phy[PHY_STATUS] &= ~MII_SR_LINK_STATUS;
153 phy[PHY_STATUS] &= ~MII_SR_AUTONEG_COMPLETE;
154 phy[PHY_LP_ABILITY] &= ~MII_LPAR_LPACK;
157 static inline void
158 e1000x_update_regs_on_link_up(uint32_t *mac, uint16_t *phy)
160 mac[STATUS] |= E1000_STATUS_LU;
161 phy[PHY_STATUS] |= MII_SR_LINK_STATUS;
164 void e1000x_update_rx_total_stats(uint32_t *mac,
165 size_t data_size,
166 size_t data_fcs_size);
168 void e1000x_core_prepare_eeprom(uint16_t *eeprom,
169 const uint16_t *templ,
170 uint32_t templ_size,
171 uint16_t dev_id,
172 const uint8_t *macaddr);
174 uint32_t e1000x_rxbufsize(uint32_t rctl);
176 bool e1000x_rx_ready(PCIDevice *d, uint32_t *mac);
178 bool e1000x_is_vlan_packet(const uint8_t *buf, uint16_t vet);
180 bool e1000x_rx_group_filter(uint32_t *mac, const uint8_t *buf);
182 bool e1000x_hw_rx_enabled(uint32_t *mac);
184 bool e1000x_is_oversized(uint32_t *mac, size_t size);
186 void e1000x_restart_autoneg(uint32_t *mac, uint16_t *phy, QEMUTimer *timer);
188 void e1000x_reset_mac_addr(NICState *nic, uint32_t *mac_regs,
189 uint8_t *mac_addr);
191 void e1000x_update_regs_on_autoneg_done(uint32_t *mac, uint16_t *phy);
193 void e1000x_increase_size_stats(uint32_t *mac, const int *size_regs, int size);
195 typedef struct e1000x_txd_props {
196 uint8_t ipcss;
197 uint8_t ipcso;
198 uint16_t ipcse;
199 uint8_t tucss;
200 uint8_t tucso;
201 uint16_t tucse;
202 uint32_t paylen;
203 uint8_t hdr_len;
204 uint16_t mss;
205 int8_t ip;
206 int8_t tcp;
207 bool tse;
208 } e1000x_txd_props;
210 void e1000x_read_tx_ctx_descr(struct e1000_context_desc *d,
211 e1000x_txd_props *props);