hw/arm_boot.c

   1 /*
   2  * ARM kernel loader.
   3  *
   4  * Copyright (c) 2006-2007 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licensed under the GPL.
   8  */
   9
  10 #include "config.h"
  11 #include "hw.h"
  12 #include "arm-misc.h"
  13 #include "sysemu.h"
  14 #include "boards.h"
  15 #include "loader.h"
  16 #include "elf.h"
  17 #include "device_tree.h"
  18
  19 #define KERNEL_ARGS_ADDR 0x100
  20 #define KERNEL_LOAD_ADDR 0x00010000
  21
  22 /* The worlds second smallest bootloader.  Set r0-r2, then jump to kernel.  */
  23 static uint32_t bootloader[] = {
  24   0xe3a00000, /* mov     r0, #0 */
  25   0xe59f1004, /* ldr     r1, [pc, #4] */
  26   0xe59f2004, /* ldr     r2, [pc, #4] */
  27   0xe59ff004, /* ldr     pc, [pc, #4] */
  28   0, /* Board ID */
  29   0, /* Address of kernel args.  Set by integratorcp_init.  */
  30   0  /* Kernel entry point.  Set by integratorcp_init.  */
  31 };
  32
  33 /* Handling for secondary CPU boot in a multicore system.
  34  * Unlike the uniprocessor/primary CPU boot, this is platform
  35  * dependent. The default code here is based on the secondary
  36  * CPU boot protocol used on realview/vexpress boards, with
  37  * some parameterisation to increase its flexibility.
  38  * QEMU platform models for which this code is not appropriate
  39  * should override write_secondary_boot and secondary_cpu_reset_hook
  40  * instead.
  41  *
  42  * This code enables the interrupt controllers for the secondary
  43  * CPUs and then puts all the secondary CPUs into a loop waiting
  44  * for an interprocessor interrupt and polling a configurable
  45  * location for the kernel secondary CPU entry point.
  46  */
  47 #define DSB_INSN 0xf57ff04f
  48 #define CP15_DSB_INSN 0xee070f9a /* mcr cp15, 0, r0, c7, c10, 4 */
  49
  50 static uint32_t smpboot[] = {
  51   0xe59f2028, /* ldr r2, gic_cpu_if */
  52   0xe59f0028, /* ldr r0, startaddr */
  53   0xe3a01001, /* mov r1, #1 */
  54   0xe5821000, /* str r1, [r2] - set GICC_CTLR.Enable */
  55   0xe3a010ff, /* mov r1, #0xff */
  56   0xe5821004, /* str r1, [r2, 4] - set GIC_PMR.Priority to 0xff */
  57   DSB_INSN,   /* dsb */
  58   0xe320f003, /* wfi */
  59   0xe5901000, /* ldr     r1, [r0] */
  60   0xe1110001, /* tst     r1, r1 */
  61   0x0afffffb, /* beq     <wfi> */
  62   0xe12fff11, /* bx      r1 */
  63   0,          /* gic_cpu_if: base address of GIC CPU interface */
  64   0           /* bootreg: Boot register address is held here */
  65 };
  66
  67 static void default_write_secondary(ARMCPU *cpu,
  68                                     const struct arm_boot_info *info)
  69 {
  70     int n;
  71     smpboot[ARRAY_SIZE(smpboot) - 1] = info->smp_bootreg_addr;
  72     smpboot[ARRAY_SIZE(smpboot) - 2] = info->gic_cpu_if_addr;
  73     for (n = 0; n < ARRAY_SIZE(smpboot); n++) {
  74         /* Replace DSB with the pre-v7 DSB if necessary. */
  75         if (!arm_feature(&cpu->env, ARM_FEATURE_V7) &&
  76             smpboot[n] == DSB_INSN) {
  77             smpboot[n] = CP15_DSB_INSN;
  78         }
  79         smpboot[n] = tswap32(smpboot[n]);
  80     }
  81     rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot),
  82                        info->smp_loader_start);
  83 }
  84
  85 static void default_reset_secondary(ARMCPU *cpu,
  86                                     const struct arm_boot_info *info)
  87 {
  88     CPUARMState *env = &cpu->env;
  89
  90     stl_phys_notdirty(info->smp_bootreg_addr, 0);
  91     env->regs[15] = info->smp_loader_start;
  92 }
  93
  94 #define WRITE_WORD(p, value) do { \
  95     stl_phys_notdirty(p, value);  \
  96     p += 4;                       \
  97 } while (0)
  98
  99 static void set_kernel_args(const struct arm_boot_info *info)
 100 {
 101     int initrd_size = info->initrd_size;
 102     hwaddr base = info->loader_start;
 103     hwaddr p;
 104
 105     p = base + KERNEL_ARGS_ADDR;
 106     /* ATAG_CORE */
 107     WRITE_WORD(p, 5);
 108     WRITE_WORD(p, 0x54410001);
 109     WRITE_WORD(p, 1);
 110     WRITE_WORD(p, 0x1000);
 111     WRITE_WORD(p, 0);
 112     /* ATAG_MEM */
 113     /* TODO: handle multiple chips on one ATAG list */
 114     WRITE_WORD(p, 4);
 115     WRITE_WORD(p, 0x54410002);
 116     WRITE_WORD(p, info->ram_size);
 117     WRITE_WORD(p, info->loader_start);
 118     if (initrd_size) {
 119         /* ATAG_INITRD2 */
 120         WRITE_WORD(p, 4);
 121         WRITE_WORD(p, 0x54420005);
 122         WRITE_WORD(p, info->initrd_start);
 123         WRITE_WORD(p, initrd_size);
 124     }
 125     if (info->kernel_cmdline && *info->kernel_cmdline) {
 126         /* ATAG_CMDLINE */
 127         int cmdline_size;
 128
 129         cmdline_size = strlen(info->kernel_cmdline);
 130         cpu_physical_memory_write(p + 8, (void *)info->kernel_cmdline,
 131                                   cmdline_size + 1);
 132         cmdline_size = (cmdline_size >> 2) + 1;
 133         WRITE_WORD(p, cmdline_size + 2);
 134         WRITE_WORD(p, 0x54410009);
 135         p += cmdline_size * 4;
 136     }
 137     if (info->atag_board) {
 138         /* ATAG_BOARD */
 139         int atag_board_len;
 140         uint8_t atag_board_buf[0x1000];
 141
 142         atag_board_len = (info->atag_board(info, atag_board_buf) + 3) & ~3;
 143         WRITE_WORD(p, (atag_board_len + 8) >> 2);
 144         WRITE_WORD(p, 0x414f4d50);
 145         cpu_physical_memory_write(p, atag_board_buf, atag_board_len);
 146         p += atag_board_len;
 147     }
 148     /* ATAG_END */
 149     WRITE_WORD(p, 0);
 150     WRITE_WORD(p, 0);
 151 }
 152
 153 static void set_kernel_args_old(const struct arm_boot_info *info)
 154 {
 155     hwaddr p;
 156     const char *s;
 157     int initrd_size = info->initrd_size;
 158     hwaddr base = info->loader_start;
 159
 160     /* see linux/include/asm-arm/setup.h */
 161     p = base + KERNEL_ARGS_ADDR;
 162     /* page_size */
 163     WRITE_WORD(p, 4096);
 164     /* nr_pages */
 165     WRITE_WORD(p, info->ram_size / 4096);
 166     /* ramdisk_size */
 167     WRITE_WORD(p, 0);
 168 #define FLAG_READONLY   1
 169 #define FLAG_RDLOAD     4
 170 #define FLAG_RDPROMPT   8
 171     /* flags */
 172     WRITE_WORD(p, FLAG_READONLY | FLAG_RDLOAD | FLAG_RDPROMPT);
 173     /* rootdev */
 174     WRITE_WORD(p, (31 << 8) | 0);       /* /dev/mtdblock0 */
 175     /* video_num_cols */
 176     WRITE_WORD(p, 0);
 177     /* video_num_rows */
 178     WRITE_WORD(p, 0);
 179     /* video_x */
 180     WRITE_WORD(p, 0);
 181     /* video_y */
 182     WRITE_WORD(p, 0);
 183     /* memc_control_reg */
 184     WRITE_WORD(p, 0);
 185     /* unsigned char sounddefault */
 186     /* unsigned char adfsdrives */
 187     /* unsigned char bytes_per_char_h */
 188     /* unsigned char bytes_per_char_v */
 189     WRITE_WORD(p, 0);
 190     /* pages_in_bank[4] */
 191     WRITE_WORD(p, 0);
 192     WRITE_WORD(p, 0);
 193     WRITE_WORD(p, 0);
 194     WRITE_WORD(p, 0);
 195     /* pages_in_vram */
 196     WRITE_WORD(p, 0);
 197     /* initrd_start */
 198     if (initrd_size) {
 199         WRITE_WORD(p, info->initrd_start);
 200     } else {
 201         WRITE_WORD(p, 0);
 202     }
 203     /* initrd_size */
 204     WRITE_WORD(p, initrd_size);
 205     /* rd_start */
 206     WRITE_WORD(p, 0);
 207     /* system_rev */
 208     WRITE_WORD(p, 0);
 209     /* system_serial_low */
 210     WRITE_WORD(p, 0);
 211     /* system_serial_high */
 212     WRITE_WORD(p, 0);
 213     /* mem_fclk_21285 */
 214     WRITE_WORD(p, 0);
 215     /* zero unused fields */
 216     while (p < base + KERNEL_ARGS_ADDR + 256 + 1024) {
 217         WRITE_WORD(p, 0);
 218     }
 219     s = info->kernel_cmdline;
 220     if (s) {
 221         cpu_physical_memory_write(p, (void *)s, strlen(s) + 1);
 222     } else {
 223         WRITE_WORD(p, 0);
 224     }
 225 }
 226
 227 static int load_dtb(hwaddr addr, const struct arm_boot_info *binfo)
 228 {
 229 #ifdef CONFIG_FDT
 230     uint32_t *mem_reg_property;
 231     uint32_t mem_reg_propsize;
 232     void *fdt = NULL;
 233     char *filename;
 234     int size, rc;
 235     uint32_t acells, scells, hival;
 236
 237     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, binfo->dtb_filename);
 238     if (!filename) {
 239         fprintf(stderr, "Couldn't open dtb file %s\n", binfo->dtb_filename);
 240         return -1;
 241     }
 242
 243     fdt = load_device_tree(filename, &size);
 244     if (!fdt) {
 245         fprintf(stderr, "Couldn't open dtb file %s\n", filename);
 246         g_free(filename);
 247         return -1;
 248     }
 249     g_free(filename);
 250
 251     acells = qemu_devtree_getprop_cell(fdt, "/", "#address-cells");
 252     scells = qemu_devtree_getprop_cell(fdt, "/", "#size-cells");
 253     if (acells == 0 || scells == 0) {
 254         fprintf(stderr, "dtb file invalid (#address-cells or #size-cells 0)\n");
 255         return -1;
 256     }
 257
 258     mem_reg_propsize = acells + scells;
 259     mem_reg_property = g_new0(uint32_t, mem_reg_propsize);
 260     mem_reg_property[acells - 1] = cpu_to_be32(binfo->loader_start);
 261     hival = cpu_to_be32(binfo->loader_start >> 32);
 262     if (acells > 1) {
 263         mem_reg_property[acells - 2] = hival;
 264     } else if (hival != 0) {
 265         fprintf(stderr, "qemu: dtb file not compatible with "
 266                 "RAM start address > 4GB\n");
 267         exit(1);
 268     }
 269     mem_reg_property[acells + scells - 1] = cpu_to_be32(binfo->ram_size);
 270     hival = cpu_to_be32(binfo->ram_size >> 32);
 271     if (scells > 1) {
 272         mem_reg_property[acells + scells - 2] = hival;
 273     } else if (hival != 0) {
 274         fprintf(stderr, "qemu: dtb file not compatible with "
 275                 "RAM size > 4GB\n");
 276         exit(1);
 277     }
 278
 279     rc = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
 280                               mem_reg_propsize * sizeof(uint32_t));
 281     if (rc < 0) {
 282         fprintf(stderr, "couldn't set /memory/reg\n");
 283     }
 284
 285     if (binfo->kernel_cmdline && *binfo->kernel_cmdline) {
 286         rc = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
 287                                           binfo->kernel_cmdline);
 288         if (rc < 0) {
 289             fprintf(stderr, "couldn't set /chosen/bootargs\n");
 290         }
 291     }
 292
 293     if (binfo->initrd_size) {
 294         rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 295                 binfo->initrd_start);
 296         if (rc < 0) {
 297             fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
 298         }
 299
 300         rc = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 301                     binfo->initrd_start + binfo->initrd_size);
 302         if (rc < 0) {
 303             fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
 304         }
 305     }
 306
 307     cpu_physical_memory_write(addr, fdt, size);
 308
 309     return 0;
 310
 311 #else
 312     fprintf(stderr, "Device tree requested, "
 313                 "but qemu was compiled without fdt support\n");
 314     return -1;
 315 #endif
 316 }
 317
 318 static void do_cpu_reset(void *opaque)
 319 {
 320     ARMCPU *cpu = opaque;
 321     CPUARMState *env = &cpu->env;
 322     const struct arm_boot_info *info = env->boot_info;
 323
 324     cpu_reset(CPU(cpu));
 325     if (info) {
 326         if (!info->is_linux) {
 327             /* Jump to the entry point.  */
 328             env->regs[15] = info->entry & 0xfffffffe;
 329             env->thumb = info->entry & 1;
 330         } else {
 331             if (env == first_cpu) {
 332                 env->regs[15] = info->loader_start;
 333                 if (!info->dtb_filename) {
 334                     if (old_param) {
 335                         set_kernel_args_old(info);
 336                     } else {
 337                         set_kernel_args(info);
 338                     }
 339                 }
 340             } else {
 341                 info->secondary_cpu_reset_hook(cpu, info);
 342             }
 343         }
 344     }
 345 }
 346
 347 void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info)
 348 {
 349     CPUARMState *env = &cpu->env;
 350     int kernel_size;
 351     int initrd_size;
 352     int n;
 353     int is_linux = 0;
 354     uint64_t elf_entry;
 355     hwaddr entry;
 356     int big_endian;
 357     QemuOpts *machine_opts;
 358
 359     /* Load the kernel.  */
 360     if (!info->kernel_filename) {
 361         fprintf(stderr, "Kernel image must be specified\n");
 362         exit(1);
 363     }
 364
 365     machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0);
 366     if (machine_opts) {
 367         info->dtb_filename = qemu_opt_get(machine_opts, "dtb");
 368     } else {
 369         info->dtb_filename = NULL;
 370     }
 371
 372     if (!info->secondary_cpu_reset_hook) {
 373         info->secondary_cpu_reset_hook = default_reset_secondary;
 374     }
 375     if (!info->write_secondary_boot) {
 376         info->write_secondary_boot = default_write_secondary;
 377     }
 378
 379     if (info->nb_cpus == 0)
 380         info->nb_cpus = 1;
 381
 382 #ifdef TARGET_WORDS_BIGENDIAN
 383     big_endian = 1;
 384 #else
 385     big_endian = 0;
 386 #endif
 387
 388     /* We want to put the initrd far enough into RAM that when the
 389      * kernel is uncompressed it will not clobber the initrd. However
 390      * on boards without much RAM we must ensure that we still leave
 391      * enough room for a decent sized initrd, and on boards with large
 392      * amounts of RAM we must avoid the initrd being so far up in RAM
 393      * that it is outside lowmem and inaccessible to the kernel.
 394      * So for boards with less  than 256MB of RAM we put the initrd
 395      * halfway into RAM, and for boards with 256MB of RAM or more we put
 396      * the initrd at 128MB.
 397      */
 398     info->initrd_start = info->loader_start +
 399         MIN(info->ram_size / 2, 128 * 1024 * 1024);
 400
 401     /* Assume that raw images are linux kernels, and ELF images are not.  */
 402     kernel_size = load_elf(info->kernel_filename, NULL, NULL, &elf_entry,
 403                            NULL, NULL, big_endian, ELF_MACHINE, 1);
 404     entry = elf_entry;
 405     if (kernel_size < 0) {
 406         kernel_size = load_uimage(info->kernel_filename, &entry, NULL,
 407                                   &is_linux);
 408     }
 409     if (kernel_size < 0) {
 410         entry = info->loader_start + KERNEL_LOAD_ADDR;
 411         kernel_size = load_image_targphys(info->kernel_filename, entry,
 412                                           info->ram_size - KERNEL_LOAD_ADDR);
 413         is_linux = 1;
 414     }
 415     if (kernel_size < 0) {
 416         fprintf(stderr, "qemu: could not load kernel '%s'\n",
 417                 info->kernel_filename);
 418         exit(1);
 419     }
 420     info->entry = entry;
 421     if (is_linux) {
 422         if (info->initrd_filename) {
 423             initrd_size = load_image_targphys(info->initrd_filename,
 424                                               info->initrd_start,
 425                                               info->ram_size -
 426                                               info->initrd_start);
 427             if (initrd_size < 0) {
 428                 fprintf(stderr, "qemu: could not load initrd '%s'\n",
 429                         info->initrd_filename);
 430                 exit(1);
 431             }
 432         } else {
 433             initrd_size = 0;
 434         }
 435         info->initrd_size = initrd_size;
 436
 437         bootloader[4] = info->board_id;
 438
 439         /* for device tree boot, we pass the DTB directly in r2. Otherwise
 440          * we point to the kernel args.
 441          */
 442         if (info->dtb_filename) {
 443             /* Place the DTB after the initrd in memory */
 444             hwaddr dtb_start = TARGET_PAGE_ALIGN(info->initrd_start +
 445                                                  initrd_size);
 446             if (load_dtb(dtb_start, info)) {
 447                 exit(1);
 448             }
 449             bootloader[5] = dtb_start;
 450         } else {
 451             bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR;
 452             if (info->ram_size >= (1ULL << 32)) {
 453                 fprintf(stderr, "qemu: RAM size must be less than 4GB to boot"
 454                         " Linux kernel using ATAGS (try passing a device tree"
 455                         " using -dtb)\n");
 456                 exit(1);
 457             }
 458         }
 459         bootloader[6] = entry;
 460         for (n = 0; n < sizeof(bootloader) / 4; n++) {
 461             bootloader[n] = tswap32(bootloader[n]);
 462         }
 463         rom_add_blob_fixed("bootloader", bootloader, sizeof(bootloader),
 464                            info->loader_start);
 465         if (info->nb_cpus > 1) {
 466             info->write_secondary_boot(cpu, info);
 467         }
 468     }
 469     info->is_linux = is_linux;
 470
 471     for (; env; env = env->next_cpu) {
 472         cpu = arm_env_get_cpu(env);
 473         env->boot_info = info;
 474         qemu_register_reset(do_cpu_reset, cpu);
 475     }
 476 }