2 * QEMU GRLIB GPTimer Emulator
4 * Copyright (c) 2010-2011 AdaCore
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
26 #include "qemu-timer.h"
31 #define UNIT_REG_SIZE 16 /* Size of memory mapped regs for the unit */
32 #define GPTIMER_REG_SIZE 16 /* Size of memory mapped regs for a GPTimer */
34 #define GPTIMER_MAX_TIMERS 8
36 /* GPTimer Config register fields */
37 #define GPTIMER_ENABLE (1 << 0)
38 #define GPTIMER_RESTART (1 << 1)
39 #define GPTIMER_LOAD (1 << 2)
40 #define GPTIMER_INT_ENABLE (1 << 3)
41 #define GPTIMER_INT_PENDING (1 << 4)
42 #define GPTIMER_CHAIN (1 << 5) /* Not supported */
43 #define GPTIMER_DEBUG_HALT (1 << 6) /* Not supported */
45 /* Memory mapped register offsets */
46 #define SCALER_OFFSET 0x00
47 #define SCALER_RELOAD_OFFSET 0x04
48 #define CONFIG_OFFSET 0x08
49 #define COUNTER_OFFSET 0x00
50 #define COUNTER_RELOAD_OFFSET 0x04
51 #define TIMER_BASE 0x10
53 typedef struct GPTimer GPTimer
;
54 typedef struct GPTimerUnit GPTimerUnit
;
58 struct ptimer_state
*ptimer
;
74 uint32_t nr_timers
; /* Number of timers available */
75 uint32_t freq_hz
; /* System frequency */
76 uint32_t irq_line
; /* Base irq line */
86 static void grlib_gptimer_enable(GPTimer
*timer
)
88 assert(timer
!= NULL
);
91 ptimer_stop(timer
->ptimer
);
93 if (!(timer
->config
& GPTIMER_ENABLE
)) {
95 trace_grlib_gptimer_disabled(timer
->id
, timer
->config
);
99 /* ptimer is triggered when the counter reach 0 but GPTimer is triggered at
100 underflow. Set count + 1 to simulate the GPTimer behavior. */
102 trace_grlib_gptimer_enable(timer
->id
, timer
->counter
+ 1);
104 ptimer_set_count(timer
->ptimer
, timer
->counter
+ 1);
105 ptimer_run(timer
->ptimer
, 1);
108 static void grlib_gptimer_restart(GPTimer
*timer
)
110 assert(timer
!= NULL
);
112 trace_grlib_gptimer_restart(timer
->id
, timer
->reload
);
114 timer
->counter
= timer
->reload
;
115 grlib_gptimer_enable(timer
);
118 static void grlib_gptimer_set_scaler(GPTimerUnit
*unit
, uint32_t scaler
)
123 assert(unit
!= NULL
);
126 value
= unit
->freq_hz
/ (scaler
+ 1);
128 value
= unit
->freq_hz
;
131 trace_grlib_gptimer_set_scaler(scaler
, value
);
133 for (i
= 0; i
< unit
->nr_timers
; i
++) {
134 ptimer_set_freq(unit
->timers
[i
].ptimer
, value
);
138 static void grlib_gptimer_hit(void *opaque
)
140 GPTimer
*timer
= opaque
;
141 assert(timer
!= NULL
);
143 trace_grlib_gptimer_hit(timer
->id
);
147 if (timer
->config
& GPTIMER_INT_ENABLE
) {
148 /* Set the pending bit (only unset by write in the config register) */
149 timer
->config
|= GPTIMER_INT_PENDING
;
150 qemu_irq_pulse(timer
->irq
);
153 if (timer
->config
& GPTIMER_RESTART
) {
154 grlib_gptimer_restart(timer
);
158 static uint64_t grlib_gptimer_read(void *opaque
, target_phys_addr_t addr
,
161 GPTimerUnit
*unit
= opaque
;
162 target_phys_addr_t timer_addr
;
171 trace_grlib_gptimer_readl(-1, addr
, unit
->scaler
);
174 case SCALER_RELOAD_OFFSET
:
175 trace_grlib_gptimer_readl(-1, addr
, unit
->reload
);
179 trace_grlib_gptimer_readl(-1, addr
, unit
->config
);
186 timer_addr
= (addr
% TIMER_BASE
);
187 id
= (addr
- TIMER_BASE
) / TIMER_BASE
;
189 if (id
>= 0 && id
< unit
->nr_timers
) {
191 /* GPTimer registers */
192 switch (timer_addr
) {
194 value
= ptimer_get_count(unit
->timers
[id
].ptimer
);
195 trace_grlib_gptimer_readl(id
, addr
, value
);
198 case COUNTER_RELOAD_OFFSET
:
199 value
= unit
->timers
[id
].reload
;
200 trace_grlib_gptimer_readl(id
, addr
, value
);
204 trace_grlib_gptimer_readl(id
, addr
, unit
->timers
[id
].config
);
205 return unit
->timers
[id
].config
;
213 trace_grlib_gptimer_readl(-1, addr
, 0);
217 static void grlib_gptimer_write(void *opaque
, target_phys_addr_t addr
,
218 uint64_t value
, unsigned size
)
220 GPTimerUnit
*unit
= opaque
;
221 target_phys_addr_t timer_addr
;
229 value
&= 0xFFFF; /* clean up the value */
230 unit
->scaler
= value
;
231 trace_grlib_gptimer_writel(-1, addr
, unit
->scaler
);
234 case SCALER_RELOAD_OFFSET
:
235 value
&= 0xFFFF; /* clean up the value */
236 unit
->reload
= value
;
237 trace_grlib_gptimer_writel(-1, addr
, unit
->reload
);
238 grlib_gptimer_set_scaler(unit
, value
);
242 /* Read Only (disable timer freeze not supported) */
243 trace_grlib_gptimer_writel(-1, addr
, 0);
250 timer_addr
= (addr
% TIMER_BASE
);
251 id
= (addr
- TIMER_BASE
) / TIMER_BASE
;
253 if (id
>= 0 && id
< unit
->nr_timers
) {
255 /* GPTimer registers */
256 switch (timer_addr
) {
258 trace_grlib_gptimer_writel(id
, addr
, value
);
259 unit
->timers
[id
].counter
= value
;
260 grlib_gptimer_enable(&unit
->timers
[id
]);
263 case COUNTER_RELOAD_OFFSET
:
264 trace_grlib_gptimer_writel(id
, addr
, value
);
265 unit
->timers
[id
].reload
= value
;
269 trace_grlib_gptimer_writel(id
, addr
, value
);
271 if (value
& GPTIMER_INT_PENDING
) {
272 /* clear pending bit */
273 value
&= ~GPTIMER_INT_PENDING
;
275 /* keep pending bit */
276 value
|= unit
->timers
[id
].config
& GPTIMER_INT_PENDING
;
279 unit
->timers
[id
].config
= value
;
281 /* gptimer_restart calls gptimer_enable, so if "enable" and "load"
282 bits are present, we just have to call restart. */
284 if (value
& GPTIMER_LOAD
) {
285 grlib_gptimer_restart(&unit
->timers
[id
]);
286 } else if (value
& GPTIMER_ENABLE
) {
287 grlib_gptimer_enable(&unit
->timers
[id
]);
290 /* These fields must always be read as 0 */
291 value
&= ~(GPTIMER_LOAD
& GPTIMER_DEBUG_HALT
);
293 unit
->timers
[id
].config
= value
;
302 trace_grlib_gptimer_writel(-1, addr
, value
);
305 static const MemoryRegionOps grlib_gptimer_ops
= {
306 .read
= grlib_gptimer_read
,
307 .write
= grlib_gptimer_write
,
308 .endianness
= DEVICE_NATIVE_ENDIAN
,
310 .min_access_size
= 4,
311 .max_access_size
= 4,
315 static void grlib_gptimer_reset(DeviceState
*d
)
317 GPTimerUnit
*unit
= container_of(d
, GPTimerUnit
, busdev
.qdev
);
320 assert(unit
!= NULL
);
326 unit
->config
= unit
->nr_timers
;
327 unit
->config
|= unit
->irq_line
<< 3;
328 unit
->config
|= 1 << 8; /* separate interrupt */
329 unit
->config
|= 1 << 9; /* Disable timer freeze */
332 for (i
= 0; i
< unit
->nr_timers
; i
++) {
333 GPTimer
*timer
= &unit
->timers
[i
];
338 ptimer_stop(timer
->ptimer
);
339 ptimer_set_count(timer
->ptimer
, 0);
340 ptimer_set_freq(timer
->ptimer
, unit
->freq_hz
);
344 static int grlib_gptimer_init(SysBusDevice
*dev
)
346 GPTimerUnit
*unit
= FROM_SYSBUS(typeof(*unit
), dev
);
349 assert(unit
->nr_timers
> 0);
350 assert(unit
->nr_timers
<= GPTIMER_MAX_TIMERS
);
352 unit
->timers
= g_malloc0(sizeof unit
->timers
[0] * unit
->nr_timers
);
354 for (i
= 0; i
< unit
->nr_timers
; i
++) {
355 GPTimer
*timer
= &unit
->timers
[i
];
358 timer
->bh
= qemu_bh_new(grlib_gptimer_hit
, timer
);
359 timer
->ptimer
= ptimer_init(timer
->bh
);
362 /* One IRQ line for each timer */
363 sysbus_init_irq(dev
, &timer
->irq
);
365 ptimer_set_freq(timer
->ptimer
, unit
->freq_hz
);
368 memory_region_init_io(&unit
->iomem
, &grlib_gptimer_ops
, unit
, "gptimer",
369 UNIT_REG_SIZE
+ GPTIMER_REG_SIZE
* unit
->nr_timers
);
371 sysbus_init_mmio(dev
, &unit
->iomem
);
375 static SysBusDeviceInfo grlib_gptimer_info
= {
376 .init
= grlib_gptimer_init
,
377 .qdev
.name
= "grlib,gptimer",
378 .qdev
.reset
= grlib_gptimer_reset
,
379 .qdev
.size
= sizeof(GPTimerUnit
),
380 .qdev
.props
= (Property
[]) {
381 DEFINE_PROP_UINT32("frequency", GPTimerUnit
, freq_hz
, 40000000),
382 DEFINE_PROP_UINT32("irq-line", GPTimerUnit
, irq_line
, 8),
383 DEFINE_PROP_UINT32("nr-timers", GPTimerUnit
, nr_timers
, 2),
384 DEFINE_PROP_END_OF_LIST()
388 static void grlib_gptimer_register(void)
390 sysbus_register_withprop(&grlib_gptimer_info
);
393 device_init(grlib_gptimer_register
)