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target-xtensa: avoid double-stopping at breakpoints
[qemu.git] / memory.c
blob1494e955d4db7fffde85115b30afd825ef056fe1
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qemu/bitops.h"
20 #include "qom/object.h"
21 #include "sysemu/kvm.h"
22 #include <assert.h>
23
24 #include "exec/memory-internal.h"
25
26 //#define DEBUG_UNASSIGNED
27
28 static unsigned memory_region_transaction_depth;
29 static bool memory_region_update_pending;
30 static bool global_dirty_log = false;
31
32 /* flat_view_mutex is taken around reading as->current_map; the critical
33 * section is extremely short, so I'm using a single mutex for every AS.
34 * We could also RCU for the read-side.
35 *
36 * The BQL is taken around transaction commits, hence both locks are taken
37 * while writing to as->current_map (with the BQL taken outside).
38 */
39 static QemuMutex flat_view_mutex;
40
41 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
42 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
43
44 static QTAILQ_HEAD(, AddressSpace) address_spaces
45 = QTAILQ_HEAD_INITIALIZER(address_spaces);
46
47 static void memory_init(void)
48 {
49 qemu_mutex_init(&flat_view_mutex);
50 }
51
52 typedef struct AddrRange AddrRange;
53
54 /*
55 * Note using signed integers limits us to physical addresses at most
56 * 63 bits wide. They are needed for negative offsetting in aliases
57 * (large MemoryRegion::alias_offset).
58 */
59 struct AddrRange {
60 Int128 start;
61 Int128 size;
62 };
63
64 static AddrRange addrrange_make(Int128 start, Int128 size)
65 {
66 return (AddrRange) { start, size };
67 }
68
69 static bool addrrange_equal(AddrRange r1, AddrRange r2)
70 {
71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
72 }
73
74 static Int128 addrrange_end(AddrRange r)
75 {
76 return int128_add(r.start, r.size);
77 }
78
79 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
80 {
81 int128_addto(&range.start, delta);
82 return range;
83 }
84
85 static bool addrrange_contains(AddrRange range, Int128 addr)
86 {
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89 }
90
91 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92 {
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
95 }
96
97 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98 {
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
102 }
103
104 enum ListenerDirection { Forward, Reverse };
105
106 static bool memory_listener_match(MemoryListener *listener,
107 MemoryRegionSection *section)
108 {
109 return !listener->address_space_filter
110 || listener->address_space_filter == section->address_space;
111 }
112
113 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
114 do { \
115 MemoryListener *_listener; \
116 \
117 switch (_direction) { \
118 case Forward: \
119 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
123 } \
124 break; \
125 case Reverse: \
126 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
127 memory_listeners, link) { \
128 if (_listener->_callback) { \
129 _listener->_callback(_listener, ##_args); \
130 } \
131 } \
132 break; \
133 default: \
134 abort(); \
135 } \
136 } while (0)
137
138 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
139 do { \
140 MemoryListener *_listener; \
141 \
142 switch (_direction) { \
143 case Forward: \
144 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
145 if (_listener->_callback \
146 && memory_listener_match(_listener, _section)) { \
147 _listener->_callback(_listener, _section, ##_args); \
148 } \
149 } \
150 break; \
151 case Reverse: \
152 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
153 memory_listeners, link) { \
154 if (_listener->_callback \
155 && memory_listener_match(_listener, _section)) { \
156 _listener->_callback(_listener, _section, ##_args); \
157 } \
158 } \
159 break; \
160 default: \
161 abort(); \
162 } \
163 } while (0)
164
165 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
166 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback) \
167 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
168 .mr = (fr)->mr, \
169 .address_space = (as), \
170 .offset_within_region = (fr)->offset_in_region, \
171 .size = (fr)->addr.size, \
172 .offset_within_address_space = int128_get64((fr)->addr.start), \
173 .readonly = (fr)->readonly, \
174 }))
175
176 struct CoalescedMemoryRange {
177 AddrRange addr;
178 QTAILQ_ENTRY(CoalescedMemoryRange) link;
179 };
180
181 struct MemoryRegionIoeventfd {
182 AddrRange addr;
183 bool match_data;
184 uint64_t data;
185 EventNotifier *e;
186 };
187
188 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
189 MemoryRegionIoeventfd b)
190 {
191 if (int128_lt(a.addr.start, b.addr.start)) {
192 return true;
193 } else if (int128_gt(a.addr.start, b.addr.start)) {
194 return false;
195 } else if (int128_lt(a.addr.size, b.addr.size)) {
196 return true;
197 } else if (int128_gt(a.addr.size, b.addr.size)) {
198 return false;
199 } else if (a.match_data < b.match_data) {
200 return true;
201 } else if (a.match_data > b.match_data) {
202 return false;
203 } else if (a.match_data) {
204 if (a.data < b.data) {
205 return true;
206 } else if (a.data > b.data) {
207 return false;
208 }
209 }
210 if (a.e < b.e) {
211 return true;
212 } else if (a.e > b.e) {
213 return false;
214 }
215 return false;
216 }
217
218 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
219 MemoryRegionIoeventfd b)
220 {
221 return !memory_region_ioeventfd_before(a, b)
222 && !memory_region_ioeventfd_before(b, a);
223 }
224
225 typedef struct FlatRange FlatRange;
226 typedef struct FlatView FlatView;
227
228 /* Range of memory in the global map. Addresses are absolute. */
229 struct FlatRange {
230 MemoryRegion *mr;
231 hwaddr offset_in_region;
232 AddrRange addr;
233 uint8_t dirty_log_mask;
234 bool romd_mode;
235 bool readonly;
236 };
237
238 /* Flattened global view of current active memory hierarchy. Kept in sorted
239 * order.
240 */
241 struct FlatView {
242 unsigned ref;
243 FlatRange *ranges;
244 unsigned nr;
245 unsigned nr_allocated;
246 };
247
248 typedef struct AddressSpaceOps AddressSpaceOps;
249
250 #define FOR_EACH_FLAT_RANGE(var, view) \
251 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
252
253 static bool flatrange_equal(FlatRange *a, FlatRange *b)
254 {
255 return a->mr == b->mr
256 && addrrange_equal(a->addr, b->addr)
257 && a->offset_in_region == b->offset_in_region
258 && a->romd_mode == b->romd_mode
259 && a->readonly == b->readonly;
260 }
261
262 static void flatview_init(FlatView *view)
263 {
264 view->ref = 1;
265 view->ranges = NULL;
266 view->nr = 0;
267 view->nr_allocated = 0;
268 }
269
270 /* Insert a range into a given position. Caller is responsible for maintaining
271 * sorting order.
272 */
273 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
274 {
275 if (view->nr == view->nr_allocated) {
276 view->nr_allocated = MAX(2 * view->nr, 10);
277 view->ranges = g_realloc(view->ranges,
278 view->nr_allocated * sizeof(*view->ranges));
279 }
280 memmove(view->ranges + pos + 1, view->ranges + pos,
281 (view->nr - pos) * sizeof(FlatRange));
282 view->ranges[pos] = *range;
283 memory_region_ref(range->mr);
284 ++view->nr;
285 }
286
287 static void flatview_destroy(FlatView *view)
288 {
289 int i;
290
291 for (i = 0; i < view->nr; i++) {
292 memory_region_unref(view->ranges[i].mr);
293 }
294 g_free(view->ranges);
295 g_free(view);
296 }
297
298 static void flatview_ref(FlatView *view)
299 {
300 atomic_inc(&view->ref);
301 }
302
303 static void flatview_unref(FlatView *view)
304 {
305 if (atomic_fetch_dec(&view->ref) == 1) {
306 flatview_destroy(view);
307 }
308 }
309
310 static bool can_merge(FlatRange *r1, FlatRange *r2)
311 {
312 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
313 && r1->mr == r2->mr
314 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
315 r1->addr.size),
316 int128_make64(r2->offset_in_region))
317 && r1->dirty_log_mask == r2->dirty_log_mask
318 && r1->romd_mode == r2->romd_mode
319 && r1->readonly == r2->readonly;
320 }
321
322 /* Attempt to simplify a view by merging adjacent ranges */
323 static void flatview_simplify(FlatView *view)
324 {
325 unsigned i, j;
326
327 i = 0;
328 while (i < view->nr) {
329 j = i + 1;
330 while (j < view->nr
331 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
332 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
333 ++j;
334 }
335 ++i;
336 memmove(&view->ranges[i], &view->ranges[j],
337 (view->nr - j) * sizeof(view->ranges[j]));
338 view->nr -= j - i;
339 }
340 }
341
342 static bool memory_region_big_endian(MemoryRegion *mr)
343 {
344 #ifdef TARGET_WORDS_BIGENDIAN
345 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
346 #else
347 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
348 #endif
349 }
350
351 static bool memory_region_wrong_endianness(MemoryRegion *mr)
352 {
353 #ifdef TARGET_WORDS_BIGENDIAN
354 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
355 #else
356 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
357 #endif
358 }
359
360 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
361 {
362 if (memory_region_wrong_endianness(mr)) {
363 switch (size) {
364 case 1:
365 break;
366 case 2:
367 *data = bswap16(*data);
368 break;
369 case 4:
370 *data = bswap32(*data);
371 break;
372 case 8:
373 *data = bswap64(*data);
374 break;
375 default:
376 abort();
377 }
378 }
379 }
380
381 static void memory_region_oldmmio_read_accessor(MemoryRegion *mr,
382 hwaddr addr,
383 uint64_t *value,
384 unsigned size,
385 unsigned shift,
386 uint64_t mask)
387 {
388 uint64_t tmp;
389
390 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
391 *value |= (tmp & mask) << shift;
392 }
393
394 static void memory_region_read_accessor(MemoryRegion *mr,
395 hwaddr addr,
396 uint64_t *value,
397 unsigned size,
398 unsigned shift,
399 uint64_t mask)
400 {
401 uint64_t tmp;
402
403 if (mr->flush_coalesced_mmio) {
404 qemu_flush_coalesced_mmio_buffer();
405 }
406 tmp = mr->ops->read(mr->opaque, addr, size);
407 *value |= (tmp & mask) << shift;
408 }
409
410 static void memory_region_oldmmio_write_accessor(MemoryRegion *mr,
411 hwaddr addr,
412 uint64_t *value,
413 unsigned size,
414 unsigned shift,
415 uint64_t mask)
416 {
417 uint64_t tmp;
418
419 tmp = (*value >> shift) & mask;
420 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
421 }
422
423 static void memory_region_write_accessor(MemoryRegion *mr,
424 hwaddr addr,
425 uint64_t *value,
426 unsigned size,
427 unsigned shift,
428 uint64_t mask)
429 {
430 uint64_t tmp;
431
432 if (mr->flush_coalesced_mmio) {
433 qemu_flush_coalesced_mmio_buffer();
434 }
435 tmp = (*value >> shift) & mask;
436 mr->ops->write(mr->opaque, addr, tmp, size);
437 }
438
439 static void access_with_adjusted_size(hwaddr addr,
440 uint64_t *value,
441 unsigned size,
442 unsigned access_size_min,
443 unsigned access_size_max,
444 void (*access)(MemoryRegion *mr,
445 hwaddr addr,
446 uint64_t *value,
447 unsigned size,
448 unsigned shift,
449 uint64_t mask),
450 MemoryRegion *mr)
451 {
452 uint64_t access_mask;
453 unsigned access_size;
454 unsigned i;
455
456 if (!access_size_min) {
457 access_size_min = 1;
458 }
459 if (!access_size_max) {
460 access_size_max = 4;
461 }
462
463 /* FIXME: support unaligned access? */
464 access_size = MAX(MIN(size, access_size_max), access_size_min);
465 access_mask = -1ULL >> (64 - access_size * 8);
466 if (memory_region_big_endian(mr)) {
467 for (i = 0; i < size; i += access_size) {
468 access(mr, addr + i, value, access_size,
469 (size - access_size - i) * 8, access_mask);
470 }
471 } else {
472 for (i = 0; i < size; i += access_size) {
473 access(mr, addr + i, value, access_size, i * 8, access_mask);
474 }
475 }
476 }
477
478 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
479 {
480 AddressSpace *as;
481
482 while (mr->parent) {
483 mr = mr->parent;
484 }
485 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
486 if (mr == as->root) {
487 return as;
488 }
489 }
490 abort();
491 }
492
493 /* Render a memory region into the global view. Ranges in @view obscure
494 * ranges in @mr.
495 */
496 static void render_memory_region(FlatView *view,
497 MemoryRegion *mr,
498 Int128 base,
499 AddrRange clip,
500 bool readonly)
501 {
502 MemoryRegion *subregion;
503 unsigned i;
504 hwaddr offset_in_region;
505 Int128 remain;
506 Int128 now;
507 FlatRange fr;
508 AddrRange tmp;
509
510 if (!mr->enabled) {
511 return;
512 }
513
514 int128_addto(&base, int128_make64(mr->addr));
515 readonly |= mr->readonly;
516
517 tmp = addrrange_make(base, mr->size);
518
519 if (!addrrange_intersects(tmp, clip)) {
520 return;
521 }
522
523 clip = addrrange_intersection(tmp, clip);
524
525 if (mr->alias) {
526 int128_subfrom(&base, int128_make64(mr->alias->addr));
527 int128_subfrom(&base, int128_make64(mr->alias_offset));
528 render_memory_region(view, mr->alias, base, clip, readonly);
529 return;
530 }
531
532 /* Render subregions in priority order. */
533 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
534 render_memory_region(view, subregion, base, clip, readonly);
535 }
536
537 if (!mr->terminates) {
538 return;
539 }
540
541 offset_in_region = int128_get64(int128_sub(clip.start, base));
542 base = clip.start;
543 remain = clip.size;
544
545 fr.mr = mr;
546 fr.dirty_log_mask = mr->dirty_log_mask;
547 fr.romd_mode = mr->romd_mode;
548 fr.readonly = readonly;
549
550 /* Render the region itself into any gaps left by the current view. */
551 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
552 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
553 continue;
554 }
555 if (int128_lt(base, view->ranges[i].addr.start)) {
556 now = int128_min(remain,
557 int128_sub(view->ranges[i].addr.start, base));
558 fr.offset_in_region = offset_in_region;
559 fr.addr = addrrange_make(base, now);
560 flatview_insert(view, i, &fr);
561 ++i;
562 int128_addto(&base, now);
563 offset_in_region += int128_get64(now);
564 int128_subfrom(&remain, now);
565 }
566 now = int128_sub(int128_min(int128_add(base, remain),
567 addrrange_end(view->ranges[i].addr)),
568 base);
569 int128_addto(&base, now);
570 offset_in_region += int128_get64(now);
571 int128_subfrom(&remain, now);
572 }
573 if (int128_nz(remain)) {
574 fr.offset_in_region = offset_in_region;
575 fr.addr = addrrange_make(base, remain);
576 flatview_insert(view, i, &fr);
577 }
578 }
579
580 /* Render a memory topology into a list of disjoint absolute ranges. */
581 static FlatView *generate_memory_topology(MemoryRegion *mr)
582 {
583 FlatView *view;
584
585 view = g_new(FlatView, 1);
586 flatview_init(view);
587
588 if (mr) {
589 render_memory_region(view, mr, int128_zero(),
590 addrrange_make(int128_zero(), int128_2_64()), false);
591 }
592 flatview_simplify(view);
593
594 return view;
595 }
596
597 static void address_space_add_del_ioeventfds(AddressSpace *as,
598 MemoryRegionIoeventfd *fds_new,
599 unsigned fds_new_nb,
600 MemoryRegionIoeventfd *fds_old,
601 unsigned fds_old_nb)
602 {
603 unsigned iold, inew;
604 MemoryRegionIoeventfd *fd;
605 MemoryRegionSection section;
606
607 /* Generate a symmetric difference of the old and new fd sets, adding
608 * and deleting as necessary.
609 */
610
611 iold = inew = 0;
612 while (iold < fds_old_nb || inew < fds_new_nb) {
613 if (iold < fds_old_nb
614 && (inew == fds_new_nb
615 || memory_region_ioeventfd_before(fds_old[iold],
616 fds_new[inew]))) {
617 fd = &fds_old[iold];
618 section = (MemoryRegionSection) {
619 .address_space = as,
620 .offset_within_address_space = int128_get64(fd->addr.start),
621 .size = fd->addr.size,
622 };
623 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
624 fd->match_data, fd->data, fd->e);
625 ++iold;
626 } else if (inew < fds_new_nb
627 && (iold == fds_old_nb
628 || memory_region_ioeventfd_before(fds_new[inew],
629 fds_old[iold]))) {
630 fd = &fds_new[inew];
631 section = (MemoryRegionSection) {
632 .address_space = as,
633 .offset_within_address_space = int128_get64(fd->addr.start),
634 .size = fd->addr.size,
635 };
636 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
637 fd->match_data, fd->data, fd->e);
638 ++inew;
639 } else {
640 ++iold;
641 ++inew;
642 }
643 }
644 }
645
646 static FlatView *address_space_get_flatview(AddressSpace *as)
647 {
648 FlatView *view;
649
650 qemu_mutex_lock(&flat_view_mutex);
651 view = as->current_map;
652 flatview_ref(view);
653 qemu_mutex_unlock(&flat_view_mutex);
654 return view;
655 }
656
657 static void address_space_update_ioeventfds(AddressSpace *as)
658 {
659 FlatView *view;
660 FlatRange *fr;
661 unsigned ioeventfd_nb = 0;
662 MemoryRegionIoeventfd *ioeventfds = NULL;
663 AddrRange tmp;
664 unsigned i;
665
666 view = address_space_get_flatview(as);
667 FOR_EACH_FLAT_RANGE(fr, view) {
668 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
669 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
670 int128_sub(fr->addr.start,
671 int128_make64(fr->offset_in_region)));
672 if (addrrange_intersects(fr->addr, tmp)) {
673 ++ioeventfd_nb;
674 ioeventfds = g_realloc(ioeventfds,
675 ioeventfd_nb * sizeof(*ioeventfds));
676 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
677 ioeventfds[ioeventfd_nb-1].addr = tmp;
678 }
679 }
680 }
681
682 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
683 as->ioeventfds, as->ioeventfd_nb);
684
685 g_free(as->ioeventfds);
686 as->ioeventfds = ioeventfds;
687 as->ioeventfd_nb = ioeventfd_nb;
688 flatview_unref(view);
689 }
690
691 static void address_space_update_topology_pass(AddressSpace *as,
692 const FlatView *old_view,
693 const FlatView *new_view,
694 bool adding)
695 {
696 unsigned iold, inew;
697 FlatRange *frold, *frnew;
698
699 /* Generate a symmetric difference of the old and new memory maps.
700 * Kill ranges in the old map, and instantiate ranges in the new map.
701 */
702 iold = inew = 0;
703 while (iold < old_view->nr || inew < new_view->nr) {
704 if (iold < old_view->nr) {
705 frold = &old_view->ranges[iold];
706 } else {
707 frold = NULL;
708 }
709 if (inew < new_view->nr) {
710 frnew = &new_view->ranges[inew];
711 } else {
712 frnew = NULL;
713 }
714
715 if (frold
716 && (!frnew
717 || int128_lt(frold->addr.start, frnew->addr.start)
718 || (int128_eq(frold->addr.start, frnew->addr.start)
719 && !flatrange_equal(frold, frnew)))) {
720 /* In old but not in new, or in both but attributes changed. */
721
722 if (!adding) {
723 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
724 }
725
726 ++iold;
727 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
728 /* In both and unchanged (except logging may have changed) */
729
730 if (adding) {
731 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
732 if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
733 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop);
734 } else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
735 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start);
736 }
737 }
738
739 ++iold;
740 ++inew;
741 } else {
742 /* In new */
743
744 if (adding) {
745 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
746 }
747
748 ++inew;
749 }
750 }
751 }
752
753
754 static void address_space_update_topology(AddressSpace *as)
755 {
756 FlatView *old_view = address_space_get_flatview(as);
757 FlatView *new_view = generate_memory_topology(as->root);
758
759 address_space_update_topology_pass(as, old_view, new_view, false);
760 address_space_update_topology_pass(as, old_view, new_view, true);
761
762 qemu_mutex_lock(&flat_view_mutex);
763 flatview_unref(as->current_map);
764 as->current_map = new_view;
765 qemu_mutex_unlock(&flat_view_mutex);
766
767 /* Note that all the old MemoryRegions are still alive up to this
768 * point. This relieves most MemoryListeners from the need to
769 * ref/unref the MemoryRegions they get---unless they use them
770 * outside the iothread mutex, in which case precise reference
771 * counting is necessary.
772 */
773 flatview_unref(old_view);
774
775 address_space_update_ioeventfds(as);
776 }
777
778 void memory_region_transaction_begin(void)
779 {
780 qemu_flush_coalesced_mmio_buffer();
781 ++memory_region_transaction_depth;
782 }
783
784 void memory_region_transaction_commit(void)
785 {
786 AddressSpace *as;
787
788 assert(memory_region_transaction_depth);
789 --memory_region_transaction_depth;
790 if (!memory_region_transaction_depth && memory_region_update_pending) {
791 memory_region_update_pending = false;
792 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
793
794 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
795 address_space_update_topology(as);
796 }
797
798 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
799 }
800 }
801
802 static void memory_region_destructor_none(MemoryRegion *mr)
803 {
804 }
805
806 static void memory_region_destructor_ram(MemoryRegion *mr)
807 {
808 qemu_ram_free(mr->ram_addr);
809 }
810
811 static void memory_region_destructor_alias(MemoryRegion *mr)
812 {
813 memory_region_unref(mr->alias);
814 }
815
816 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
817 {
818 qemu_ram_free_from_ptr(mr->ram_addr);
819 }
820
821 static void memory_region_destructor_rom_device(MemoryRegion *mr)
822 {
823 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
824 }
825
826 void memory_region_init(MemoryRegion *mr,
827 Object *owner,
828 const char *name,
829 uint64_t size)
830 {
831 mr->ops = &unassigned_mem_ops;
832 mr->opaque = NULL;
833 mr->owner = owner;
834 mr->iommu_ops = NULL;
835 mr->parent = NULL;
836 mr->size = int128_make64(size);
837 if (size == UINT64_MAX) {
838 mr->size = int128_2_64();
839 }
840 mr->addr = 0;
841 mr->subpage = false;
842 mr->enabled = true;
843 mr->terminates = false;
844 mr->ram = false;
845 mr->romd_mode = true;
846 mr->readonly = false;
847 mr->rom_device = false;
848 mr->destructor = memory_region_destructor_none;
849 mr->priority = 0;
850 mr->may_overlap = false;
851 mr->alias = NULL;
852 QTAILQ_INIT(&mr->subregions);
853 memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
854 QTAILQ_INIT(&mr->coalesced);
855 mr->name = g_strdup(name);
856 mr->dirty_log_mask = 0;
857 mr->ioeventfd_nb = 0;
858 mr->ioeventfds = NULL;
859 mr->flush_coalesced_mmio = false;
860 }
861
862 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
863 unsigned size)
864 {
865 #ifdef DEBUG_UNASSIGNED
866 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
867 #endif
868 if (current_cpu != NULL) {
869 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
870 }
871 return -1ULL;
872 }
873
874 static void unassigned_mem_write(void *opaque, hwaddr addr,
875 uint64_t val, unsigned size)
876 {
877 #ifdef DEBUG_UNASSIGNED
878 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
879 #endif
880 if (current_cpu != NULL) {
881 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
882 }
883 }
884
885 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
886 unsigned size, bool is_write)
887 {
888 return false;
889 }
890
891 const MemoryRegionOps unassigned_mem_ops = {
892 .valid.accepts = unassigned_mem_accepts,
893 .endianness = DEVICE_NATIVE_ENDIAN,
894 };
895
896 bool memory_region_access_valid(MemoryRegion *mr,
897 hwaddr addr,
898 unsigned size,
899 bool is_write)
900 {
901 int access_size_min, access_size_max;
902 int access_size, i;
903
904 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
905 return false;
906 }
907
908 if (!mr->ops->valid.accepts) {
909 return true;
910 }
911
912 access_size_min = mr->ops->valid.min_access_size;
913 if (!mr->ops->valid.min_access_size) {
914 access_size_min = 1;
915 }
916
917 access_size_max = mr->ops->valid.max_access_size;
918 if (!mr->ops->valid.max_access_size) {
919 access_size_max = 4;
920 }
921
922 access_size = MAX(MIN(size, access_size_max), access_size_min);
923 for (i = 0; i < size; i += access_size) {
924 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
925 is_write)) {
926 return false;
927 }
928 }
929
930 return true;
931 }
932
933 static uint64_t memory_region_dispatch_read1(MemoryRegion *mr,
934 hwaddr addr,
935 unsigned size)
936 {
937 uint64_t data = 0;
938
939 if (mr->ops->read) {
940 access_with_adjusted_size(addr, &data, size,
941 mr->ops->impl.min_access_size,
942 mr->ops->impl.max_access_size,
943 memory_region_read_accessor, mr);
944 } else {
945 access_with_adjusted_size(addr, &data, size, 1, 4,
946 memory_region_oldmmio_read_accessor, mr);
947 }
948
949 return data;
950 }
951
952 static bool memory_region_dispatch_read(MemoryRegion *mr,
953 hwaddr addr,
954 uint64_t *pval,
955 unsigned size)
956 {
957 if (!memory_region_access_valid(mr, addr, size, false)) {
958 *pval = unassigned_mem_read(mr, addr, size);
959 return true;
960 }
961
962 *pval = memory_region_dispatch_read1(mr, addr, size);
963 adjust_endianness(mr, pval, size);
964 return false;
965 }
966
967 static bool memory_region_dispatch_write(MemoryRegion *mr,
968 hwaddr addr,
969 uint64_t data,
970 unsigned size)
971 {
972 if (!memory_region_access_valid(mr, addr, size, true)) {
973 unassigned_mem_write(mr, addr, data, size);
974 return true;
975 }
976
977 adjust_endianness(mr, &data, size);
978
979 if (mr->ops->write) {
980 access_with_adjusted_size(addr, &data, size,
981 mr->ops->impl.min_access_size,
982 mr->ops->impl.max_access_size,
983 memory_region_write_accessor, mr);
984 } else {
985 access_with_adjusted_size(addr, &data, size, 1, 4,
986 memory_region_oldmmio_write_accessor, mr);
987 }
988 return false;
989 }
990
991 void memory_region_init_io(MemoryRegion *mr,
992 Object *owner,
993 const MemoryRegionOps *ops,
994 void *opaque,
995 const char *name,
996 uint64_t size)
997 {
998 memory_region_init(mr, owner, name, size);
999 mr->ops = ops;
1000 mr->opaque = opaque;
1001 mr->terminates = true;
1002 mr->ram_addr = ~(ram_addr_t)0;
1003 }
1004
1005 void memory_region_init_ram(MemoryRegion *mr,
1006 Object *owner,
1007 const char *name,
1008 uint64_t size)
1009 {
1010 memory_region_init(mr, owner, name, size);
1011 mr->ram = true;
1012 mr->terminates = true;
1013 mr->destructor = memory_region_destructor_ram;
1014 mr->ram_addr = qemu_ram_alloc(size, mr);
1015 }
1016
1017 void memory_region_init_ram_ptr(MemoryRegion *mr,
1018 Object *owner,
1019 const char *name,
1020 uint64_t size,
1021 void *ptr)
1022 {
1023 memory_region_init(mr, owner, name, size);
1024 mr->ram = true;
1025 mr->terminates = true;
1026 mr->destructor = memory_region_destructor_ram_from_ptr;
1027 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr);
1028 }
1029
1030 void memory_region_init_alias(MemoryRegion *mr,
1031 Object *owner,
1032 const char *name,
1033 MemoryRegion *orig,
1034 hwaddr offset,
1035 uint64_t size)
1036 {
1037 memory_region_init(mr, owner, name, size);
1038 memory_region_ref(orig);
1039 mr->destructor = memory_region_destructor_alias;
1040 mr->alias = orig;
1041 mr->alias_offset = offset;
1042 }
1043
1044 void memory_region_init_rom_device(MemoryRegion *mr,
1045 Object *owner,
1046 const MemoryRegionOps *ops,
1047 void *opaque,
1048 const char *name,
1049 uint64_t size)
1050 {
1051 memory_region_init(mr, owner, name, size);
1052 mr->ops = ops;
1053 mr->opaque = opaque;
1054 mr->terminates = true;
1055 mr->rom_device = true;
1056 mr->destructor = memory_region_destructor_rom_device;
1057 mr->ram_addr = qemu_ram_alloc(size, mr);
1058 }
1059
1060 void memory_region_init_iommu(MemoryRegion *mr,
1061 Object *owner,
1062 const MemoryRegionIOMMUOps *ops,
1063 const char *name,
1064 uint64_t size)
1065 {
1066 memory_region_init(mr, owner, name, size);
1067 mr->iommu_ops = ops,
1068 mr->terminates = true; /* then re-forwards */
1069 notifier_list_init(&mr->iommu_notify);
1070 }
1071
1072 void memory_region_init_reservation(MemoryRegion *mr,
1073 Object *owner,
1074 const char *name,
1075 uint64_t size)
1076 {
1077 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1078 }
1079
1080 void memory_region_destroy(MemoryRegion *mr)
1081 {
1082 assert(QTAILQ_EMPTY(&mr->subregions));
1083 assert(memory_region_transaction_depth == 0);
1084 mr->destructor(mr);
1085 memory_region_clear_coalescing(mr);
1086 g_free((char *)mr->name);
1087 g_free(mr->ioeventfds);
1088 }
1089
1090 Object *memory_region_owner(MemoryRegion *mr)
1091 {
1092 return mr->owner;
1093 }
1094
1095 void memory_region_ref(MemoryRegion *mr)
1096 {
1097 if (mr && mr->owner) {
1098 object_ref(mr->owner);
1099 }
1100 }
1101
1102 void memory_region_unref(MemoryRegion *mr)
1103 {
1104 if (mr && mr->owner) {
1105 object_unref(mr->owner);
1106 }
1107 }
1108
1109 uint64_t memory_region_size(MemoryRegion *mr)
1110 {
1111 if (int128_eq(mr->size, int128_2_64())) {
1112 return UINT64_MAX;
1113 }
1114 return int128_get64(mr->size);
1115 }
1116
1117 const char *memory_region_name(MemoryRegion *mr)
1118 {
1119 return mr->name;
1120 }
1121
1122 bool memory_region_is_ram(MemoryRegion *mr)
1123 {
1124 return mr->ram;
1125 }
1126
1127 bool memory_region_is_logging(MemoryRegion *mr)
1128 {
1129 return mr->dirty_log_mask;
1130 }
1131
1132 bool memory_region_is_rom(MemoryRegion *mr)
1133 {
1134 return mr->ram && mr->readonly;
1135 }
1136
1137 bool memory_region_is_iommu(MemoryRegion *mr)
1138 {
1139 return mr->iommu_ops;
1140 }
1141
1142 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1143 {
1144 notifier_list_add(&mr->iommu_notify, n);
1145 }
1146
1147 void memory_region_unregister_iommu_notifier(Notifier *n)
1148 {
1149 notifier_remove(n);
1150 }
1151
1152 void memory_region_notify_iommu(MemoryRegion *mr,
1153 IOMMUTLBEntry entry)
1154 {
1155 assert(memory_region_is_iommu(mr));
1156 notifier_list_notify(&mr->iommu_notify, &entry);
1157 }
1158
1159 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1160 {
1161 uint8_t mask = 1 << client;
1162
1163 memory_region_transaction_begin();
1164 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1165 memory_region_update_pending |= mr->enabled;
1166 memory_region_transaction_commit();
1167 }
1168
1169 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1170 hwaddr size, unsigned client)
1171 {
1172 assert(mr->terminates);
1173 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1174 1 << client);
1175 }
1176
1177 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1178 hwaddr size)
1179 {
1180 assert(mr->terminates);
1181 return cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size, -1);
1182 }
1183
1184 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1185 hwaddr size, unsigned client)
1186 {
1187 bool ret;
1188 assert(mr->terminates);
1189 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size,
1190 1 << client);
1191 if (ret) {
1192 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1193 mr->ram_addr + addr + size,
1194 1 << client);
1195 }
1196 return ret;
1197 }
1198
1199
1200 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1201 {
1202 AddressSpace *as;
1203 FlatRange *fr;
1204
1205 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1206 FlatView *view = address_space_get_flatview(as);
1207 FOR_EACH_FLAT_RANGE(fr, view) {
1208 if (fr->mr == mr) {
1209 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1210 }
1211 }
1212 flatview_unref(view);
1213 }
1214 }
1215
1216 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1217 {
1218 if (mr->readonly != readonly) {
1219 memory_region_transaction_begin();
1220 mr->readonly = readonly;
1221 memory_region_update_pending |= mr->enabled;
1222 memory_region_transaction_commit();
1223 }
1224 }
1225
1226 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1227 {
1228 if (mr->romd_mode != romd_mode) {
1229 memory_region_transaction_begin();
1230 mr->romd_mode = romd_mode;
1231 memory_region_update_pending |= mr->enabled;
1232 memory_region_transaction_commit();
1233 }
1234 }
1235
1236 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1237 hwaddr size, unsigned client)
1238 {
1239 assert(mr->terminates);
1240 cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
1241 mr->ram_addr + addr + size,
1242 1 << client);
1243 }
1244
1245 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1246 {
1247 if (mr->alias) {
1248 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1249 }
1250
1251 assert(mr->terminates);
1252
1253 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1254 }
1255
1256 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1257 {
1258 FlatView *view;
1259 FlatRange *fr;
1260 CoalescedMemoryRange *cmr;
1261 AddrRange tmp;
1262 MemoryRegionSection section;
1263
1264 view = address_space_get_flatview(as);
1265 FOR_EACH_FLAT_RANGE(fr, view) {
1266 if (fr->mr == mr) {
1267 section = (MemoryRegionSection) {
1268 .address_space = as,
1269 .offset_within_address_space = int128_get64(fr->addr.start),
1270 .size = fr->addr.size,
1271 };
1272
1273 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1274 int128_get64(fr->addr.start),
1275 int128_get64(fr->addr.size));
1276 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1277 tmp = addrrange_shift(cmr->addr,
1278 int128_sub(fr->addr.start,
1279 int128_make64(fr->offset_in_region)));
1280 if (!addrrange_intersects(tmp, fr->addr)) {
1281 continue;
1282 }
1283 tmp = addrrange_intersection(tmp, fr->addr);
1284 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1285 int128_get64(tmp.start),
1286 int128_get64(tmp.size));
1287 }
1288 }
1289 }
1290 flatview_unref(view);
1291 }
1292
1293 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1294 {
1295 AddressSpace *as;
1296
1297 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1298 memory_region_update_coalesced_range_as(mr, as);
1299 }
1300 }
1301
1302 void memory_region_set_coalescing(MemoryRegion *mr)
1303 {
1304 memory_region_clear_coalescing(mr);
1305 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1306 }
1307
1308 void memory_region_add_coalescing(MemoryRegion *mr,
1309 hwaddr offset,
1310 uint64_t size)
1311 {
1312 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1313
1314 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1315 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1316 memory_region_update_coalesced_range(mr);
1317 memory_region_set_flush_coalesced(mr);
1318 }
1319
1320 void memory_region_clear_coalescing(MemoryRegion *mr)
1321 {
1322 CoalescedMemoryRange *cmr;
1323
1324 qemu_flush_coalesced_mmio_buffer();
1325 mr->flush_coalesced_mmio = false;
1326
1327 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1328 cmr = QTAILQ_FIRST(&mr->coalesced);
1329 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1330 g_free(cmr);
1331 }
1332 memory_region_update_coalesced_range(mr);
1333 }
1334
1335 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1336 {
1337 mr->flush_coalesced_mmio = true;
1338 }
1339
1340 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1341 {
1342 qemu_flush_coalesced_mmio_buffer();
1343 if (QTAILQ_EMPTY(&mr->coalesced)) {
1344 mr->flush_coalesced_mmio = false;
1345 }
1346 }
1347
1348 void memory_region_add_eventfd(MemoryRegion *mr,
1349 hwaddr addr,
1350 unsigned size,
1351 bool match_data,
1352 uint64_t data,
1353 EventNotifier *e)
1354 {
1355 MemoryRegionIoeventfd mrfd = {
1356 .addr.start = int128_make64(addr),
1357 .addr.size = int128_make64(size),
1358 .match_data = match_data,
1359 .data = data,
1360 .e = e,
1361 };
1362 unsigned i;
1363
1364 adjust_endianness(mr, &mrfd.data, size);
1365 memory_region_transaction_begin();
1366 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1367 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1368 break;
1369 }
1370 }
1371 ++mr->ioeventfd_nb;
1372 mr->ioeventfds = g_realloc(mr->ioeventfds,
1373 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1374 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1375 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1376 mr->ioeventfds[i] = mrfd;
1377 memory_region_update_pending |= mr->enabled;
1378 memory_region_transaction_commit();
1379 }
1380
1381 void memory_region_del_eventfd(MemoryRegion *mr,
1382 hwaddr addr,
1383 unsigned size,
1384 bool match_data,
1385 uint64_t data,
1386 EventNotifier *e)
1387 {
1388 MemoryRegionIoeventfd mrfd = {
1389 .addr.start = int128_make64(addr),
1390 .addr.size = int128_make64(size),
1391 .match_data = match_data,
1392 .data = data,
1393 .e = e,
1394 };
1395 unsigned i;
1396
1397 adjust_endianness(mr, &mrfd.data, size);
1398 memory_region_transaction_begin();
1399 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1400 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1401 break;
1402 }
1403 }
1404 assert(i != mr->ioeventfd_nb);
1405 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1406 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1407 --mr->ioeventfd_nb;
1408 mr->ioeventfds = g_realloc(mr->ioeventfds,
1409 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1410 memory_region_update_pending |= mr->enabled;
1411 memory_region_transaction_commit();
1412 }
1413
1414 static void memory_region_add_subregion_common(MemoryRegion *mr,
1415 hwaddr offset,
1416 MemoryRegion *subregion)
1417 {
1418 MemoryRegion *other;
1419
1420 memory_region_transaction_begin();
1421
1422 assert(!subregion->parent);
1423 memory_region_ref(subregion);
1424 subregion->parent = mr;
1425 subregion->addr = offset;
1426 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1427 if (subregion->may_overlap || other->may_overlap) {
1428 continue;
1429 }
1430 if (int128_ge(int128_make64(offset),
1431 int128_add(int128_make64(other->addr), other->size))
1432 || int128_le(int128_add(int128_make64(offset), subregion->size),
1433 int128_make64(other->addr))) {
1434 continue;
1435 }
1436 #if 0
1437 printf("warning: subregion collision %llx/%llx (%s) "
1438 "vs %llx/%llx (%s)\n",
1439 (unsigned long long)offset,
1440 (unsigned long long)int128_get64(subregion->size),
1441 subregion->name,
1442 (unsigned long long)other->addr,
1443 (unsigned long long)int128_get64(other->size),
1444 other->name);
1445 #endif
1446 }
1447 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1448 if (subregion->priority >= other->priority) {
1449 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1450 goto done;
1451 }
1452 }
1453 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1454 done:
1455 memory_region_update_pending |= mr->enabled && subregion->enabled;
1456 memory_region_transaction_commit();
1457 }
1458
1459
1460 void memory_region_add_subregion(MemoryRegion *mr,
1461 hwaddr offset,
1462 MemoryRegion *subregion)
1463 {
1464 subregion->may_overlap = false;
1465 subregion->priority = 0;
1466 memory_region_add_subregion_common(mr, offset, subregion);
1467 }
1468
1469 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1470 hwaddr offset,
1471 MemoryRegion *subregion,
1472 unsigned priority)
1473 {
1474 subregion->may_overlap = true;
1475 subregion->priority = priority;
1476 memory_region_add_subregion_common(mr, offset, subregion);
1477 }
1478
1479 void memory_region_del_subregion(MemoryRegion *mr,
1480 MemoryRegion *subregion)
1481 {
1482 memory_region_transaction_begin();
1483 assert(subregion->parent == mr);
1484 subregion->parent = NULL;
1485 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1486 memory_region_unref(subregion);
1487 memory_region_update_pending |= mr->enabled && subregion->enabled;
1488 memory_region_transaction_commit();
1489 }
1490
1491 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1492 {
1493 if (enabled == mr->enabled) {
1494 return;
1495 }
1496 memory_region_transaction_begin();
1497 mr->enabled = enabled;
1498 memory_region_update_pending = true;
1499 memory_region_transaction_commit();
1500 }
1501
1502 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1503 {
1504 MemoryRegion *parent = mr->parent;
1505 unsigned priority = mr->priority;
1506 bool may_overlap = mr->may_overlap;
1507
1508 if (addr == mr->addr || !parent) {
1509 mr->addr = addr;
1510 return;
1511 }
1512
1513 memory_region_transaction_begin();
1514 memory_region_ref(mr);
1515 memory_region_del_subregion(parent, mr);
1516 if (may_overlap) {
1517 memory_region_add_subregion_overlap(parent, addr, mr, priority);
1518 } else {
1519 memory_region_add_subregion(parent, addr, mr);
1520 }
1521 memory_region_unref(mr);
1522 memory_region_transaction_commit();
1523 }
1524
1525 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1526 {
1527 assert(mr->alias);
1528
1529 if (offset == mr->alias_offset) {
1530 return;
1531 }
1532
1533 memory_region_transaction_begin();
1534 mr->alias_offset = offset;
1535 memory_region_update_pending |= mr->enabled;
1536 memory_region_transaction_commit();
1537 }
1538
1539 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1540 {
1541 return mr->ram_addr;
1542 }
1543
1544 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1545 {
1546 const AddrRange *addr = addr_;
1547 const FlatRange *fr = fr_;
1548
1549 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1550 return -1;
1551 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1552 return 1;
1553 }
1554 return 0;
1555 }
1556
1557 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1558 {
1559 return bsearch(&addr, view->ranges, view->nr,
1560 sizeof(FlatRange), cmp_flatrange_addr);
1561 }
1562
1563 bool memory_region_present(MemoryRegion *parent, hwaddr addr)
1564 {
1565 MemoryRegion *mr = memory_region_find(parent, addr, 1).mr;
1566 if (!mr) {
1567 return false;
1568 }
1569 memory_region_unref(mr);
1570 return true;
1571 }
1572
1573 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1574 hwaddr addr, uint64_t size)
1575 {
1576 MemoryRegionSection ret = { .mr = NULL };
1577 MemoryRegion *root;
1578 AddressSpace *as;
1579 AddrRange range;
1580 FlatView *view;
1581 FlatRange *fr;
1582
1583 addr += mr->addr;
1584 for (root = mr; root->parent; ) {
1585 root = root->parent;
1586 addr += root->addr;
1587 }
1588
1589 as = memory_region_to_address_space(root);
1590 range = addrrange_make(int128_make64(addr), int128_make64(size));
1591
1592 view = address_space_get_flatview(as);
1593 fr = flatview_lookup(view, range);
1594 if (!fr) {
1595 return ret;
1596 }
1597
1598 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1599 --fr;
1600 }
1601
1602 ret.mr = fr->mr;
1603 ret.address_space = as;
1604 range = addrrange_intersection(range, fr->addr);
1605 ret.offset_within_region = fr->offset_in_region;
1606 ret.offset_within_region += int128_get64(int128_sub(range.start,
1607 fr->addr.start));
1608 ret.size = range.size;
1609 ret.offset_within_address_space = int128_get64(range.start);
1610 ret.readonly = fr->readonly;
1611 memory_region_ref(ret.mr);
1612
1613 flatview_unref(view);
1614 return ret;
1615 }
1616
1617 void address_space_sync_dirty_bitmap(AddressSpace *as)
1618 {
1619 FlatView *view;
1620 FlatRange *fr;
1621
1622 view = address_space_get_flatview(as);
1623 FOR_EACH_FLAT_RANGE(fr, view) {
1624 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1625 }
1626 flatview_unref(view);
1627 }
1628
1629 void memory_global_dirty_log_start(void)
1630 {
1631 global_dirty_log = true;
1632 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1633 }
1634
1635 void memory_global_dirty_log_stop(void)
1636 {
1637 global_dirty_log = false;
1638 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1639 }
1640
1641 static void listener_add_address_space(MemoryListener *listener,
1642 AddressSpace *as)
1643 {
1644 FlatView *view;
1645 FlatRange *fr;
1646
1647 if (listener->address_space_filter
1648 && listener->address_space_filter != as) {
1649 return;
1650 }
1651
1652 if (global_dirty_log) {
1653 if (listener->log_global_start) {
1654 listener->log_global_start(listener);
1655 }
1656 }
1657
1658 view = address_space_get_flatview(as);
1659 FOR_EACH_FLAT_RANGE(fr, view) {
1660 MemoryRegionSection section = {
1661 .mr = fr->mr,
1662 .address_space = as,
1663 .offset_within_region = fr->offset_in_region,
1664 .size = fr->addr.size,
1665 .offset_within_address_space = int128_get64(fr->addr.start),
1666 .readonly = fr->readonly,
1667 };
1668 if (listener->region_add) {
1669 listener->region_add(listener, &section);
1670 }
1671 }
1672 flatview_unref(view);
1673 }
1674
1675 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
1676 {
1677 MemoryListener *other = NULL;
1678 AddressSpace *as;
1679
1680 listener->address_space_filter = filter;
1681 if (QTAILQ_EMPTY(&memory_listeners)
1682 || listener->priority >= QTAILQ_LAST(&memory_listeners,
1683 memory_listeners)->priority) {
1684 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
1685 } else {
1686 QTAILQ_FOREACH(other, &memory_listeners, link) {
1687 if (listener->priority < other->priority) {
1688 break;
1689 }
1690 }
1691 QTAILQ_INSERT_BEFORE(other, listener, link);
1692 }
1693
1694 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1695 listener_add_address_space(listener, as);
1696 }
1697 }
1698
1699 void memory_listener_unregister(MemoryListener *listener)
1700 {
1701 QTAILQ_REMOVE(&memory_listeners, listener, link);
1702 }
1703
1704 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1705 {
1706 if (QTAILQ_EMPTY(&address_spaces)) {
1707 memory_init();
1708 }
1709
1710 memory_region_transaction_begin();
1711 as->root = root;
1712 as->current_map = g_new(FlatView, 1);
1713 flatview_init(as->current_map);
1714 as->ioeventfd_nb = 0;
1715 as->ioeventfds = NULL;
1716 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
1717 as->name = g_strdup(name ? name : "anonymous");
1718 address_space_init_dispatch(as);
1719 memory_region_update_pending |= root->enabled;
1720 memory_region_transaction_commit();
1721 }
1722
1723 void address_space_destroy(AddressSpace *as)
1724 {
1725 /* Flush out anything from MemoryListeners listening in on this */
1726 memory_region_transaction_begin();
1727 as->root = NULL;
1728 memory_region_transaction_commit();
1729 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
1730 address_space_destroy_dispatch(as);
1731 flatview_unref(as->current_map);
1732 g_free(as->name);
1733 g_free(as->ioeventfds);
1734 }
1735
1736 bool io_mem_read(MemoryRegion *mr, hwaddr addr, uint64_t *pval, unsigned size)
1737 {
1738 return memory_region_dispatch_read(mr, addr, pval, size);
1739 }
1740
1741 bool io_mem_write(MemoryRegion *mr, hwaddr addr,
1742 uint64_t val, unsigned size)
1743 {
1744 return memory_region_dispatch_write(mr, addr, val, size);
1745 }
1746
1747 typedef struct MemoryRegionList MemoryRegionList;
1748
1749 struct MemoryRegionList {
1750 const MemoryRegion *mr;
1751 bool printed;
1752 QTAILQ_ENTRY(MemoryRegionList) queue;
1753 };
1754
1755 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
1756
1757 static void mtree_print_mr(fprintf_function mon_printf, void *f,
1758 const MemoryRegion *mr, unsigned int level,
1759 hwaddr base,
1760 MemoryRegionListHead *alias_print_queue)
1761 {
1762 MemoryRegionList *new_ml, *ml, *next_ml;
1763 MemoryRegionListHead submr_print_queue;
1764 const MemoryRegion *submr;
1765 unsigned int i;
1766
1767 if (!mr || !mr->enabled) {
1768 return;
1769 }
1770
1771 for (i = 0; i < level; i++) {
1772 mon_printf(f, " ");
1773 }
1774
1775 if (mr->alias) {
1776 MemoryRegionList *ml;
1777 bool found = false;
1778
1779 /* check if the alias is already in the queue */
1780 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
1781 if (ml->mr == mr->alias && !ml->printed) {
1782 found = true;
1783 }
1784 }
1785
1786 if (!found) {
1787 ml = g_new(MemoryRegionList, 1);
1788 ml->mr = mr->alias;
1789 ml->printed = false;
1790 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
1791 }
1792 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
1793 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
1794 "-" TARGET_FMT_plx "\n",
1795 base + mr->addr,
1796 base + mr->addr
1797 + (int128_nz(mr->size) ?
1798 (hwaddr)int128_get64(int128_sub(mr->size,
1799 int128_one())) : 0),
1800 mr->priority,
1801 mr->romd_mode ? 'R' : '-',
1802 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1803 : '-',
1804 mr->name,
1805 mr->alias->name,
1806 mr->alias_offset,
1807 mr->alias_offset
1808 + (hwaddr)int128_get64(mr->size) - 1);
1809 } else {
1810 mon_printf(f,
1811 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s\n",
1812 base + mr->addr,
1813 base + mr->addr
1814 + (int128_nz(mr->size) ?
1815 (hwaddr)int128_get64(int128_sub(mr->size,
1816 int128_one())) : 0),
1817 mr->priority,
1818 mr->romd_mode ? 'R' : '-',
1819 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
1820 : '-',
1821 mr->name);
1822 }
1823
1824 QTAILQ_INIT(&submr_print_queue);
1825
1826 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
1827 new_ml = g_new(MemoryRegionList, 1);
1828 new_ml->mr = submr;
1829 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1830 if (new_ml->mr->addr < ml->mr->addr ||
1831 (new_ml->mr->addr == ml->mr->addr &&
1832 new_ml->mr->priority > ml->mr->priority)) {
1833 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
1834 new_ml = NULL;
1835 break;
1836 }
1837 }
1838 if (new_ml) {
1839 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
1840 }
1841 }
1842
1843 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
1844 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
1845 alias_print_queue);
1846 }
1847
1848 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
1849 g_free(ml);
1850 }
1851 }
1852
1853 void mtree_info(fprintf_function mon_printf, void *f)
1854 {
1855 MemoryRegionListHead ml_head;
1856 MemoryRegionList *ml, *ml2;
1857 AddressSpace *as;
1858
1859 QTAILQ_INIT(&ml_head);
1860
1861 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1862 mon_printf(f, "%s\n", as->name);
1863 mtree_print_mr(mon_printf, f, as->root, 0, 0, &ml_head);
1864 }
1865
1866 mon_printf(f, "aliases\n");
1867 /* print aliased regions */
1868 QTAILQ_FOREACH(ml, &ml_head, queue) {
1869 if (!ml->printed) {
1870 mon_printf(f, "%s\n", ml->mr->name);
1871 mtree_print_mr(mon_printf, f, ml->mr, 0, 0, &ml_head);
1872 }
1873 }
1874
1875 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
1876 g_free(ml);
1877 }
1878 }
QEmu