Merge tag 'qemu-macppc-20230206' of https://github.com/mcayland/qemu into staging
[qemu.git] / include / hw / i386 / pc.h
blob66e3d059ef5a7f4edea7e4f424447e5c9bed5cb5
1 #ifndef HW_PC_H
2 #define HW_PC_H
4 #include "qemu/notify.h"
5 #include "qapi/qapi-types-common.h"
6 #include "qemu/uuid.h"
7 #include "hw/boards.h"
8 #include "hw/block/fdc.h"
9 #include "hw/block/flash.h"
10 #include "hw/i386/x86.h"
12 #include "hw/hotplug.h"
13 #include "qom/object.h"
14 #include "hw/i386/sgx-epc.h"
15 #include "hw/firmware/smbios.h"
16 #include "hw/cxl/cxl.h"
18 #define HPET_INTCAP "hpet-intcap"
20 /**
21 * PCMachineState:
22 * @acpi_dev: link to ACPI PM device that performs ACPI hotplug handling
23 * @boot_cpus: number of present VCPUs
25 typedef struct PCMachineState {
26 /*< private >*/
27 X86MachineState parent_obj;
29 /* <public> */
31 /* State for other subsystems/APIs: */
32 Notifier machine_done;
34 /* Pointers to devices and objects: */
35 PCIBus *bus;
36 I2CBus *smbus;
37 PFlashCFI01 *flash[2];
38 ISADevice *pcspk;
39 DeviceState *iommu;
41 /* Configuration options: */
42 uint64_t max_ram_below_4g;
43 OnOffAuto vmport;
44 SmbiosEntryPointType smbios_entry_point_type;
46 bool acpi_build_enabled;
47 bool smbus_enabled;
48 bool sata_enabled;
49 bool hpet_enabled;
50 bool i8042_enabled;
51 bool default_bus_bypass_iommu;
52 uint64_t max_fw_size;
54 /* ACPI Memory hotplug IO base address */
55 hwaddr memhp_io_base;
57 SGXEPCState sgx_epc;
58 CXLState cxl_devices_state;
59 } PCMachineState;
61 #define PC_MACHINE_ACPI_DEVICE_PROP "acpi-device"
62 #define PC_MACHINE_MAX_RAM_BELOW_4G "max-ram-below-4g"
63 #define PC_MACHINE_DEVMEM_REGION_SIZE "device-memory-region-size"
64 #define PC_MACHINE_VMPORT "vmport"
65 #define PC_MACHINE_SMBUS "smbus"
66 #define PC_MACHINE_SATA "sata"
67 #define PC_MACHINE_I8042 "i8042"
68 #define PC_MACHINE_MAX_FW_SIZE "max-fw-size"
69 #define PC_MACHINE_SMBIOS_EP "smbios-entry-point-type"
71 /**
72 * PCMachineClass:
74 * Compat fields:
76 * @enforce_aligned_dimm: check that DIMM's address/size is aligned by
77 * backend's alignment value if provided
78 * @acpi_data_size: Size of the chunk of memory at the top of RAM
79 * for the BIOS ACPI tables and other BIOS
80 * datastructures.
81 * @gigabyte_align: Make sure that guest addresses aligned at
82 * 1Gbyte boundaries get mapped to host
83 * addresses aligned at 1Gbyte boundaries. This
84 * way we can use 1GByte pages in the host.
87 struct PCMachineClass {
88 /*< private >*/
89 X86MachineClass parent_class;
91 /*< public >*/
93 /* Device configuration: */
94 bool pci_enabled;
95 bool kvmclock_enabled;
96 const char *default_nic_model;
98 /* Compat options: */
100 /* Default CPU model version. See x86_cpu_set_default_version(). */
101 int default_cpu_version;
103 /* ACPI compat: */
104 bool has_acpi_build;
105 bool rsdp_in_ram;
106 int legacy_acpi_table_size;
107 unsigned acpi_data_size;
108 int pci_root_uid;
110 /* SMBIOS compat: */
111 bool smbios_defaults;
112 bool smbios_legacy_mode;
113 bool smbios_uuid_encoded;
115 /* RAM / address space compat: */
116 bool gigabyte_align;
117 bool has_reserved_memory;
118 bool enforce_aligned_dimm;
119 bool broken_reserved_end;
120 bool enforce_amd_1tb_hole;
122 /* generate legacy CPU hotplug AML */
123 bool legacy_cpu_hotplug;
125 /* use PVH to load kernels that support this feature */
126 bool pvh_enabled;
128 /* create kvmclock device even when KVM PV features are not exposed */
129 bool kvmclock_create_always;
131 /* skip passing an rng seed for legacy machines */
132 bool legacy_no_rng_seed;
135 #define TYPE_PC_MACHINE "generic-pc-machine"
136 OBJECT_DECLARE_TYPE(PCMachineState, PCMachineClass, PC_MACHINE)
138 /* ioapic.c */
140 GSIState *pc_gsi_create(qemu_irq **irqs, bool pci_enabled);
142 /* pc.c */
143 extern int fd_bootchk;
145 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
147 void pc_guest_info_init(PCMachineState *pcms);
149 #define PCI_HOST_PROP_PCI_HOLE_START "pci-hole-start"
150 #define PCI_HOST_PROP_PCI_HOLE_END "pci-hole-end"
151 #define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
152 #define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
153 #define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
154 #define PCI_HOST_BELOW_4G_MEM_SIZE "below-4g-mem-size"
155 #define PCI_HOST_ABOVE_4G_MEM_SIZE "above-4g-mem-size"
158 void pc_pci_as_mapping_init(MemoryRegion *system_memory,
159 MemoryRegion *pci_address_space);
161 void xen_load_linux(PCMachineState *pcms);
162 void pc_memory_init(PCMachineState *pcms,
163 MemoryRegion *system_memory,
164 MemoryRegion *rom_memory,
165 MemoryRegion **ram_memory,
166 uint64_t pci_hole64_size);
167 uint64_t pc_pci_hole64_start(void);
168 DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus);
169 void pc_basic_device_init(struct PCMachineState *pcms,
170 ISABus *isa_bus, qemu_irq *gsi,
171 ISADevice **rtc_state,
172 bool create_fdctrl,
173 uint32_t hpet_irqs);
174 void pc_cmos_init(PCMachineState *pcms,
175 BusState *ide0, BusState *ide1,
176 ISADevice *s);
177 void pc_nic_init(PCMachineClass *pcmc, ISABus *isa_bus, PCIBus *pci_bus);
179 void pc_i8259_create(ISABus *isa_bus, qemu_irq *i8259_irqs);
181 /* port92.c */
182 #define PORT92_A20_LINE "a20"
184 #define TYPE_PORT92 "port92"
186 /* pc_sysfw.c */
187 void pc_system_flash_create(PCMachineState *pcms);
188 void pc_system_flash_cleanup_unused(PCMachineState *pcms);
189 void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
190 bool pc_system_ovmf_table_find(const char *entry, uint8_t **data,
191 int *data_len);
192 void pc_system_parse_ovmf_flash(uint8_t *flash_ptr, size_t flash_size);
194 /* hw/i386/acpi-common.c */
195 void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
196 GArray *entry, bool force_enabled);
198 /* sgx.c */
199 void pc_machine_init_sgx_epc(PCMachineState *pcms);
201 extern GlobalProperty pc_compat_7_2[];
202 extern const size_t pc_compat_7_2_len;
204 extern GlobalProperty pc_compat_7_1[];
205 extern const size_t pc_compat_7_1_len;
207 extern GlobalProperty pc_compat_7_0[];
208 extern const size_t pc_compat_7_0_len;
210 extern GlobalProperty pc_compat_6_2[];
211 extern const size_t pc_compat_6_2_len;
213 extern GlobalProperty pc_compat_6_1[];
214 extern const size_t pc_compat_6_1_len;
216 extern GlobalProperty pc_compat_6_0[];
217 extern const size_t pc_compat_6_0_len;
219 extern GlobalProperty pc_compat_5_2[];
220 extern const size_t pc_compat_5_2_len;
222 extern GlobalProperty pc_compat_5_1[];
223 extern const size_t pc_compat_5_1_len;
225 extern GlobalProperty pc_compat_5_0[];
226 extern const size_t pc_compat_5_0_len;
228 extern GlobalProperty pc_compat_4_2[];
229 extern const size_t pc_compat_4_2_len;
231 extern GlobalProperty pc_compat_4_1[];
232 extern const size_t pc_compat_4_1_len;
234 extern GlobalProperty pc_compat_4_0[];
235 extern const size_t pc_compat_4_0_len;
237 extern GlobalProperty pc_compat_3_1[];
238 extern const size_t pc_compat_3_1_len;
240 extern GlobalProperty pc_compat_3_0[];
241 extern const size_t pc_compat_3_0_len;
243 extern GlobalProperty pc_compat_2_12[];
244 extern const size_t pc_compat_2_12_len;
246 extern GlobalProperty pc_compat_2_11[];
247 extern const size_t pc_compat_2_11_len;
249 extern GlobalProperty pc_compat_2_10[];
250 extern const size_t pc_compat_2_10_len;
252 extern GlobalProperty pc_compat_2_9[];
253 extern const size_t pc_compat_2_9_len;
255 extern GlobalProperty pc_compat_2_8[];
256 extern const size_t pc_compat_2_8_len;
258 extern GlobalProperty pc_compat_2_7[];
259 extern const size_t pc_compat_2_7_len;
261 extern GlobalProperty pc_compat_2_6[];
262 extern const size_t pc_compat_2_6_len;
264 extern GlobalProperty pc_compat_2_5[];
265 extern const size_t pc_compat_2_5_len;
267 extern GlobalProperty pc_compat_2_4[];
268 extern const size_t pc_compat_2_4_len;
270 extern GlobalProperty pc_compat_2_3[];
271 extern const size_t pc_compat_2_3_len;
273 extern GlobalProperty pc_compat_2_2[];
274 extern const size_t pc_compat_2_2_len;
276 extern GlobalProperty pc_compat_2_1[];
277 extern const size_t pc_compat_2_1_len;
279 extern GlobalProperty pc_compat_2_0[];
280 extern const size_t pc_compat_2_0_len;
282 extern GlobalProperty pc_compat_1_7[];
283 extern const size_t pc_compat_1_7_len;
285 extern GlobalProperty pc_compat_1_6[];
286 extern const size_t pc_compat_1_6_len;
288 extern GlobalProperty pc_compat_1_5[];
289 extern const size_t pc_compat_1_5_len;
291 extern GlobalProperty pc_compat_1_4[];
292 extern const size_t pc_compat_1_4_len;
294 #define DEFINE_PC_MACHINE(suffix, namestr, initfn, optsfn) \
295 static void pc_machine_##suffix##_class_init(ObjectClass *oc, void *data) \
297 MachineClass *mc = MACHINE_CLASS(oc); \
298 optsfn(mc); \
299 mc->init = initfn; \
301 static const TypeInfo pc_machine_type_##suffix = { \
302 .name = namestr TYPE_MACHINE_SUFFIX, \
303 .parent = TYPE_PC_MACHINE, \
304 .class_init = pc_machine_##suffix##_class_init, \
305 }; \
306 static void pc_machine_init_##suffix(void) \
308 type_register(&pc_machine_type_##suffix); \
310 type_init(pc_machine_init_##suffix)
312 #endif