include/hw/char/pl011.h

   1 /*
   2  * This program is free software; you can redistribute it and/or modify it
   3  * under the terms and conditions of the GNU General Public License,
   4  * version 2 or later, as published by the Free Software Foundation.
   5  *
   6  * This program is distributed in the hope it will be useful, but WITHOUT
   7  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   8  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   9  * more details.
  10  *
  11  * You should have received a copy of the GNU General Public License along with
  12  * this program.  If not, see <http://www.gnu.org/licenses/>.
  13  */
  14
  15 #ifndef HW_PL011_H
  16 #define HW_PL011_H
  17
  18 #include "hw/qdev-properties.h"
  19 #include "hw/sysbus.h"
  20 #include "chardev/char-fe.h"
  21 #include "qapi/error.h"
  22 #include "qom/object.h"
  23
  24 #define TYPE_PL011 "pl011"
  25 OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
  26
  27 /* This shares the same struct (and cast macro) as the base pl011 device */
  28 #define TYPE_PL011_LUMINARY "pl011_luminary"
  29
  30 /* Depth of UART FIFO in bytes, when FIFO mode is enabled (else depth == 1) */
  31 #define PL011_FIFO_DEPTH 16
  32
  33 struct PL011State {
  34     SysBusDevice parent_obj;
  35
  36     MemoryRegion iomem;
  37     uint32_t readbuff;
  38     uint32_t flags;
  39     uint32_t lcr;
  40     uint32_t rsr;
  41     uint32_t cr;
  42     uint32_t dmacr;
  43     uint32_t int_enabled;
  44     uint32_t int_level;
  45     uint32_t read_fifo[PL011_FIFO_DEPTH];
  46     uint32_t ilpr;
  47     uint32_t ibrd;
  48     uint32_t fbrd;
  49     uint32_t ifl;
  50     int read_pos;
  51     int read_count;
  52     int read_trigger;
  53     CharBackend chr;
  54     qemu_irq irq[6];
  55     Clock *clk;
  56     bool migrate_clk;
  57     const unsigned char *id;
  58 };
  59
  60 static inline DeviceState *pl011_create(hwaddr addr,
  61                                         qemu_irq irq,
  62                                         Chardev *chr)
  63 {
  64     DeviceState *dev;
  65     SysBusDevice *s;
  66
  67     dev = qdev_new("pl011");
  68     s = SYS_BUS_DEVICE(dev);
  69     qdev_prop_set_chr(dev, "chardev", chr);
  70     sysbus_realize_and_unref(s, &error_fatal);
  71     sysbus_mmio_map(s, 0, addr);
  72     sysbus_connect_irq(s, 0, irq);
  73
  74     return dev;
  75 }
  76
  77 static inline DeviceState *pl011_luminary_create(hwaddr addr,
  78                                                  qemu_irq irq,
  79                                                  Chardev *chr)
  80 {
  81     DeviceState *dev;
  82     SysBusDevice *s;
  83
  84     dev = qdev_new("pl011_luminary");
  85     s = SYS_BUS_DEVICE(dev);
  86     qdev_prop_set_chr(dev, "chardev", chr);
  87     sysbus_realize_and_unref(s, &error_fatal);
  88     sysbus_mmio_map(s, 0, addr);
  89     sysbus_connect_irq(s, 0, irq);
  90
  91     return dev;
  92 }
  93
  94 #endif