hw/i386/acpi-common.c

   1 /* Support for generating ACPI tables and passing them to Guests
   2  *
   3  * Copyright (C) 2008-2010  Kevin O'Connor <kevin@koconnor.net>
   4  * Copyright (C) 2006 Fabrice Bellard
   5  * Copyright (C) 2013 Red Hat Inc
   6  *
   7  * Author: Michael S. Tsirkin <mst@redhat.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18
  19  * You should have received a copy of the GNU General Public License along
  20  * with this program; if not, see <http://www.gnu.org/licenses/>.
  21  */
  22
  23 #include "qemu/osdep.h"
  24 #include "qapi/error.h"
  25
  26 #include "exec/memory.h"
  27 #include "hw/acpi/acpi.h"
  28 #include "hw/acpi/aml-build.h"
  29 #include "hw/acpi/utils.h"
  30 #include "hw/i386/pc.h"
  31 #include "target/i386/cpu.h"
  32
  33 #include "acpi-build.h"
  34 #include "acpi-common.h"
  35
  36 void pc_madt_cpu_entry(int uid, const CPUArchIdList *apic_ids,
  37                        GArray *entry, bool force_enabled)
  38 {
  39     uint32_t apic_id = apic_ids->cpus[uid].arch_id;
  40     /* Flags – Local APIC Flags */
  41     uint32_t flags = apic_ids->cpus[uid].cpu != NULL || force_enabled ?
  42                      1 /* Enabled */ : 0;
  43
  44     /* ACPI spec says that LAPIC entry for non present
  45      * CPU may be omitted from MADT or it must be marked
  46      * as disabled. However omitting non present CPU from
  47      * MADT breaks hotplug on linux. So possible CPUs
  48      * should be put in MADT but kept disabled.
  49      */
  50     if (apic_id < 255) {
  51         /* Rev 1.0b, Table 5-13 Processor Local APIC Structure */
  52         build_append_int_noprefix(entry, 0, 1);       /* Type */
  53         build_append_int_noprefix(entry, 8, 1);       /* Length */
  54         build_append_int_noprefix(entry, uid, 1);     /* ACPI Processor ID */
  55         build_append_int_noprefix(entry, apic_id, 1); /* APIC ID */
  56         build_append_int_noprefix(entry, flags, 4); /* Flags */
  57     } else {
  58         /* Rev 4.0, 5.2.12.12 Processor Local x2APIC Structure */
  59         build_append_int_noprefix(entry, 9, 1);       /* Type */
  60         build_append_int_noprefix(entry, 16, 1);      /* Length */
  61         build_append_int_noprefix(entry, 0, 2);       /* Reserved */
  62         build_append_int_noprefix(entry, apic_id, 4); /* X2APIC ID */
  63         build_append_int_noprefix(entry, flags, 4);   /* Flags */
  64         build_append_int_noprefix(entry, uid, 4);     /* ACPI Processor UID */
  65     }
  66 }
  67
  68 static void build_ioapic(GArray *entry, uint8_t id, uint32_t addr, uint32_t irq)
  69 {
  70     /* Rev 1.0b, 5.2.8.2 IO APIC */
  71     build_append_int_noprefix(entry, 1, 1);    /* Type */
  72     build_append_int_noprefix(entry, 12, 1);   /* Length */
  73     build_append_int_noprefix(entry, id, 1);   /* IO APIC ID */
  74     build_append_int_noprefix(entry, 0, 1);    /* Reserved */
  75     build_append_int_noprefix(entry, addr, 4); /* IO APIC Address */
  76     build_append_int_noprefix(entry, irq, 4);  /* System Vector Base */
  77 }
  78
  79 static void
  80 build_xrupt_override(GArray *entry, uint8_t src, uint32_t gsi, uint16_t flags)
  81 {
  82     /* Rev 1.0b, 5.2.8.3.1 Interrupt Source Overrides */
  83     build_append_int_noprefix(entry, 2, 1);  /* Type */
  84     build_append_int_noprefix(entry, 10, 1); /* Length */
  85     build_append_int_noprefix(entry, 0, 1);  /* Bus */
  86     build_append_int_noprefix(entry, src, 1);  /* Source */
  87     /* Global System Interrupt Vector */
  88     build_append_int_noprefix(entry, gsi, 4);
  89     build_append_int_noprefix(entry, flags, 2);  /* Flags */
  90 }
  91
  92 /*
  93  * ACPI spec, Revision 1.0b
  94  * 5.2.8 Multiple APIC Description Table
  95  */
  96 void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
  97                      X86MachineState *x86ms, AcpiDeviceIf *adev,
  98                      const char *oem_id, const char *oem_table_id)
  99 {
 100     int i;
 101     bool x2apic_mode = false;
 102     MachineClass *mc = MACHINE_GET_CLASS(x86ms);
 103     const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
 104     AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
 105     AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = oem_id,
 106                         .oem_table_id = oem_table_id };
 107
 108     acpi_table_begin(&table, table_data);
 109     /* Local APIC Address */
 110     build_append_int_noprefix(table_data, APIC_DEFAULT_ADDRESS, 4);
 111     build_append_int_noprefix(table_data, 1 /* PCAT_COMPAT */, 4); /* Flags */
 112
 113     for (i = 0; i < apic_ids->len; i++) {
 114         adevc->madt_cpu(i, apic_ids, table_data, false);
 115         if (apic_ids->cpus[i].arch_id > 254) {
 116             x2apic_mode = true;
 117         }
 118     }
 119
 120     build_ioapic(table_data, ACPI_BUILD_IOAPIC_ID, IO_APIC_DEFAULT_ADDRESS, 0);
 121     if (x86ms->ioapic2) {
 122         build_ioapic(table_data, ACPI_BUILD_IOAPIC_ID + 1,
 123                      IO_APIC_SECONDARY_ADDRESS, IO_APIC_SECONDARY_IRQBASE);
 124     }
 125
 126     if (x86ms->apic_xrupt_override) {
 127         build_xrupt_override(table_data, 0, 2,
 128             0 /* Flags: Conforms to the specifications of the bus */);
 129     }
 130
 131     for (i = 1; i < 16; i++) {
 132         if (!(x86ms->pci_irq_mask & (1 << i))) {
 133             /* No need for a INT source override structure. */
 134             continue;
 135         }
 136         build_xrupt_override(table_data, i, i,
 137             0xd /* Flags: Active high, Level Triggered */);
 138     }
 139
 140     if (x2apic_mode) {
 141         /* Rev 4.0, 5.2.12.13 Local x2APIC NMI Structure*/
 142         build_append_int_noprefix(table_data, 0xA, 1); /* Type */
 143         build_append_int_noprefix(table_data, 12, 1);  /* Length */
 144         build_append_int_noprefix(table_data, 0, 2);   /* Flags */
 145         /* ACPI Processor UID */
 146         build_append_int_noprefix(table_data, 0xFFFFFFFF /* all processors */,
 147                                   4);
 148         /* Local x2APIC LINT# */
 149         build_append_int_noprefix(table_data, 1 /* ACPI_LINT1 */, 1);
 150         build_append_int_noprefix(table_data, 0, 3); /* Reserved */
 151     } else {
 152         /* Rev 1.0b, 5.2.8.3.3 Local APIC NMI */
 153         build_append_int_noprefix(table_data, 4, 1);  /* Type */
 154         build_append_int_noprefix(table_data, 6, 1);  /* Length */
 155         /* ACPI Processor ID */
 156         build_append_int_noprefix(table_data, 0xFF /* all processors */, 1);
 157         build_append_int_noprefix(table_data, 0, 2);  /* Flags */
 158         /* Local APIC INTI# */
 159         build_append_int_noprefix(table_data, 1 /* ACPI_LINT1 */, 1);
 160     }
 161
 162     acpi_table_end(linker, &table);
 163 }
 164