hw/ppc_oldworld.c

   1
   2 /*
   3  * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
   4  *
   5  * Copyright (c) 2004-2007 Fabrice Bellard
   6  * Copyright (c) 2007 Jocelyn Mayer
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a copy
   9  * of this software and associated documentation files (the "Software"), to deal
  10  * in the Software without restriction, including without limitation the rights
  11  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  12  * copies of the Software, and to permit persons to whom the Software is
  13  * furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice shall be included in
  16  * all copies or substantial portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  24  * THE SOFTWARE.
  25  */
  26 #include "hw.h"
  27 #include "ppc.h"
  28 #include "ppc_mac.h"
  29 #include "adb.h"
  30 #include "mac_dbdma.h"
  31 #include "nvram.h"
  32 #include "pc.h"
  33 #include "sysemu.h"
  34 #include "net.h"
  35 #include "isa.h"
  36 #include "pci.h"
  37 #include "usb-ohci.h"
  38 #include "boards.h"
  39 #include "fw_cfg.h"
  40 #include "escc.h"
  41 #include "ide.h"
  42 #include "loader.h"
  43 #include "elf.h"
  44 #include "kvm.h"
  45 #include "kvm_ppc.h"
  46 #include "blockdev.h"
  47 #include "exec-memory.h"
  48
  49 #define MAX_IDE_BUS 2
  50 #define CFG_ADDR 0xf0000510
  51
  52 static int fw_cfg_boot_set(void *opaque, const char *boot_device)
  53 {
  54     fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
  55     return 0;
  56 }
  57
  58
  59 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
  60 {
  61     return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
  62 }
  63
  64 static target_phys_addr_t round_page(target_phys_addr_t addr)
  65 {
  66     return (addr + TARGET_PAGE_SIZE - 1) & TARGET_PAGE_MASK;
  67 }
  68
  69 static void ppc_heathrow_init (ram_addr_t ram_size,
  70                                const char *boot_device,
  71                                const char *kernel_filename,
  72                                const char *kernel_cmdline,
  73                                const char *initrd_filename,
  74                                const char *cpu_model)
  75 {
  76     MemoryRegion *sysmem = get_system_memory();
  77     CPUState *env = NULL;
  78     char *filename;
  79     qemu_irq *pic, **heathrow_irqs;
  80     int linux_boot, i;
  81     MemoryRegion *ram = g_new(MemoryRegion, 1);
  82     MemoryRegion *bios = g_new(MemoryRegion, 1);
  83     uint32_t kernel_base, initrd_base, cmdline_base = 0;
  84     int32_t kernel_size, initrd_size;
  85     PCIBus *pci_bus;
  86     MacIONVRAMState *nvr;
  87     int bios_size;
  88     MemoryRegion *pic_mem, *dbdma_mem, *cuda_mem;
  89     MemoryRegion *escc_mem, *escc_bar = g_new(MemoryRegion, 1), *ide_mem[2];
  90     uint16_t ppc_boot_device;
  91     DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
  92     void *fw_cfg;
  93     void *dbdma;
  94
  95     linux_boot = (kernel_filename != NULL);
  96
  97     /* init CPUs */
  98     if (cpu_model == NULL)
  99         cpu_model = "G3";
 100     for (i = 0; i < smp_cpus; i++) {
 101         env = cpu_init(cpu_model);
 102         if (!env) {
 103             fprintf(stderr, "Unable to find PowerPC CPU definition\n");
 104             exit(1);
 105         }
 106         /* Set time-base frequency to 16.6 Mhz */
 107         cpu_ppc_tb_init(env,  16600000UL);
 108         qemu_register_reset((QEMUResetHandler*)&cpu_reset, env);
 109     }
 110
 111     /* allocate RAM */
 112     if (ram_size > (2047 << 20)) {
 113         fprintf(stderr,
 114                 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
 115                 ((unsigned int)ram_size / (1 << 20)));
 116         exit(1);
 117     }
 118
 119     memory_region_init_ram(ram, NULL, "ppc_heathrow.ram", ram_size);
 120     memory_region_add_subregion(sysmem, 0, ram);
 121
 122     /* allocate and load BIOS */
 123     memory_region_init_ram(bios, NULL, "ppc_heathrow.bios", BIOS_SIZE);
 124     if (bios_name == NULL)
 125         bios_name = PROM_FILENAME;
 126     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
 127     memory_region_set_readonly(bios, true);
 128     memory_region_add_subregion(sysmem, PROM_ADDR, bios);
 129
 130     /* Load OpenBIOS (ELF) */
 131     if (filename) {
 132         bios_size = load_elf(filename, 0, NULL, NULL, NULL, NULL,
 133                              1, ELF_MACHINE, 0);
 134         g_free(filename);
 135     } else {
 136         bios_size = -1;
 137     }
 138     if (bios_size < 0 || bios_size > BIOS_SIZE) {
 139         hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name);
 140         exit(1);
 141     }
 142
 143     if (linux_boot) {
 144         uint64_t lowaddr = 0;
 145         int bswap_needed;
 146
 147 #ifdef BSWAP_NEEDED
 148         bswap_needed = 1;
 149 #else
 150         bswap_needed = 0;
 151 #endif
 152         kernel_base = KERNEL_LOAD_ADDR;
 153         kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
 154                                NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0);
 155         if (kernel_size < 0)
 156             kernel_size = load_aout(kernel_filename, kernel_base,
 157                                     ram_size - kernel_base, bswap_needed,
 158                                     TARGET_PAGE_SIZE);
 159         if (kernel_size < 0)
 160             kernel_size = load_image_targphys(kernel_filename,
 161                                               kernel_base,
 162                                               ram_size - kernel_base);
 163         if (kernel_size < 0) {
 164             hw_error("qemu: could not load kernel '%s'\n",
 165                       kernel_filename);
 166             exit(1);
 167         }
 168         /* load initrd */
 169         if (initrd_filename) {
 170             initrd_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 171             initrd_size = load_image_targphys(initrd_filename, initrd_base,
 172                                               ram_size - initrd_base);
 173             if (initrd_size < 0) {
 174                 hw_error("qemu: could not load initial ram disk '%s'\n",
 175                          initrd_filename);
 176                 exit(1);
 177             }
 178             cmdline_base = round_page(initrd_base + initrd_size);
 179         } else {
 180             initrd_base = 0;
 181             initrd_size = 0;
 182             cmdline_base = round_page(kernel_base + kernel_size + KERNEL_GAP);
 183         }
 184         ppc_boot_device = 'm';
 185     } else {
 186         kernel_base = 0;
 187         kernel_size = 0;
 188         initrd_base = 0;
 189         initrd_size = 0;
 190         ppc_boot_device = '\0';
 191         for (i = 0; boot_device[i] != '\0'; i++) {
 192             /* TOFIX: for now, the second IDE channel is not properly
 193              *        used by OHW. The Mac floppy disk are not emulated.
 194              *        For now, OHW cannot boot from the network.
 195              */
 196 #if 0
 197             if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
 198                 ppc_boot_device = boot_device[i];
 199                 break;
 200             }
 201 #else
 202             if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
 203                 ppc_boot_device = boot_device[i];
 204                 break;
 205             }
 206 #endif
 207         }
 208         if (ppc_boot_device == '\0') {
 209             fprintf(stderr, "No valid boot device for G3 Beige machine\n");
 210             exit(1);
 211         }
 212     }
 213
 214     /* Register 2 MB of ISA IO space */
 215     isa_mmio_init(0xfe000000, 0x00200000);
 216
 217     /* XXX: we register only 1 output pin for heathrow PIC */
 218     heathrow_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
 219     heathrow_irqs[0] =
 220         g_malloc0(smp_cpus * sizeof(qemu_irq) * 1);
 221     /* Connect the heathrow PIC outputs to the 6xx bus */
 222     for (i = 0; i < smp_cpus; i++) {
 223         switch (PPC_INPUT(env)) {
 224         case PPC_FLAGS_INPUT_6xx:
 225             heathrow_irqs[i] = heathrow_irqs[0] + (i * 1);
 226             heathrow_irqs[i][0] =
 227                 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
 228             break;
 229         default:
 230             hw_error("Bus model not supported on OldWorld Mac machine\n");
 231         }
 232     }
 233
 234     /* init basic PC hardware */
 235     if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
 236         hw_error("Only 6xx bus is supported on heathrow machine\n");
 237     }
 238     pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
 239     pci_bus = pci_grackle_init(0xfec00000, pic,
 240                                get_system_memory(),
 241                                get_system_io());
 242     pci_vga_init(pci_bus);
 243
 244     escc_mem = escc_init(0, pic[0x0f], pic[0x10], serial_hds[0],
 245                                serial_hds[1], ESCC_CLOCK, 4);
 246     memory_region_init_alias(escc_bar, "escc-bar",
 247                              escc_mem, 0, memory_region_size(escc_mem));
 248
 249     for(i = 0; i < nb_nics; i++)
 250         pci_nic_init_nofail(&nd_table[i], "ne2k_pci", NULL);
 251
 252
 253     ide_drive_get(hd, MAX_IDE_BUS);
 254
 255     /* First IDE channel is a MAC IDE on the MacIO bus */
 256     dbdma = DBDMA_init(&dbdma_mem);
 257     ide_mem[0] = NULL;
 258     ide_mem[1] = pmac_ide_init(hd, pic[0x0D], dbdma, 0x16, pic[0x02]);
 259
 260     /* Second IDE channel is a CMD646 on the PCI bus */
 261     hd[0] = hd[MAX_IDE_DEVS];
 262     hd[1] = hd[MAX_IDE_DEVS + 1];
 263     hd[3] = hd[2] = NULL;
 264     pci_cmd646_ide_init(pci_bus, hd, 0);
 265
 266     /* cuda also initialize ADB */
 267     cuda_init(&cuda_mem, pic[0x12]);
 268
 269     adb_kbd_init(&adb_bus);
 270     adb_mouse_init(&adb_bus);
 271
 272     nvr = macio_nvram_init(0x2000, 4);
 273     pmac_format_nvram_partition(nvr, 0x2000);
 274
 275     macio_init(pci_bus, PCI_DEVICE_ID_APPLE_343S1201, 1, pic_mem,
 276                dbdma_mem, cuda_mem, nvr, 2, ide_mem, escc_bar);
 277
 278     if (usb_enabled) {
 279         usb_ohci_init_pci(pci_bus, -1);
 280     }
 281
 282     if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
 283         graphic_depth = 15;
 284
 285     /* No PCI init: the BIOS will do it */
 286
 287     fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
 288     fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
 289     fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
 290     fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
 291     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
 292     fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
 293     if (kernel_cmdline) {
 294         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
 295         pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
 296     } else {
 297         fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
 298     }
 299     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
 300     fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
 301     fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
 302
 303     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
 304     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
 305     fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
 306
 307     fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
 308     if (kvm_enabled()) {
 309 #ifdef CONFIG_KVM
 310         uint8_t *hypercall;
 311
 312         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, kvmppc_get_tbfreq());
 313         hypercall = g_malloc(16);
 314         kvmppc_get_hypercall(env, hypercall, 16);
 315         fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
 316         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
 317 #endif
 318     } else {
 319         fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, get_ticks_per_sec());
 320     }
 321
 322     qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
 323 }
 324
 325 static QEMUMachine heathrow_machine = {
 326     .name = "g3beige",
 327     .desc = "Heathrow based PowerMAC",
 328     .init = ppc_heathrow_init,
 329     .max_cpus = MAX_CPUS,
 330 #ifndef TARGET_PPC64
 331     .is_default = 1,
 332 #endif
 333 };
 334
 335 static void heathrow_machine_init(void)
 336 {
 337     qemu_register_machine(&heathrow_machine);
 338 }
 339
 340 machine_init(heathrow_machine_init);