virtio-9p: Add a virtio 9p device to qemu
[qemu.git] / hw / versatile_pci.c
blob199bc1936ec0dc0aa2e0e28c5b332c1b1916755b
1 /*
2 * ARM Versatile/PB PCI host controller
4 * Copyright (c) 2006-2009 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licenced under the LGPL.
8 */
10 #include "sysbus.h"
11 #include "pci.h"
12 #include "pci_host.h"
14 typedef struct {
15 SysBusDevice busdev;
16 qemu_irq irq[4];
17 int realview;
18 int mem_config;
19 } PCIVPBState;
21 static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr)
23 return addr & 0xffffff;
26 static void pci_vpb_config_writeb (void *opaque, target_phys_addr_t addr,
27 uint32_t val)
29 pci_data_write(opaque, vpb_pci_config_addr (addr), val, 1);
32 static void pci_vpb_config_writew (void *opaque, target_phys_addr_t addr,
33 uint32_t val)
35 #ifdef TARGET_WORDS_BIGENDIAN
36 val = bswap16(val);
37 #endif
38 pci_data_write(opaque, vpb_pci_config_addr (addr), val, 2);
41 static void pci_vpb_config_writel (void *opaque, target_phys_addr_t addr,
42 uint32_t val)
44 #ifdef TARGET_WORDS_BIGENDIAN
45 val = bswap32(val);
46 #endif
47 pci_data_write(opaque, vpb_pci_config_addr (addr), val, 4);
50 static uint32_t pci_vpb_config_readb (void *opaque, target_phys_addr_t addr)
52 uint32_t val;
53 val = pci_data_read(opaque, vpb_pci_config_addr (addr), 1);
54 return val;
57 static uint32_t pci_vpb_config_readw (void *opaque, target_phys_addr_t addr)
59 uint32_t val;
60 val = pci_data_read(opaque, vpb_pci_config_addr (addr), 2);
61 #ifdef TARGET_WORDS_BIGENDIAN
62 val = bswap16(val);
63 #endif
64 return val;
67 static uint32_t pci_vpb_config_readl (void *opaque, target_phys_addr_t addr)
69 uint32_t val;
70 val = pci_data_read(opaque, vpb_pci_config_addr (addr), 4);
71 #ifdef TARGET_WORDS_BIGENDIAN
72 val = bswap32(val);
73 #endif
74 return val;
77 static CPUWriteMemoryFunc * const pci_vpb_config_write[] = {
78 &pci_vpb_config_writeb,
79 &pci_vpb_config_writew,
80 &pci_vpb_config_writel,
83 static CPUReadMemoryFunc * const pci_vpb_config_read[] = {
84 &pci_vpb_config_readb,
85 &pci_vpb_config_readw,
86 &pci_vpb_config_readl,
89 static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
91 return irq_num;
94 static void pci_vpb_set_irq(void *opaque, int irq_num, int level)
96 qemu_irq *pic = opaque;
98 qemu_set_irq(pic[irq_num], level);
101 static void pci_vpb_map(SysBusDevice *dev, target_phys_addr_t base)
103 PCIVPBState *s = (PCIVPBState *)dev;
104 /* Selfconfig area. */
105 cpu_register_physical_memory(base + 0x01000000, 0x1000000, s->mem_config);
106 /* Normal config area. */
107 cpu_register_physical_memory(base + 0x02000000, 0x1000000, s->mem_config);
109 if (s->realview) {
110 /* IO memory area. */
111 #ifdef TARGET_WORDS_BIGENDIAN
112 isa_mmio_init(base + 0x03000000, 0x00100000, 1);
113 #else
114 isa_mmio_init(base + 0x03000000, 0x00100000, 0);
115 #endif
119 static int pci_vpb_init(SysBusDevice *dev)
121 PCIVPBState *s = FROM_SYSBUS(PCIVPBState, dev);
122 PCIBus *bus;
123 int i;
125 for (i = 0; i < 4; i++) {
126 sysbus_init_irq(dev, &s->irq[i]);
128 bus = pci_register_bus(&dev->qdev, "pci",
129 pci_vpb_set_irq, pci_vpb_map_irq, s->irq,
130 11 << 3, 4);
132 /* ??? Register memory space. */
134 s->mem_config = cpu_register_io_memory(pci_vpb_config_read,
135 pci_vpb_config_write, bus);
136 sysbus_init_mmio_cb(dev, 0x04000000, pci_vpb_map);
138 pci_create_simple(bus, -1, "versatile_pci_host");
139 return 0;
142 static int pci_realview_init(SysBusDevice *dev)
144 PCIVPBState *s = FROM_SYSBUS(PCIVPBState, dev);
145 s->realview = 1;
146 return pci_vpb_init(dev);
149 static int versatile_pci_host_init(PCIDevice *d)
151 pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_XILINX);
152 /* Both boards have the same device ID. Oh well. */
153 pci_config_set_device_id(d->config, PCI_DEVICE_ID_XILINX_XC2VP30);
154 pci_set_word(d->config + PCI_STATUS,
155 PCI_STATUS_66MHZ | PCI_STATUS_DEVSEL_MEDIUM);
156 pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_CO);
157 pci_set_byte(d->config + PCI_LATENCY_TIMER, 0x10);
158 return 0;
161 static PCIDeviceInfo versatile_pci_host_info = {
162 .qdev.name = "versatile_pci_host",
163 .qdev.size = sizeof(PCIDevice),
164 .init = versatile_pci_host_init,
167 static void versatile_pci_register_devices(void)
169 sysbus_register_dev("versatile_pci", sizeof(PCIVPBState), pci_vpb_init);
170 sysbus_register_dev("realview_pci", sizeof(PCIVPBState),
171 pci_realview_init);
172 pci_qdev_register(&versatile_pci_host_info);
175 device_init(versatile_pci_register_devices)