hw/vga_int.h

   1 /*
   2  * QEMU internal VGA defines.
   3  *
   4  * Copyright (c) 2003-2004 Fabrice Bellard
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #include <hw/hw.h>
  26
  27 #define MSR_COLOR_EMULATION 0x01
  28 #define MSR_PAGE_SELECT     0x20
  29
  30 #define ST01_V_RETRACE      0x08
  31 #define ST01_DISP_ENABLE    0x01
  32
  33 /* bochs VBE support */
  34 #define CONFIG_BOCHS_VBE
  35
  36 #define VBE_DISPI_MAX_XRES              1600
  37 #define VBE_DISPI_MAX_YRES              1200
  38 #define VBE_DISPI_MAX_BPP               32
  39
  40 #define VBE_DISPI_INDEX_ID              0x0
  41 #define VBE_DISPI_INDEX_XRES            0x1
  42 #define VBE_DISPI_INDEX_YRES            0x2
  43 #define VBE_DISPI_INDEX_BPP             0x3
  44 #define VBE_DISPI_INDEX_ENABLE          0x4
  45 #define VBE_DISPI_INDEX_BANK            0x5
  46 #define VBE_DISPI_INDEX_VIRT_WIDTH      0x6
  47 #define VBE_DISPI_INDEX_VIRT_HEIGHT     0x7
  48 #define VBE_DISPI_INDEX_X_OFFSET        0x8
  49 #define VBE_DISPI_INDEX_Y_OFFSET        0x9
  50 #define VBE_DISPI_INDEX_NB              0xa
  51
  52 #define VBE_DISPI_ID0                   0xB0C0
  53 #define VBE_DISPI_ID1                   0xB0C1
  54 #define VBE_DISPI_ID2                   0xB0C2
  55 #define VBE_DISPI_ID3                   0xB0C3
  56 #define VBE_DISPI_ID4                   0xB0C4
  57
  58 #define VBE_DISPI_DISABLED              0x00
  59 #define VBE_DISPI_ENABLED               0x01
  60 #define VBE_DISPI_GETCAPS               0x02
  61 #define VBE_DISPI_8BIT_DAC              0x20
  62 #define VBE_DISPI_LFB_ENABLED           0x40
  63 #define VBE_DISPI_NOCLEARMEM            0x80
  64
  65 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS  0xE0000000
  66
  67 #ifdef CONFIG_BOCHS_VBE
  68
  69 #define VGA_STATE_COMMON_BOCHS_VBE              \
  70     uint16_t vbe_index;                         \
  71     uint16_t vbe_regs[VBE_DISPI_INDEX_NB];      \
  72     uint32_t vbe_start_addr;                    \
  73     uint32_t vbe_line_offset;                   \
  74     uint32_t vbe_bank_mask;
  75
  76 #else
  77
  78 #define VGA_STATE_COMMON_BOCHS_VBE
  79
  80 #endif /* !CONFIG_BOCHS_VBE */
  81
  82 #define CH_ATTR_SIZE (160 * 100)
  83 #define VGA_MAX_HEIGHT 2048
  84
  85 struct vga_precise_retrace {
  86     int64_t ticks_per_char;
  87     int64_t total_chars;
  88     int htotal;
  89     int hstart;
  90     int hend;
  91     int vstart;
  92     int vend;
  93     int freq;
  94 };
  95
  96 union vga_retrace {
  97     struct vga_precise_retrace precise;
  98 };
  99
 100 struct VGACommonState;
 101 typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
 102 typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
 103
 104 typedef struct VGACommonState {
 105     uint8_t *vram_ptr;
 106     ram_addr_t vram_offset;
 107     unsigned int vram_size;
 108     uint32_t lfb_addr;
 109     uint32_t lfb_end;
 110     uint32_t map_addr;
 111     uint32_t map_end;
 112     uint32_t lfb_vram_mapped; /* whether 0xa0000 is mapped as ram */
 113     uint32_t bios_offset;
 114     uint32_t bios_size;
 115     uint32_t latch;
 116     uint8_t sr_index;
 117     uint8_t sr[256];
 118     uint8_t gr_index;
 119     uint8_t gr[256];
 120     uint8_t ar_index;
 121     uint8_t ar[21];
 122     int ar_flip_flop;
 123     uint8_t cr_index;
 124     uint8_t cr[256]; /* CRT registers */
 125     uint8_t msr; /* Misc Output Register */
 126     uint8_t fcr; /* Feature Control Register */
 127     uint8_t st00; /* status 0 */
 128     uint8_t st01; /* status 1 */
 129     uint8_t dac_state;
 130     uint8_t dac_sub_index;
 131     uint8_t dac_read_index;
 132     uint8_t dac_write_index;
 133     uint8_t dac_cache[3]; /* used when writing */
 134     int dac_8bit;
 135     uint8_t palette[768];
 136     int32_t bank_offset;
 137     int vga_io_memory;
 138     int (*get_bpp)(struct VGACommonState *s);
 139     void (*get_offsets)(struct VGACommonState *s,
 140                         uint32_t *pline_offset,
 141                         uint32_t *pstart_addr,
 142                         uint32_t *pline_compare);
 143     void (*get_resolution)(struct VGACommonState *s,
 144                         int *pwidth,
 145                         int *pheight);
 146     VGA_STATE_COMMON_BOCHS_VBE
 147     /* display refresh support */
 148     DisplayState *ds;
 149     uint32_t font_offsets[2];
 150     int graphic_mode;
 151     uint8_t shift_control;
 152     uint8_t double_scan;
 153     uint32_t line_offset;
 154     uint32_t line_compare;
 155     uint32_t start_addr;
 156     uint32_t plane_updated;
 157     uint32_t last_line_offset;
 158     uint8_t last_cw, last_ch;
 159     uint32_t last_width, last_height; /* in chars or pixels */
 160     uint32_t last_scr_width, last_scr_height; /* in pixels */
 161     uint32_t last_depth; /* in bits */
 162     uint8_t full_update;
 163     uint8_t cursor_start, cursor_end;
 164     uint32_t cursor_offset;
 165     unsigned int (*rgb_to_pixel)(unsigned int r,
 166                                  unsigned int g, unsigned b);
 167     vga_hw_update_ptr update;
 168     vga_hw_invalidate_ptr invalidate;
 169     vga_hw_screen_dump_ptr screen_dump;
 170     vga_hw_text_update_ptr text_update;
 171     /* hardware mouse cursor support */
 172     uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
 173     void (*cursor_invalidate)(struct VGACommonState *s);
 174     void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
 175     /* tell for each page if it has been updated since the last time */
 176     uint32_t last_palette[256];
 177     uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
 178     /* retrace */
 179     vga_retrace_fn retrace;
 180     vga_update_retrace_info_fn update_retrace_info;
 181     union vga_retrace retrace_info;
 182     uint8_t is_vbe_vmstate;
 183 } VGACommonState;
 184
 185 static inline int c6_to_8(int v)
 186 {
 187     int b;
 188     v &= 0x3f;
 189     b = v & 1;
 190     return (v << 2) | (b << 1) | b;
 191 }
 192
 193 void vga_common_init(VGACommonState *s, int vga_ram_size);
 194 void vga_init(VGACommonState *s);
 195 void vga_common_reset(VGACommonState *s);
 196
 197 void vga_dirty_log_start(VGACommonState *s);
 198
 199 extern const VMStateDescription vmstate_vga_common;
 200 uint32_t vga_ioport_read(void *opaque, uint32_t addr);
 201 void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
 202 uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
 203 void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
 204 void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
 205 int ppm_save(const char *filename, struct DisplaySurface *ds);
 206
 207 void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
 208                             int poffset, int w,
 209                             unsigned int color0, unsigned int color1,
 210                             unsigned int color_xor);
 211 void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
 212                              int poffset, int w,
 213                              unsigned int color0, unsigned int color1,
 214                              unsigned int color_xor);
 215 void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
 216                              int poffset, int w,
 217                              unsigned int color0, unsigned int color1,
 218                              unsigned int color_xor);
 219
 220 int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
 221
 222 extern const uint8_t sr_mask[8];
 223 extern const uint8_t gr_mask[16];
 224
 225 #define VGA_RAM_SIZE (8192 * 1024)
 226
 227 extern CPUReadMemoryFunc * const vga_mem_read[3];
 228 extern CPUWriteMemoryFunc * const vga_mem_write[3];