hw/ppce500_mpc8544ds.c

   1 /*
   2  * Qemu PowerPC MPC8544DS board emualtion
   3  *
   4  * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
   5  *
   6  * Author: Yu Liu,     <yu.liu@freescale.com>
   7  *
   8  * This file is derived from hw/ppc440_bamboo.c,
   9  * the copyright for that material belongs to the original owners.
  10  *
  11  * This is free software; you can redistribute it and/or modify
  12  * it under the terms of  the GNU General  Public License as published by
  13  * the Free Software Foundation;  either version 2 of the  License, or
  14  * (at your option) any later version.
  15  */
  16
  17 #include <dirent.h>
  18
  19 #include "config.h"
  20 #include "qemu-common.h"
  21 #include "net.h"
  22 #include "hw.h"
  23 #include "pc.h"
  24 #include "pci.h"
  25 #include "boards.h"
  26 #include "sysemu.h"
  27 #include "kvm.h"
  28 #include "kvm_ppc.h"
  29 #include "device_tree.h"
  30 #include "openpic.h"
  31 #include "ppce500.h"
  32 #include "loader.h"
  33 #include "elf.h"
  34
  35 #define BINARY_DEVICE_TREE_FILE    "mpc8544ds.dtb"
  36 #define UIMAGE_LOAD_BASE           0
  37 #define DTB_LOAD_BASE              0x600000
  38 #define INITRD_LOAD_BASE           0x2000000
  39
  40 #define RAM_SIZES_ALIGN            (64UL << 20)
  41
  42 #define MPC8544_CCSRBAR_BASE       0xE0000000
  43 #define MPC8544_MPIC_REGS_BASE     (MPC8544_CCSRBAR_BASE + 0x40000)
  44 #define MPC8544_SERIAL0_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4500)
  45 #define MPC8544_SERIAL1_REGS_BASE  (MPC8544_CCSRBAR_BASE + 0x4600)
  46 #define MPC8544_PCI_REGS_BASE      (MPC8544_CCSRBAR_BASE + 0x8000)
  47 #define MPC8544_PCI_REGS_SIZE      0x1000
  48 #define MPC8544_PCI_IO             0xE1000000
  49 #define MPC8544_PCI_IOLEN          0x10000
  50
  51 #ifdef CONFIG_FDT
  52 static int mpc8544_copy_soc_cell(void *fdt, const char *node, const char *prop)
  53 {
  54     uint32_t cell;
  55     int ret;
  56
  57     ret = kvmppc_read_host_property(node, prop, &cell, sizeof(cell));
  58     if (ret < 0) {
  59         fprintf(stderr, "couldn't read host %s/%s\n", node, prop);
  60         goto out;
  61     }
  62
  63     ret = qemu_devtree_setprop_cell(fdt, "/cpus/PowerPC,8544@0",
  64                                 prop, cell);
  65     if (ret < 0) {
  66         fprintf(stderr, "couldn't set guest /cpus/PowerPC,8544@0/%s\n", prop);
  67         goto out;
  68     }
  69
  70 out:
  71     return ret;
  72 }
  73 #endif
  74
  75 static void *mpc8544_load_device_tree(target_phys_addr_t addr,
  76                                      uint32_t ramsize,
  77                                      target_phys_addr_t initrd_base,
  78                                      target_phys_addr_t initrd_size,
  79                                      const char *kernel_cmdline)
  80 {
  81     void *fdt = NULL;
  82 #ifdef CONFIG_FDT
  83     uint32_t mem_reg_property[] = {0, ramsize};
  84     char *filename;
  85     int fdt_size;
  86     int ret;
  87
  88     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
  89     if (!filename) {
  90         goto out;
  91     }
  92     fdt = load_device_tree(filename, &fdt_size);
  93     qemu_free(filename);
  94     if (fdt == NULL) {
  95         goto out;
  96     }
  97
  98     /* Manipulate device tree in memory. */
  99     ret = qemu_devtree_setprop(fdt, "/memory", "reg", mem_reg_property,
 100                                sizeof(mem_reg_property));
 101     if (ret < 0)
 102         fprintf(stderr, "couldn't set /memory/reg\n");
 103
 104     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-start",
 105                                     initrd_base);
 106     if (ret < 0)
 107         fprintf(stderr, "couldn't set /chosen/linux,initrd-start\n");
 108
 109     ret = qemu_devtree_setprop_cell(fdt, "/chosen", "linux,initrd-end",
 110                                     (initrd_base + initrd_size));
 111     if (ret < 0)
 112         fprintf(stderr, "couldn't set /chosen/linux,initrd-end\n");
 113
 114     ret = qemu_devtree_setprop_string(fdt, "/chosen", "bootargs",
 115                                       kernel_cmdline);
 116     if (ret < 0)
 117         fprintf(stderr, "couldn't set /chosen/bootargs\n");
 118
 119     if (kvm_enabled()) {
 120         struct dirent *dirp;
 121         DIR *dp;
 122         char buf[128];
 123
 124         if ((dp = opendir("/proc/device-tree/cpus/")) == NULL) {
 125             printf("Can't open directory /proc/device-tree/cpus/\n");
 126             goto out;
 127         }
 128
 129         buf[0] = '\0';
 130         while ((dirp = readdir(dp)) != NULL) {
 131             if (strncmp(dirp->d_name, "PowerPC", 7) == 0) {
 132                 snprintf(buf, 128, "/cpus/%s", dirp->d_name);
 133                 break;
 134             }
 135         }
 136         closedir(dp);
 137         if (buf[0] == '\0') {
 138             printf("Unknow host!\n");
 139             goto out;
 140         }
 141
 142         mpc8544_copy_soc_cell(fdt, buf, "clock-frequency");
 143         mpc8544_copy_soc_cell(fdt, buf, "timebase-frequency");
 144     }
 145
 146     cpu_physical_memory_write (addr, (void *)fdt, fdt_size);
 147
 148 out:
 149 #endif
 150
 151     return fdt;
 152 }
 153
 154 static void mpc8544ds_init(ram_addr_t ram_size,
 155                          const char *boot_device,
 156                          const char *kernel_filename,
 157                          const char *kernel_cmdline,
 158                          const char *initrd_filename,
 159                          const char *cpu_model)
 160 {
 161     PCIBus *pci_bus;
 162     CPUState *env;
 163     uint64_t elf_entry;
 164     uint64_t elf_lowaddr;
 165     target_phys_addr_t entry=0;
 166     target_phys_addr_t loadaddr=UIMAGE_LOAD_BASE;
 167     target_long kernel_size=0;
 168     target_ulong dt_base=DTB_LOAD_BASE;
 169     target_ulong initrd_base=INITRD_LOAD_BASE;
 170     target_long initrd_size=0;
 171     void *fdt;
 172     int i=0;
 173     unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
 174     qemu_irq *irqs, *mpic, *pci_irqs;
 175     SerialState * serial[2];
 176
 177     /* Setup CPU */
 178     env = cpu_ppc_init("e500v2_v30");
 179     if (!env) {
 180         fprintf(stderr, "Unable to initialize CPU!\n");
 181         exit(1);
 182     }
 183
 184     /* Fixup Memory size on a alignment boundary */
 185     ram_size &= ~(RAM_SIZES_ALIGN - 1);
 186
 187     /* Register Memory */
 188     cpu_register_physical_memory(0, ram_size, qemu_ram_alloc(ram_size));
 189
 190     /* MPIC */
 191     irqs = qemu_mallocz(sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
 192     irqs[OPENPIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_INT];
 193     irqs[OPENPIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPCE500_INPUT_CINT];
 194     mpic = mpic_init(MPC8544_MPIC_REGS_BASE, 1, &irqs, NULL);
 195
 196     /* Serial */
 197     if (serial_hds[0])
 198         serial[0] = serial_mm_init(MPC8544_SERIAL0_REGS_BASE,
 199                                0, mpic[12+26], 399193,
 200                         serial_hds[0], 1);
 201
 202     if (serial_hds[1])
 203         serial[0] = serial_mm_init(MPC8544_SERIAL1_REGS_BASE,
 204                         0, mpic[12+26], 399193,
 205                         serial_hds[0], 1);
 206
 207     /* PCI */
 208     pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
 209     pci_irqs[0] = mpic[pci_irq_nrs[0]];
 210     pci_irqs[1] = mpic[pci_irq_nrs[1]];
 211     pci_irqs[2] = mpic[pci_irq_nrs[2]];
 212     pci_irqs[3] = mpic[pci_irq_nrs[3]];
 213     pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
 214     if (!pci_bus)
 215         printf("couldn't create PCI controller!\n");
 216
 217     isa_mmio_init(MPC8544_PCI_IO, MPC8544_PCI_IOLEN);
 218
 219     if (pci_bus) {
 220         /* Register network interfaces. */
 221         for (i = 0; i < nb_nics; i++) {
 222             pci_nic_init_nofail(&nd_table[i], "virtio", NULL);
 223         }
 224     }
 225
 226     /* Load kernel. */
 227     if (kernel_filename) {
 228         kernel_size = load_uimage(kernel_filename, &entry, &loadaddr, NULL);
 229         if (kernel_size < 0) {
 230             kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_lowaddr,
 231                                    NULL, 1, ELF_MACHINE, 0);
 232             entry = elf_entry;
 233             loadaddr = elf_lowaddr;
 234         }
 235         /* XXX try again as binary */
 236         if (kernel_size < 0) {
 237             fprintf(stderr, "qemu: could not load kernel '%s'\n",
 238                     kernel_filename);
 239             exit(1);
 240         }
 241     }
 242
 243     /* Load initrd. */
 244     if (initrd_filename) {
 245         initrd_size = load_image_targphys(initrd_filename, initrd_base,
 246                                           ram_size - initrd_base);
 247
 248         if (initrd_size < 0) {
 249             fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
 250                     initrd_filename);
 251             exit(1);
 252         }
 253     }
 254
 255     /* If we're loading a kernel directly, we must load the device tree too. */
 256     if (kernel_filename) {
 257         fdt = mpc8544_load_device_tree(dt_base, ram_size,
 258                                       initrd_base, initrd_size, kernel_cmdline);
 259         if (fdt == NULL) {
 260             fprintf(stderr, "couldn't load device tree\n");
 261             exit(1);
 262         }
 263
 264         /* Set initial guest state. */
 265         env->gpr[1] = (16<<20) - 8;
 266         env->gpr[3] = dt_base;
 267         env->nip = entry;
 268         /* XXX we currently depend on KVM to create some initial TLB entries. */
 269     }
 270
 271     if (kvm_enabled())
 272         kvmppc_init();
 273
 274     return;
 275 }
 276
 277 static QEMUMachine mpc8544ds_machine = {
 278     .name = "mpc8544ds",
 279     .desc = "mpc8544ds",
 280     .init = mpc8544ds_init,
 281 };
 282
 283 static void mpc8544ds_machine_init(void)
 284 {
 285     qemu_register_machine(&mpc8544ds_machine);
 286 }
 287
 288 machine_init(mpc8544ds_machine_init);