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bitmap: add atomic set functions
[qemu.git] / memory.c
blob418cac7ce112d5e6768d20713afc0ce518483b4b
1 /*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
14 */
15
16 #include "exec/memory.h"
17 #include "exec/address-spaces.h"
18 #include "exec/ioport.h"
19 #include "qapi/visitor.h"
20 #include "qemu/bitops.h"
21 #include "qom/object.h"
22 #include "trace.h"
23 #include <assert.h>
24
25 #include "exec/memory-internal.h"
26 #include "exec/ram_addr.h"
27 #include "sysemu/sysemu.h"
28
29 //#define DEBUG_UNASSIGNED
30
31 static unsigned memory_region_transaction_depth;
32 static bool memory_region_update_pending;
33 static bool ioeventfd_update_pending;
34 static bool global_dirty_log = false;
35
36 static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
37 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
38
39 static QTAILQ_HEAD(, AddressSpace) address_spaces
40 = QTAILQ_HEAD_INITIALIZER(address_spaces);
41
42 typedef struct AddrRange AddrRange;
43
44 /*
45 * Note that signed integers are needed for negative offsetting in aliases
46 * (large MemoryRegion::alias_offset).
47 */
48 struct AddrRange {
49 Int128 start;
50 Int128 size;
51 };
52
53 static AddrRange addrrange_make(Int128 start, Int128 size)
54 {
55 return (AddrRange) { start, size };
56 }
57
58 static bool addrrange_equal(AddrRange r1, AddrRange r2)
59 {
60 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
61 }
62
63 static Int128 addrrange_end(AddrRange r)
64 {
65 return int128_add(r.start, r.size);
66 }
67
68 static AddrRange addrrange_shift(AddrRange range, Int128 delta)
69 {
70 int128_addto(&range.start, delta);
71 return range;
72 }
73
74 static bool addrrange_contains(AddrRange range, Int128 addr)
75 {
76 return int128_ge(addr, range.start)
77 && int128_lt(addr, addrrange_end(range));
78 }
79
80 static bool addrrange_intersects(AddrRange r1, AddrRange r2)
81 {
82 return addrrange_contains(r1, r2.start)
83 || addrrange_contains(r2, r1.start);
84 }
85
86 static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
87 {
88 Int128 start = int128_max(r1.start, r2.start);
89 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
90 return addrrange_make(start, int128_sub(end, start));
91 }
92
93 enum ListenerDirection { Forward, Reverse };
94
95 static bool memory_listener_match(MemoryListener *listener,
96 MemoryRegionSection *section)
97 {
98 return !listener->address_space_filter
99 || listener->address_space_filter == section->address_space;
100 }
101
102 #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
103 do { \
104 MemoryListener *_listener; \
105 \
106 switch (_direction) { \
107 case Forward: \
108 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
109 if (_listener->_callback) { \
110 _listener->_callback(_listener, ##_args); \
111 } \
112 } \
113 break; \
114 case Reverse: \
115 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
116 memory_listeners, link) { \
117 if (_listener->_callback) { \
118 _listener->_callback(_listener, ##_args); \
119 } \
120 } \
121 break; \
122 default: \
123 abort(); \
124 } \
125 } while (0)
126
127 #define MEMORY_LISTENER_CALL(_callback, _direction, _section, _args...) \
128 do { \
129 MemoryListener *_listener; \
130 \
131 switch (_direction) { \
132 case Forward: \
133 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
134 if (_listener->_callback \
135 && memory_listener_match(_listener, _section)) { \
136 _listener->_callback(_listener, _section, ##_args); \
137 } \
138 } \
139 break; \
140 case Reverse: \
141 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
142 memory_listeners, link) { \
143 if (_listener->_callback \
144 && memory_listener_match(_listener, _section)) { \
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
154 /* No need to ref/unref .mr, the FlatRange keeps it alive. */
155 #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
156 MEMORY_LISTENER_CALL(callback, dir, (&(MemoryRegionSection) { \
157 .mr = (fr)->mr, \
158 .address_space = (as), \
159 .offset_within_region = (fr)->offset_in_region, \
160 .size = (fr)->addr.size, \
161 .offset_within_address_space = int128_get64((fr)->addr.start), \
162 .readonly = (fr)->readonly, \
163 }), ##_args)
164
165 struct CoalescedMemoryRange {
166 AddrRange addr;
167 QTAILQ_ENTRY(CoalescedMemoryRange) link;
168 };
169
170 struct MemoryRegionIoeventfd {
171 AddrRange addr;
172 bool match_data;
173 uint64_t data;
174 EventNotifier *e;
175 };
176
177 static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
178 MemoryRegionIoeventfd b)
179 {
180 if (int128_lt(a.addr.start, b.addr.start)) {
181 return true;
182 } else if (int128_gt(a.addr.start, b.addr.start)) {
183 return false;
184 } else if (int128_lt(a.addr.size, b.addr.size)) {
185 return true;
186 } else if (int128_gt(a.addr.size, b.addr.size)) {
187 return false;
188 } else if (a.match_data < b.match_data) {
189 return true;
190 } else if (a.match_data > b.match_data) {
191 return false;
192 } else if (a.match_data) {
193 if (a.data < b.data) {
194 return true;
195 } else if (a.data > b.data) {
196 return false;
197 }
198 }
199 if (a.e < b.e) {
200 return true;
201 } else if (a.e > b.e) {
202 return false;
203 }
204 return false;
205 }
206
207 static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
208 MemoryRegionIoeventfd b)
209 {
210 return !memory_region_ioeventfd_before(a, b)
211 && !memory_region_ioeventfd_before(b, a);
212 }
213
214 typedef struct FlatRange FlatRange;
215 typedef struct FlatView FlatView;
216
217 /* Range of memory in the global map. Addresses are absolute. */
218 struct FlatRange {
219 MemoryRegion *mr;
220 hwaddr offset_in_region;
221 AddrRange addr;
222 uint8_t dirty_log_mask;
223 bool romd_mode;
224 bool readonly;
225 };
226
227 /* Flattened global view of current active memory hierarchy. Kept in sorted
228 * order.
229 */
230 struct FlatView {
231 struct rcu_head rcu;
232 unsigned ref;
233 FlatRange *ranges;
234 unsigned nr;
235 unsigned nr_allocated;
236 };
237
238 typedef struct AddressSpaceOps AddressSpaceOps;
239
240 #define FOR_EACH_FLAT_RANGE(var, view) \
241 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
242
243 static bool flatrange_equal(FlatRange *a, FlatRange *b)
244 {
245 return a->mr == b->mr
246 && addrrange_equal(a->addr, b->addr)
247 && a->offset_in_region == b->offset_in_region
248 && a->romd_mode == b->romd_mode
249 && a->readonly == b->readonly;
250 }
251
252 static void flatview_init(FlatView *view)
253 {
254 view->ref = 1;
255 view->ranges = NULL;
256 view->nr = 0;
257 view->nr_allocated = 0;
258 }
259
260 /* Insert a range into a given position. Caller is responsible for maintaining
261 * sorting order.
262 */
263 static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
264 {
265 if (view->nr == view->nr_allocated) {
266 view->nr_allocated = MAX(2 * view->nr, 10);
267 view->ranges = g_realloc(view->ranges,
268 view->nr_allocated * sizeof(*view->ranges));
269 }
270 memmove(view->ranges + pos + 1, view->ranges + pos,
271 (view->nr - pos) * sizeof(FlatRange));
272 view->ranges[pos] = *range;
273 memory_region_ref(range->mr);
274 ++view->nr;
275 }
276
277 static void flatview_destroy(FlatView *view)
278 {
279 int i;
280
281 for (i = 0; i < view->nr; i++) {
282 memory_region_unref(view->ranges[i].mr);
283 }
284 g_free(view->ranges);
285 g_free(view);
286 }
287
288 static void flatview_ref(FlatView *view)
289 {
290 atomic_inc(&view->ref);
291 }
292
293 static void flatview_unref(FlatView *view)
294 {
295 if (atomic_fetch_dec(&view->ref) == 1) {
296 flatview_destroy(view);
297 }
298 }
299
300 static bool can_merge(FlatRange *r1, FlatRange *r2)
301 {
302 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
303 && r1->mr == r2->mr
304 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
305 r1->addr.size),
306 int128_make64(r2->offset_in_region))
307 && r1->dirty_log_mask == r2->dirty_log_mask
308 && r1->romd_mode == r2->romd_mode
309 && r1->readonly == r2->readonly;
310 }
311
312 /* Attempt to simplify a view by merging adjacent ranges */
313 static void flatview_simplify(FlatView *view)
314 {
315 unsigned i, j;
316
317 i = 0;
318 while (i < view->nr) {
319 j = i + 1;
320 while (j < view->nr
321 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
322 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
323 ++j;
324 }
325 ++i;
326 memmove(&view->ranges[i], &view->ranges[j],
327 (view->nr - j) * sizeof(view->ranges[j]));
328 view->nr -= j - i;
329 }
330 }
331
332 static bool memory_region_big_endian(MemoryRegion *mr)
333 {
334 #ifdef TARGET_WORDS_BIGENDIAN
335 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
336 #else
337 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
338 #endif
339 }
340
341 static bool memory_region_wrong_endianness(MemoryRegion *mr)
342 {
343 #ifdef TARGET_WORDS_BIGENDIAN
344 return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
345 #else
346 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
347 #endif
348 }
349
350 static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
351 {
352 if (memory_region_wrong_endianness(mr)) {
353 switch (size) {
354 case 1:
355 break;
356 case 2:
357 *data = bswap16(*data);
358 break;
359 case 4:
360 *data = bswap32(*data);
361 break;
362 case 8:
363 *data = bswap64(*data);
364 break;
365 default:
366 abort();
367 }
368 }
369 }
370
371 static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
372 hwaddr addr,
373 uint64_t *value,
374 unsigned size,
375 unsigned shift,
376 uint64_t mask,
377 MemTxAttrs attrs)
378 {
379 uint64_t tmp;
380
381 tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
382 trace_memory_region_ops_read(mr, addr, tmp, size);
383 *value |= (tmp & mask) << shift;
384 return MEMTX_OK;
385 }
386
387 static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
388 hwaddr addr,
389 uint64_t *value,
390 unsigned size,
391 unsigned shift,
392 uint64_t mask,
393 MemTxAttrs attrs)
394 {
395 uint64_t tmp;
396
397 if (mr->flush_coalesced_mmio) {
398 qemu_flush_coalesced_mmio_buffer();
399 }
400 tmp = mr->ops->read(mr->opaque, addr, size);
401 trace_memory_region_ops_read(mr, addr, tmp, size);
402 *value |= (tmp & mask) << shift;
403 return MEMTX_OK;
404 }
405
406 static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
407 hwaddr addr,
408 uint64_t *value,
409 unsigned size,
410 unsigned shift,
411 uint64_t mask,
412 MemTxAttrs attrs)
413 {
414 uint64_t tmp = 0;
415 MemTxResult r;
416
417 if (mr->flush_coalesced_mmio) {
418 qemu_flush_coalesced_mmio_buffer();
419 }
420 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
421 trace_memory_region_ops_read(mr, addr, tmp, size);
422 *value |= (tmp & mask) << shift;
423 return r;
424 }
425
426 static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
427 hwaddr addr,
428 uint64_t *value,
429 unsigned size,
430 unsigned shift,
431 uint64_t mask,
432 MemTxAttrs attrs)
433 {
434 uint64_t tmp;
435
436 tmp = (*value >> shift) & mask;
437 trace_memory_region_ops_write(mr, addr, tmp, size);
438 mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
439 return MEMTX_OK;
440 }
441
442 static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
443 hwaddr addr,
444 uint64_t *value,
445 unsigned size,
446 unsigned shift,
447 uint64_t mask,
448 MemTxAttrs attrs)
449 {
450 uint64_t tmp;
451
452 if (mr->flush_coalesced_mmio) {
453 qemu_flush_coalesced_mmio_buffer();
454 }
455 tmp = (*value >> shift) & mask;
456 trace_memory_region_ops_write(mr, addr, tmp, size);
457 mr->ops->write(mr->opaque, addr, tmp, size);
458 return MEMTX_OK;
459 }
460
461 static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
462 hwaddr addr,
463 uint64_t *value,
464 unsigned size,
465 unsigned shift,
466 uint64_t mask,
467 MemTxAttrs attrs)
468 {
469 uint64_t tmp;
470
471 if (mr->flush_coalesced_mmio) {
472 qemu_flush_coalesced_mmio_buffer();
473 }
474 tmp = (*value >> shift) & mask;
475 trace_memory_region_ops_write(mr, addr, tmp, size);
476 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
477 }
478
479 static MemTxResult access_with_adjusted_size(hwaddr addr,
480 uint64_t *value,
481 unsigned size,
482 unsigned access_size_min,
483 unsigned access_size_max,
484 MemTxResult (*access)(MemoryRegion *mr,
485 hwaddr addr,
486 uint64_t *value,
487 unsigned size,
488 unsigned shift,
489 uint64_t mask,
490 MemTxAttrs attrs),
491 MemoryRegion *mr,
492 MemTxAttrs attrs)
493 {
494 uint64_t access_mask;
495 unsigned access_size;
496 unsigned i;
497 MemTxResult r = MEMTX_OK;
498
499 if (!access_size_min) {
500 access_size_min = 1;
501 }
502 if (!access_size_max) {
503 access_size_max = 4;
504 }
505
506 /* FIXME: support unaligned access? */
507 access_size = MAX(MIN(size, access_size_max), access_size_min);
508 access_mask = -1ULL >> (64 - access_size * 8);
509 if (memory_region_big_endian(mr)) {
510 for (i = 0; i < size; i += access_size) {
511 r |= access(mr, addr + i, value, access_size,
512 (size - access_size - i) * 8, access_mask, attrs);
513 }
514 } else {
515 for (i = 0; i < size; i += access_size) {
516 r |= access(mr, addr + i, value, access_size, i * 8,
517 access_mask, attrs);
518 }
519 }
520 return r;
521 }
522
523 static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
524 {
525 AddressSpace *as;
526
527 while (mr->container) {
528 mr = mr->container;
529 }
530 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
531 if (mr == as->root) {
532 return as;
533 }
534 }
535 return NULL;
536 }
537
538 /* Render a memory region into the global view. Ranges in @view obscure
539 * ranges in @mr.
540 */
541 static void render_memory_region(FlatView *view,
542 MemoryRegion *mr,
543 Int128 base,
544 AddrRange clip,
545 bool readonly)
546 {
547 MemoryRegion *subregion;
548 unsigned i;
549 hwaddr offset_in_region;
550 Int128 remain;
551 Int128 now;
552 FlatRange fr;
553 AddrRange tmp;
554
555 if (!mr->enabled) {
556 return;
557 }
558
559 int128_addto(&base, int128_make64(mr->addr));
560 readonly |= mr->readonly;
561
562 tmp = addrrange_make(base, mr->size);
563
564 if (!addrrange_intersects(tmp, clip)) {
565 return;
566 }
567
568 clip = addrrange_intersection(tmp, clip);
569
570 if (mr->alias) {
571 int128_subfrom(&base, int128_make64(mr->alias->addr));
572 int128_subfrom(&base, int128_make64(mr->alias_offset));
573 render_memory_region(view, mr->alias, base, clip, readonly);
574 return;
575 }
576
577 /* Render subregions in priority order. */
578 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
579 render_memory_region(view, subregion, base, clip, readonly);
580 }
581
582 if (!mr->terminates) {
583 return;
584 }
585
586 offset_in_region = int128_get64(int128_sub(clip.start, base));
587 base = clip.start;
588 remain = clip.size;
589
590 fr.mr = mr;
591 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
592 fr.romd_mode = mr->romd_mode;
593 fr.readonly = readonly;
594
595 /* Render the region itself into any gaps left by the current view. */
596 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
597 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
598 continue;
599 }
600 if (int128_lt(base, view->ranges[i].addr.start)) {
601 now = int128_min(remain,
602 int128_sub(view->ranges[i].addr.start, base));
603 fr.offset_in_region = offset_in_region;
604 fr.addr = addrrange_make(base, now);
605 flatview_insert(view, i, &fr);
606 ++i;
607 int128_addto(&base, now);
608 offset_in_region += int128_get64(now);
609 int128_subfrom(&remain, now);
610 }
611 now = int128_sub(int128_min(int128_add(base, remain),
612 addrrange_end(view->ranges[i].addr)),
613 base);
614 int128_addto(&base, now);
615 offset_in_region += int128_get64(now);
616 int128_subfrom(&remain, now);
617 }
618 if (int128_nz(remain)) {
619 fr.offset_in_region = offset_in_region;
620 fr.addr = addrrange_make(base, remain);
621 flatview_insert(view, i, &fr);
622 }
623 }
624
625 /* Render a memory topology into a list of disjoint absolute ranges. */
626 static FlatView *generate_memory_topology(MemoryRegion *mr)
627 {
628 FlatView *view;
629
630 view = g_new(FlatView, 1);
631 flatview_init(view);
632
633 if (mr) {
634 render_memory_region(view, mr, int128_zero(),
635 addrrange_make(int128_zero(), int128_2_64()), false);
636 }
637 flatview_simplify(view);
638
639 return view;
640 }
641
642 static void address_space_add_del_ioeventfds(AddressSpace *as,
643 MemoryRegionIoeventfd *fds_new,
644 unsigned fds_new_nb,
645 MemoryRegionIoeventfd *fds_old,
646 unsigned fds_old_nb)
647 {
648 unsigned iold, inew;
649 MemoryRegionIoeventfd *fd;
650 MemoryRegionSection section;
651
652 /* Generate a symmetric difference of the old and new fd sets, adding
653 * and deleting as necessary.
654 */
655
656 iold = inew = 0;
657 while (iold < fds_old_nb || inew < fds_new_nb) {
658 if (iold < fds_old_nb
659 && (inew == fds_new_nb
660 || memory_region_ioeventfd_before(fds_old[iold],
661 fds_new[inew]))) {
662 fd = &fds_old[iold];
663 section = (MemoryRegionSection) {
664 .address_space = as,
665 .offset_within_address_space = int128_get64(fd->addr.start),
666 .size = fd->addr.size,
667 };
668 MEMORY_LISTENER_CALL(eventfd_del, Forward, &section,
669 fd->match_data, fd->data, fd->e);
670 ++iold;
671 } else if (inew < fds_new_nb
672 && (iold == fds_old_nb
673 || memory_region_ioeventfd_before(fds_new[inew],
674 fds_old[iold]))) {
675 fd = &fds_new[inew];
676 section = (MemoryRegionSection) {
677 .address_space = as,
678 .offset_within_address_space = int128_get64(fd->addr.start),
679 .size = fd->addr.size,
680 };
681 MEMORY_LISTENER_CALL(eventfd_add, Reverse, &section,
682 fd->match_data, fd->data, fd->e);
683 ++inew;
684 } else {
685 ++iold;
686 ++inew;
687 }
688 }
689 }
690
691 static FlatView *address_space_get_flatview(AddressSpace *as)
692 {
693 FlatView *view;
694
695 rcu_read_lock();
696 view = atomic_rcu_read(&as->current_map);
697 flatview_ref(view);
698 rcu_read_unlock();
699 return view;
700 }
701
702 static void address_space_update_ioeventfds(AddressSpace *as)
703 {
704 FlatView *view;
705 FlatRange *fr;
706 unsigned ioeventfd_nb = 0;
707 MemoryRegionIoeventfd *ioeventfds = NULL;
708 AddrRange tmp;
709 unsigned i;
710
711 view = address_space_get_flatview(as);
712 FOR_EACH_FLAT_RANGE(fr, view) {
713 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
714 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
715 int128_sub(fr->addr.start,
716 int128_make64(fr->offset_in_region)));
717 if (addrrange_intersects(fr->addr, tmp)) {
718 ++ioeventfd_nb;
719 ioeventfds = g_realloc(ioeventfds,
720 ioeventfd_nb * sizeof(*ioeventfds));
721 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
722 ioeventfds[ioeventfd_nb-1].addr = tmp;
723 }
724 }
725 }
726
727 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
728 as->ioeventfds, as->ioeventfd_nb);
729
730 g_free(as->ioeventfds);
731 as->ioeventfds = ioeventfds;
732 as->ioeventfd_nb = ioeventfd_nb;
733 flatview_unref(view);
734 }
735
736 static void address_space_update_topology_pass(AddressSpace *as,
737 const FlatView *old_view,
738 const FlatView *new_view,
739 bool adding)
740 {
741 unsigned iold, inew;
742 FlatRange *frold, *frnew;
743
744 /* Generate a symmetric difference of the old and new memory maps.
745 * Kill ranges in the old map, and instantiate ranges in the new map.
746 */
747 iold = inew = 0;
748 while (iold < old_view->nr || inew < new_view->nr) {
749 if (iold < old_view->nr) {
750 frold = &old_view->ranges[iold];
751 } else {
752 frold = NULL;
753 }
754 if (inew < new_view->nr) {
755 frnew = &new_view->ranges[inew];
756 } else {
757 frnew = NULL;
758 }
759
760 if (frold
761 && (!frnew
762 || int128_lt(frold->addr.start, frnew->addr.start)
763 || (int128_eq(frold->addr.start, frnew->addr.start)
764 && !flatrange_equal(frold, frnew)))) {
765 /* In old but not in new, or in both but attributes changed. */
766
767 if (!adding) {
768 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
769 }
770
771 ++iold;
772 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
773 /* In both and unchanged (except logging may have changed) */
774
775 if (adding) {
776 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
777 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
778 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
779 frold->dirty_log_mask,
780 frnew->dirty_log_mask);
781 }
782 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
783 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
784 frold->dirty_log_mask,
785 frnew->dirty_log_mask);
786 }
787 }
788
789 ++iold;
790 ++inew;
791 } else {
792 /* In new */
793
794 if (adding) {
795 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
796 }
797
798 ++inew;
799 }
800 }
801 }
802
803
804 static void address_space_update_topology(AddressSpace *as)
805 {
806 FlatView *old_view = address_space_get_flatview(as);
807 FlatView *new_view = generate_memory_topology(as->root);
808
809 address_space_update_topology_pass(as, old_view, new_view, false);
810 address_space_update_topology_pass(as, old_view, new_view, true);
811
812 /* Writes are protected by the BQL. */
813 atomic_rcu_set(&as->current_map, new_view);
814 call_rcu(old_view, flatview_unref, rcu);
815
816 /* Note that all the old MemoryRegions are still alive up to this
817 * point. This relieves most MemoryListeners from the need to
818 * ref/unref the MemoryRegions they get---unless they use them
819 * outside the iothread mutex, in which case precise reference
820 * counting is necessary.
821 */
822 flatview_unref(old_view);
823
824 address_space_update_ioeventfds(as);
825 }
826
827 void memory_region_transaction_begin(void)
828 {
829 qemu_flush_coalesced_mmio_buffer();
830 ++memory_region_transaction_depth;
831 }
832
833 static void memory_region_clear_pending(void)
834 {
835 memory_region_update_pending = false;
836 ioeventfd_update_pending = false;
837 }
838
839 void memory_region_transaction_commit(void)
840 {
841 AddressSpace *as;
842
843 assert(memory_region_transaction_depth);
844 --memory_region_transaction_depth;
845 if (!memory_region_transaction_depth) {
846 if (memory_region_update_pending) {
847 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
848
849 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
850 address_space_update_topology(as);
851 }
852
853 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
854 } else if (ioeventfd_update_pending) {
855 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
856 address_space_update_ioeventfds(as);
857 }
858 }
859 memory_region_clear_pending();
860 }
861 }
862
863 static void memory_region_destructor_none(MemoryRegion *mr)
864 {
865 }
866
867 static void memory_region_destructor_ram(MemoryRegion *mr)
868 {
869 qemu_ram_free(mr->ram_addr);
870 }
871
872 static void memory_region_destructor_alias(MemoryRegion *mr)
873 {
874 memory_region_unref(mr->alias);
875 }
876
877 static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
878 {
879 qemu_ram_free_from_ptr(mr->ram_addr);
880 }
881
882 static void memory_region_destructor_rom_device(MemoryRegion *mr)
883 {
884 qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
885 }
886
887 static bool memory_region_need_escape(char c)
888 {
889 return c == '/' || c == '[' || c == '\\' || c == ']';
890 }
891
892 static char *memory_region_escape_name(const char *name)
893 {
894 const char *p;
895 char *escaped, *q;
896 uint8_t c;
897 size_t bytes = 0;
898
899 for (p = name; *p; p++) {
900 bytes += memory_region_need_escape(*p) ? 4 : 1;
901 }
902 if (bytes == p - name) {
903 return g_memdup(name, bytes + 1);
904 }
905
906 escaped = g_malloc(bytes + 1);
907 for (p = name, q = escaped; *p; p++) {
908 c = *p;
909 if (unlikely(memory_region_need_escape(c))) {
910 *q++ = '\\';
911 *q++ = 'x';
912 *q++ = "0123456789abcdef"[c >> 4];
913 c = "0123456789abcdef"[c & 15];
914 }
915 *q++ = c;
916 }
917 *q = 0;
918 return escaped;
919 }
920
921 void memory_region_init(MemoryRegion *mr,
922 Object *owner,
923 const char *name,
924 uint64_t size)
925 {
926 if (!owner) {
927 owner = container_get(qdev_get_machine(), "/unattached");
928 }
929
930 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
931 mr->size = int128_make64(size);
932 if (size == UINT64_MAX) {
933 mr->size = int128_2_64();
934 }
935 mr->name = g_strdup(name);
936
937 if (name) {
938 char *escaped_name = memory_region_escape_name(name);
939 char *name_array = g_strdup_printf("%s[*]", escaped_name);
940 object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
941 object_unref(OBJECT(mr));
942 g_free(name_array);
943 g_free(escaped_name);
944 }
945 }
946
947 static void memory_region_get_addr(Object *obj, Visitor *v, void *opaque,
948 const char *name, Error **errp)
949 {
950 MemoryRegion *mr = MEMORY_REGION(obj);
951 uint64_t value = mr->addr;
952
953 visit_type_uint64(v, &value, name, errp);
954 }
955
956 static void memory_region_get_container(Object *obj, Visitor *v, void *opaque,
957 const char *name, Error **errp)
958 {
959 MemoryRegion *mr = MEMORY_REGION(obj);
960 gchar *path = (gchar *)"";
961
962 if (mr->container) {
963 path = object_get_canonical_path(OBJECT(mr->container));
964 }
965 visit_type_str(v, &path, name, errp);
966 if (mr->container) {
967 g_free(path);
968 }
969 }
970
971 static Object *memory_region_resolve_container(Object *obj, void *opaque,
972 const char *part)
973 {
974 MemoryRegion *mr = MEMORY_REGION(obj);
975
976 return OBJECT(mr->container);
977 }
978
979 static void memory_region_get_priority(Object *obj, Visitor *v, void *opaque,
980 const char *name, Error **errp)
981 {
982 MemoryRegion *mr = MEMORY_REGION(obj);
983 int32_t value = mr->priority;
984
985 visit_type_int32(v, &value, name, errp);
986 }
987
988 static bool memory_region_get_may_overlap(Object *obj, Error **errp)
989 {
990 MemoryRegion *mr = MEMORY_REGION(obj);
991
992 return mr->may_overlap;
993 }
994
995 static void memory_region_get_size(Object *obj, Visitor *v, void *opaque,
996 const char *name, Error **errp)
997 {
998 MemoryRegion *mr = MEMORY_REGION(obj);
999 uint64_t value = memory_region_size(mr);
1000
1001 visit_type_uint64(v, &value, name, errp);
1002 }
1003
1004 static void memory_region_initfn(Object *obj)
1005 {
1006 MemoryRegion *mr = MEMORY_REGION(obj);
1007 ObjectProperty *op;
1008
1009 mr->ops = &unassigned_mem_ops;
1010 mr->enabled = true;
1011 mr->romd_mode = true;
1012 mr->destructor = memory_region_destructor_none;
1013 QTAILQ_INIT(&mr->subregions);
1014 QTAILQ_INIT(&mr->coalesced);
1015
1016 op = object_property_add(OBJECT(mr), "container",
1017 "link<" TYPE_MEMORY_REGION ">",
1018 memory_region_get_container,
1019 NULL, /* memory_region_set_container */
1020 NULL, NULL, &error_abort);
1021 op->resolve = memory_region_resolve_container;
1022
1023 object_property_add(OBJECT(mr), "addr", "uint64",
1024 memory_region_get_addr,
1025 NULL, /* memory_region_set_addr */
1026 NULL, NULL, &error_abort);
1027 object_property_add(OBJECT(mr), "priority", "uint32",
1028 memory_region_get_priority,
1029 NULL, /* memory_region_set_priority */
1030 NULL, NULL, &error_abort);
1031 object_property_add_bool(OBJECT(mr), "may-overlap",
1032 memory_region_get_may_overlap,
1033 NULL, /* memory_region_set_may_overlap */
1034 &error_abort);
1035 object_property_add(OBJECT(mr), "size", "uint64",
1036 memory_region_get_size,
1037 NULL, /* memory_region_set_size, */
1038 NULL, NULL, &error_abort);
1039 }
1040
1041 static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1042 unsigned size)
1043 {
1044 #ifdef DEBUG_UNASSIGNED
1045 printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
1046 #endif
1047 if (current_cpu != NULL) {
1048 cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
1049 }
1050 return 0;
1051 }
1052
1053 static void unassigned_mem_write(void *opaque, hwaddr addr,
1054 uint64_t val, unsigned size)
1055 {
1056 #ifdef DEBUG_UNASSIGNED
1057 printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
1058 #endif
1059 if (current_cpu != NULL) {
1060 cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
1061 }
1062 }
1063
1064 static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
1065 unsigned size, bool is_write)
1066 {
1067 return false;
1068 }
1069
1070 const MemoryRegionOps unassigned_mem_ops = {
1071 .valid.accepts = unassigned_mem_accepts,
1072 .endianness = DEVICE_NATIVE_ENDIAN,
1073 };
1074
1075 bool memory_region_access_valid(MemoryRegion *mr,
1076 hwaddr addr,
1077 unsigned size,
1078 bool is_write)
1079 {
1080 int access_size_min, access_size_max;
1081 int access_size, i;
1082
1083 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
1084 return false;
1085 }
1086
1087 if (!mr->ops->valid.accepts) {
1088 return true;
1089 }
1090
1091 access_size_min = mr->ops->valid.min_access_size;
1092 if (!mr->ops->valid.min_access_size) {
1093 access_size_min = 1;
1094 }
1095
1096 access_size_max = mr->ops->valid.max_access_size;
1097 if (!mr->ops->valid.max_access_size) {
1098 access_size_max = 4;
1099 }
1100
1101 access_size = MAX(MIN(size, access_size_max), access_size_min);
1102 for (i = 0; i < size; i += access_size) {
1103 if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
1104 is_write)) {
1105 return false;
1106 }
1107 }
1108
1109 return true;
1110 }
1111
1112 static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1113 hwaddr addr,
1114 uint64_t *pval,
1115 unsigned size,
1116 MemTxAttrs attrs)
1117 {
1118 *pval = 0;
1119
1120 if (mr->ops->read) {
1121 return access_with_adjusted_size(addr, pval, size,
1122 mr->ops->impl.min_access_size,
1123 mr->ops->impl.max_access_size,
1124 memory_region_read_accessor,
1125 mr, attrs);
1126 } else if (mr->ops->read_with_attrs) {
1127 return access_with_adjusted_size(addr, pval, size,
1128 mr->ops->impl.min_access_size,
1129 mr->ops->impl.max_access_size,
1130 memory_region_read_with_attrs_accessor,
1131 mr, attrs);
1132 } else {
1133 return access_with_adjusted_size(addr, pval, size, 1, 4,
1134 memory_region_oldmmio_read_accessor,
1135 mr, attrs);
1136 }
1137 }
1138
1139 MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1140 hwaddr addr,
1141 uint64_t *pval,
1142 unsigned size,
1143 MemTxAttrs attrs)
1144 {
1145 MemTxResult r;
1146
1147 if (!memory_region_access_valid(mr, addr, size, false)) {
1148 *pval = unassigned_mem_read(mr, addr, size);
1149 return MEMTX_DECODE_ERROR;
1150 }
1151
1152 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
1153 adjust_endianness(mr, pval, size);
1154 return r;
1155 }
1156
1157 MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1158 hwaddr addr,
1159 uint64_t data,
1160 unsigned size,
1161 MemTxAttrs attrs)
1162 {
1163 if (!memory_region_access_valid(mr, addr, size, true)) {
1164 unassigned_mem_write(mr, addr, data, size);
1165 return MEMTX_DECODE_ERROR;
1166 }
1167
1168 adjust_endianness(mr, &data, size);
1169
1170 if (mr->ops->write) {
1171 return access_with_adjusted_size(addr, &data, size,
1172 mr->ops->impl.min_access_size,
1173 mr->ops->impl.max_access_size,
1174 memory_region_write_accessor, mr,
1175 attrs);
1176 } else if (mr->ops->write_with_attrs) {
1177 return
1178 access_with_adjusted_size(addr, &data, size,
1179 mr->ops->impl.min_access_size,
1180 mr->ops->impl.max_access_size,
1181 memory_region_write_with_attrs_accessor,
1182 mr, attrs);
1183 } else {
1184 return access_with_adjusted_size(addr, &data, size, 1, 4,
1185 memory_region_oldmmio_write_accessor,
1186 mr, attrs);
1187 }
1188 }
1189
1190 void memory_region_init_io(MemoryRegion *mr,
1191 Object *owner,
1192 const MemoryRegionOps *ops,
1193 void *opaque,
1194 const char *name,
1195 uint64_t size)
1196 {
1197 memory_region_init(mr, owner, name, size);
1198 mr->ops = ops;
1199 mr->opaque = opaque;
1200 mr->terminates = true;
1201 mr->ram_addr = ~(ram_addr_t)0;
1202 }
1203
1204 void memory_region_init_ram(MemoryRegion *mr,
1205 Object *owner,
1206 const char *name,
1207 uint64_t size,
1208 Error **errp)
1209 {
1210 memory_region_init(mr, owner, name, size);
1211 mr->ram = true;
1212 mr->terminates = true;
1213 mr->destructor = memory_region_destructor_ram;
1214 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1215 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1216 }
1217
1218 void memory_region_init_resizeable_ram(MemoryRegion *mr,
1219 Object *owner,
1220 const char *name,
1221 uint64_t size,
1222 uint64_t max_size,
1223 void (*resized)(const char*,
1224 uint64_t length,
1225 void *host),
1226 Error **errp)
1227 {
1228 memory_region_init(mr, owner, name, size);
1229 mr->ram = true;
1230 mr->terminates = true;
1231 mr->destructor = memory_region_destructor_ram;
1232 mr->ram_addr = qemu_ram_alloc_resizeable(size, max_size, resized, mr, errp);
1233 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1234 }
1235
1236 #ifdef __linux__
1237 void memory_region_init_ram_from_file(MemoryRegion *mr,
1238 struct Object *owner,
1239 const char *name,
1240 uint64_t size,
1241 bool share,
1242 const char *path,
1243 Error **errp)
1244 {
1245 memory_region_init(mr, owner, name, size);
1246 mr->ram = true;
1247 mr->terminates = true;
1248 mr->destructor = memory_region_destructor_ram;
1249 mr->ram_addr = qemu_ram_alloc_from_file(size, mr, share, path, errp);
1250 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1251 }
1252 #endif
1253
1254 void memory_region_init_ram_ptr(MemoryRegion *mr,
1255 Object *owner,
1256 const char *name,
1257 uint64_t size,
1258 void *ptr)
1259 {
1260 memory_region_init(mr, owner, name, size);
1261 mr->ram = true;
1262 mr->terminates = true;
1263 mr->destructor = memory_region_destructor_ram_from_ptr;
1264 mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
1265
1266 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1267 assert(ptr != NULL);
1268 mr->ram_addr = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_abort);
1269 }
1270
1271 void memory_region_set_skip_dump(MemoryRegion *mr)
1272 {
1273 mr->skip_dump = true;
1274 }
1275
1276 void memory_region_init_alias(MemoryRegion *mr,
1277 Object *owner,
1278 const char *name,
1279 MemoryRegion *orig,
1280 hwaddr offset,
1281 uint64_t size)
1282 {
1283 memory_region_init(mr, owner, name, size);
1284 memory_region_ref(orig);
1285 mr->destructor = memory_region_destructor_alias;
1286 mr->alias = orig;
1287 mr->alias_offset = offset;
1288 }
1289
1290 void memory_region_init_rom_device(MemoryRegion *mr,
1291 Object *owner,
1292 const MemoryRegionOps *ops,
1293 void *opaque,
1294 const char *name,
1295 uint64_t size,
1296 Error **errp)
1297 {
1298 memory_region_init(mr, owner, name, size);
1299 mr->ops = ops;
1300 mr->opaque = opaque;
1301 mr->terminates = true;
1302 mr->rom_device = true;
1303 mr->destructor = memory_region_destructor_rom_device;
1304 mr->ram_addr = qemu_ram_alloc(size, mr, errp);
1305 }
1306
1307 void memory_region_init_iommu(MemoryRegion *mr,
1308 Object *owner,
1309 const MemoryRegionIOMMUOps *ops,
1310 const char *name,
1311 uint64_t size)
1312 {
1313 memory_region_init(mr, owner, name, size);
1314 mr->iommu_ops = ops,
1315 mr->terminates = true; /* then re-forwards */
1316 notifier_list_init(&mr->iommu_notify);
1317 }
1318
1319 void memory_region_init_reservation(MemoryRegion *mr,
1320 Object *owner,
1321 const char *name,
1322 uint64_t size)
1323 {
1324 memory_region_init_io(mr, owner, &unassigned_mem_ops, mr, name, size);
1325 }
1326
1327 static void memory_region_finalize(Object *obj)
1328 {
1329 MemoryRegion *mr = MEMORY_REGION(obj);
1330
1331 assert(QTAILQ_EMPTY(&mr->subregions));
1332 mr->destructor(mr);
1333 memory_region_clear_coalescing(mr);
1334 g_free((char *)mr->name);
1335 g_free(mr->ioeventfds);
1336 }
1337
1338 Object *memory_region_owner(MemoryRegion *mr)
1339 {
1340 Object *obj = OBJECT(mr);
1341 return obj->parent;
1342 }
1343
1344 void memory_region_ref(MemoryRegion *mr)
1345 {
1346 /* MMIO callbacks most likely will access data that belongs
1347 * to the owner, hence the need to ref/unref the owner whenever
1348 * the memory region is in use.
1349 *
1350 * The memory region is a child of its owner. As long as the
1351 * owner doesn't call unparent itself on the memory region,
1352 * ref-ing the owner will also keep the memory region alive.
1353 * Memory regions without an owner are supposed to never go away,
1354 * but we still ref/unref them for debugging purposes.
1355 */
1356 Object *obj = OBJECT(mr);
1357 if (obj && obj->parent) {
1358 object_ref(obj->parent);
1359 } else {
1360 object_ref(obj);
1361 }
1362 }
1363
1364 void memory_region_unref(MemoryRegion *mr)
1365 {
1366 Object *obj = OBJECT(mr);
1367 if (obj && obj->parent) {
1368 object_unref(obj->parent);
1369 } else {
1370 object_unref(obj);
1371 }
1372 }
1373
1374 uint64_t memory_region_size(MemoryRegion *mr)
1375 {
1376 if (int128_eq(mr->size, int128_2_64())) {
1377 return UINT64_MAX;
1378 }
1379 return int128_get64(mr->size);
1380 }
1381
1382 const char *memory_region_name(const MemoryRegion *mr)
1383 {
1384 if (!mr->name) {
1385 ((MemoryRegion *)mr)->name =
1386 object_get_canonical_path_component(OBJECT(mr));
1387 }
1388 return mr->name;
1389 }
1390
1391 bool memory_region_is_ram(MemoryRegion *mr)
1392 {
1393 return mr->ram;
1394 }
1395
1396 bool memory_region_is_skip_dump(MemoryRegion *mr)
1397 {
1398 return mr->skip_dump;
1399 }
1400
1401 uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
1402 {
1403 uint8_t mask = mr->dirty_log_mask;
1404 if (global_dirty_log) {
1405 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1406 }
1407 return mask;
1408 }
1409
1410 bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1411 {
1412 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1413 }
1414
1415 bool memory_region_is_rom(MemoryRegion *mr)
1416 {
1417 return mr->ram && mr->readonly;
1418 }
1419
1420 bool memory_region_is_iommu(MemoryRegion *mr)
1421 {
1422 return mr->iommu_ops;
1423 }
1424
1425 void memory_region_register_iommu_notifier(MemoryRegion *mr, Notifier *n)
1426 {
1427 notifier_list_add(&mr->iommu_notify, n);
1428 }
1429
1430 void memory_region_unregister_iommu_notifier(Notifier *n)
1431 {
1432 notifier_remove(n);
1433 }
1434
1435 void memory_region_notify_iommu(MemoryRegion *mr,
1436 IOMMUTLBEntry entry)
1437 {
1438 assert(memory_region_is_iommu(mr));
1439 notifier_list_notify(&mr->iommu_notify, &entry);
1440 }
1441
1442 void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
1443 {
1444 uint8_t mask = 1 << client;
1445
1446 assert(client == DIRTY_MEMORY_VGA);
1447 memory_region_transaction_begin();
1448 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
1449 memory_region_update_pending |= mr->enabled;
1450 memory_region_transaction_commit();
1451 }
1452
1453 bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
1454 hwaddr size, unsigned client)
1455 {
1456 assert(mr->terminates);
1457 return cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1458 }
1459
1460 void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
1461 hwaddr size)
1462 {
1463 assert(mr->terminates);
1464 cpu_physical_memory_set_dirty_range(mr->ram_addr + addr, size,
1465 memory_region_get_dirty_log_mask(mr));
1466 }
1467
1468 bool memory_region_test_and_clear_dirty(MemoryRegion *mr, hwaddr addr,
1469 hwaddr size, unsigned client)
1470 {
1471 bool ret;
1472 assert(mr->terminates);
1473 ret = cpu_physical_memory_get_dirty(mr->ram_addr + addr, size, client);
1474 if (ret) {
1475 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1476 }
1477 return ret;
1478 }
1479
1480
1481 void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
1482 {
1483 AddressSpace *as;
1484 FlatRange *fr;
1485
1486 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1487 FlatView *view = address_space_get_flatview(as);
1488 FOR_EACH_FLAT_RANGE(fr, view) {
1489 if (fr->mr == mr) {
1490 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1491 }
1492 }
1493 flatview_unref(view);
1494 }
1495 }
1496
1497 void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
1498 {
1499 if (mr->readonly != readonly) {
1500 memory_region_transaction_begin();
1501 mr->readonly = readonly;
1502 memory_region_update_pending |= mr->enabled;
1503 memory_region_transaction_commit();
1504 }
1505 }
1506
1507 void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
1508 {
1509 if (mr->romd_mode != romd_mode) {
1510 memory_region_transaction_begin();
1511 mr->romd_mode = romd_mode;
1512 memory_region_update_pending |= mr->enabled;
1513 memory_region_transaction_commit();
1514 }
1515 }
1516
1517 void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
1518 hwaddr size, unsigned client)
1519 {
1520 assert(mr->terminates);
1521 cpu_physical_memory_reset_dirty(mr->ram_addr + addr, size, client);
1522 }
1523
1524 int memory_region_get_fd(MemoryRegion *mr)
1525 {
1526 if (mr->alias) {
1527 return memory_region_get_fd(mr->alias);
1528 }
1529
1530 assert(mr->terminates);
1531
1532 return qemu_get_ram_fd(mr->ram_addr & TARGET_PAGE_MASK);
1533 }
1534
1535 void *memory_region_get_ram_ptr(MemoryRegion *mr)
1536 {
1537 if (mr->alias) {
1538 return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
1539 }
1540
1541 assert(mr->terminates);
1542
1543 return qemu_get_ram_ptr(mr->ram_addr & TARGET_PAGE_MASK);
1544 }
1545
1546 void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
1547 {
1548 assert(mr->terminates);
1549
1550 qemu_ram_resize(mr->ram_addr, newsize, errp);
1551 }
1552
1553 static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
1554 {
1555 FlatView *view;
1556 FlatRange *fr;
1557 CoalescedMemoryRange *cmr;
1558 AddrRange tmp;
1559 MemoryRegionSection section;
1560
1561 view = address_space_get_flatview(as);
1562 FOR_EACH_FLAT_RANGE(fr, view) {
1563 if (fr->mr == mr) {
1564 section = (MemoryRegionSection) {
1565 .address_space = as,
1566 .offset_within_address_space = int128_get64(fr->addr.start),
1567 .size = fr->addr.size,
1568 };
1569
1570 MEMORY_LISTENER_CALL(coalesced_mmio_del, Reverse, &section,
1571 int128_get64(fr->addr.start),
1572 int128_get64(fr->addr.size));
1573 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
1574 tmp = addrrange_shift(cmr->addr,
1575 int128_sub(fr->addr.start,
1576 int128_make64(fr->offset_in_region)));
1577 if (!addrrange_intersects(tmp, fr->addr)) {
1578 continue;
1579 }
1580 tmp = addrrange_intersection(tmp, fr->addr);
1581 MEMORY_LISTENER_CALL(coalesced_mmio_add, Forward, &section,
1582 int128_get64(tmp.start),
1583 int128_get64(tmp.size));
1584 }
1585 }
1586 }
1587 flatview_unref(view);
1588 }
1589
1590 static void memory_region_update_coalesced_range(MemoryRegion *mr)
1591 {
1592 AddressSpace *as;
1593
1594 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1595 memory_region_update_coalesced_range_as(mr, as);
1596 }
1597 }
1598
1599 void memory_region_set_coalescing(MemoryRegion *mr)
1600 {
1601 memory_region_clear_coalescing(mr);
1602 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
1603 }
1604
1605 void memory_region_add_coalescing(MemoryRegion *mr,
1606 hwaddr offset,
1607 uint64_t size)
1608 {
1609 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
1610
1611 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
1612 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
1613 memory_region_update_coalesced_range(mr);
1614 memory_region_set_flush_coalesced(mr);
1615 }
1616
1617 void memory_region_clear_coalescing(MemoryRegion *mr)
1618 {
1619 CoalescedMemoryRange *cmr;
1620 bool updated = false;
1621
1622 qemu_flush_coalesced_mmio_buffer();
1623 mr->flush_coalesced_mmio = false;
1624
1625 while (!QTAILQ_EMPTY(&mr->coalesced)) {
1626 cmr = QTAILQ_FIRST(&mr->coalesced);
1627 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
1628 g_free(cmr);
1629 updated = true;
1630 }
1631
1632 if (updated) {
1633 memory_region_update_coalesced_range(mr);
1634 }
1635 }
1636
1637 void memory_region_set_flush_coalesced(MemoryRegion *mr)
1638 {
1639 mr->flush_coalesced_mmio = true;
1640 }
1641
1642 void memory_region_clear_flush_coalesced(MemoryRegion *mr)
1643 {
1644 qemu_flush_coalesced_mmio_buffer();
1645 if (QTAILQ_EMPTY(&mr->coalesced)) {
1646 mr->flush_coalesced_mmio = false;
1647 }
1648 }
1649
1650 void memory_region_add_eventfd(MemoryRegion *mr,
1651 hwaddr addr,
1652 unsigned size,
1653 bool match_data,
1654 uint64_t data,
1655 EventNotifier *e)
1656 {
1657 MemoryRegionIoeventfd mrfd = {
1658 .addr.start = int128_make64(addr),
1659 .addr.size = int128_make64(size),
1660 .match_data = match_data,
1661 .data = data,
1662 .e = e,
1663 };
1664 unsigned i;
1665
1666 adjust_endianness(mr, &mrfd.data, size);
1667 memory_region_transaction_begin();
1668 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1669 if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
1670 break;
1671 }
1672 }
1673 ++mr->ioeventfd_nb;
1674 mr->ioeventfds = g_realloc(mr->ioeventfds,
1675 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
1676 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
1677 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
1678 mr->ioeventfds[i] = mrfd;
1679 ioeventfd_update_pending |= mr->enabled;
1680 memory_region_transaction_commit();
1681 }
1682
1683 void memory_region_del_eventfd(MemoryRegion *mr,
1684 hwaddr addr,
1685 unsigned size,
1686 bool match_data,
1687 uint64_t data,
1688 EventNotifier *e)
1689 {
1690 MemoryRegionIoeventfd mrfd = {
1691 .addr.start = int128_make64(addr),
1692 .addr.size = int128_make64(size),
1693 .match_data = match_data,
1694 .data = data,
1695 .e = e,
1696 };
1697 unsigned i;
1698
1699 adjust_endianness(mr, &mrfd.data, size);
1700 memory_region_transaction_begin();
1701 for (i = 0; i < mr->ioeventfd_nb; ++i) {
1702 if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
1703 break;
1704 }
1705 }
1706 assert(i != mr->ioeventfd_nb);
1707 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
1708 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
1709 --mr->ioeventfd_nb;
1710 mr->ioeventfds = g_realloc(mr->ioeventfds,
1711 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
1712 ioeventfd_update_pending |= mr->enabled;
1713 memory_region_transaction_commit();
1714 }
1715
1716 static void memory_region_update_container_subregions(MemoryRegion *subregion)
1717 {
1718 hwaddr offset = subregion->addr;
1719 MemoryRegion *mr = subregion->container;
1720 MemoryRegion *other;
1721
1722 memory_region_transaction_begin();
1723
1724 memory_region_ref(subregion);
1725 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1726 if (subregion->may_overlap || other->may_overlap) {
1727 continue;
1728 }
1729 if (int128_ge(int128_make64(offset),
1730 int128_add(int128_make64(other->addr), other->size))
1731 || int128_le(int128_add(int128_make64(offset), subregion->size),
1732 int128_make64(other->addr))) {
1733 continue;
1734 }
1735 #if 0
1736 printf("warning: subregion collision %llx/%llx (%s) "
1737 "vs %llx/%llx (%s)\n",
1738 (unsigned long long)offset,
1739 (unsigned long long)int128_get64(subregion->size),
1740 subregion->name,
1741 (unsigned long long)other->addr,
1742 (unsigned long long)int128_get64(other->size),
1743 other->name);
1744 #endif
1745 }
1746 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
1747 if (subregion->priority >= other->priority) {
1748 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
1749 goto done;
1750 }
1751 }
1752 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
1753 done:
1754 memory_region_update_pending |= mr->enabled && subregion->enabled;
1755 memory_region_transaction_commit();
1756 }
1757
1758 static void memory_region_add_subregion_common(MemoryRegion *mr,
1759 hwaddr offset,
1760 MemoryRegion *subregion)
1761 {
1762 assert(!subregion->container);
1763 subregion->container = mr;
1764 subregion->addr = offset;
1765 memory_region_update_container_subregions(subregion);
1766 }
1767
1768 void memory_region_add_subregion(MemoryRegion *mr,
1769 hwaddr offset,
1770 MemoryRegion *subregion)
1771 {
1772 subregion->may_overlap = false;
1773 subregion->priority = 0;
1774 memory_region_add_subregion_common(mr, offset, subregion);
1775 }
1776
1777 void memory_region_add_subregion_overlap(MemoryRegion *mr,
1778 hwaddr offset,
1779 MemoryRegion *subregion,
1780 int priority)
1781 {
1782 subregion->may_overlap = true;
1783 subregion->priority = priority;
1784 memory_region_add_subregion_common(mr, offset, subregion);
1785 }
1786
1787 void memory_region_del_subregion(MemoryRegion *mr,
1788 MemoryRegion *subregion)
1789 {
1790 memory_region_transaction_begin();
1791 assert(subregion->container == mr);
1792 subregion->container = NULL;
1793 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
1794 memory_region_unref(subregion);
1795 memory_region_update_pending |= mr->enabled && subregion->enabled;
1796 memory_region_transaction_commit();
1797 }
1798
1799 void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
1800 {
1801 if (enabled == mr->enabled) {
1802 return;
1803 }
1804 memory_region_transaction_begin();
1805 mr->enabled = enabled;
1806 memory_region_update_pending = true;
1807 memory_region_transaction_commit();
1808 }
1809
1810 void memory_region_set_size(MemoryRegion *mr, uint64_t size)
1811 {
1812 Int128 s = int128_make64(size);
1813
1814 if (size == UINT64_MAX) {
1815 s = int128_2_64();
1816 }
1817 if (int128_eq(s, mr->size)) {
1818 return;
1819 }
1820 memory_region_transaction_begin();
1821 mr->size = s;
1822 memory_region_update_pending = true;
1823 memory_region_transaction_commit();
1824 }
1825
1826 static void memory_region_readd_subregion(MemoryRegion *mr)
1827 {
1828 MemoryRegion *container = mr->container;
1829
1830 if (container) {
1831 memory_region_transaction_begin();
1832 memory_region_ref(mr);
1833 memory_region_del_subregion(container, mr);
1834 mr->container = container;
1835 memory_region_update_container_subregions(mr);
1836 memory_region_unref(mr);
1837 memory_region_transaction_commit();
1838 }
1839 }
1840
1841 void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
1842 {
1843 if (addr != mr->addr) {
1844 mr->addr = addr;
1845 memory_region_readd_subregion(mr);
1846 }
1847 }
1848
1849 void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
1850 {
1851 assert(mr->alias);
1852
1853 if (offset == mr->alias_offset) {
1854 return;
1855 }
1856
1857 memory_region_transaction_begin();
1858 mr->alias_offset = offset;
1859 memory_region_update_pending |= mr->enabled;
1860 memory_region_transaction_commit();
1861 }
1862
1863 ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
1864 {
1865 return mr->ram_addr;
1866 }
1867
1868 uint64_t memory_region_get_alignment(const MemoryRegion *mr)
1869 {
1870 return mr->align;
1871 }
1872
1873 static int cmp_flatrange_addr(const void *addr_, const void *fr_)
1874 {
1875 const AddrRange *addr = addr_;
1876 const FlatRange *fr = fr_;
1877
1878 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
1879 return -1;
1880 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
1881 return 1;
1882 }
1883 return 0;
1884 }
1885
1886 static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
1887 {
1888 return bsearch(&addr, view->ranges, view->nr,
1889 sizeof(FlatRange), cmp_flatrange_addr);
1890 }
1891
1892 bool memory_region_present(MemoryRegion *container, hwaddr addr)
1893 {
1894 MemoryRegion *mr = memory_region_find(container, addr, 1).mr;
1895 if (!mr || (mr == container)) {
1896 return false;
1897 }
1898 memory_region_unref(mr);
1899 return true;
1900 }
1901
1902 bool memory_region_is_mapped(MemoryRegion *mr)
1903 {
1904 return mr->container ? true : false;
1905 }
1906
1907 MemoryRegionSection memory_region_find(MemoryRegion *mr,
1908 hwaddr addr, uint64_t size)
1909 {
1910 MemoryRegionSection ret = { .mr = NULL };
1911 MemoryRegion *root;
1912 AddressSpace *as;
1913 AddrRange range;
1914 FlatView *view;
1915 FlatRange *fr;
1916
1917 addr += mr->addr;
1918 for (root = mr; root->container; ) {
1919 root = root->container;
1920 addr += root->addr;
1921 }
1922
1923 as = memory_region_to_address_space(root);
1924 if (!as) {
1925 return ret;
1926 }
1927 range = addrrange_make(int128_make64(addr), int128_make64(size));
1928
1929 rcu_read_lock();
1930 view = atomic_rcu_read(&as->current_map);
1931 fr = flatview_lookup(view, range);
1932 if (!fr) {
1933 goto out;
1934 }
1935
1936 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
1937 --fr;
1938 }
1939
1940 ret.mr = fr->mr;
1941 ret.address_space = as;
1942 range = addrrange_intersection(range, fr->addr);
1943 ret.offset_within_region = fr->offset_in_region;
1944 ret.offset_within_region += int128_get64(int128_sub(range.start,
1945 fr->addr.start));
1946 ret.size = range.size;
1947 ret.offset_within_address_space = int128_get64(range.start);
1948 ret.readonly = fr->readonly;
1949 memory_region_ref(ret.mr);
1950 out:
1951 rcu_read_unlock();
1952 return ret;
1953 }
1954
1955 void address_space_sync_dirty_bitmap(AddressSpace *as)
1956 {
1957 FlatView *view;
1958 FlatRange *fr;
1959
1960 view = address_space_get_flatview(as);
1961 FOR_EACH_FLAT_RANGE(fr, view) {
1962 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, log_sync);
1963 }
1964 flatview_unref(view);
1965 }
1966
1967 void memory_global_dirty_log_start(void)
1968 {
1969 global_dirty_log = true;
1970
1971 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
1972
1973 /* Refresh DIRTY_LOG_MIGRATION bit. */
1974 memory_region_transaction_begin();
1975 memory_region_update_pending = true;
1976 memory_region_transaction_commit();
1977 }
1978
1979 void memory_global_dirty_log_stop(void)
1980 {
1981 global_dirty_log = false;
1982
1983 /* Refresh DIRTY_LOG_MIGRATION bit. */
1984 memory_region_transaction_begin();
1985 memory_region_update_pending = true;
1986 memory_region_transaction_commit();
1987
1988 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
1989 }
1990
1991 static void listener_add_address_space(MemoryListener *listener,
1992 AddressSpace *as)
1993 {
1994 FlatView *view;
1995 FlatRange *fr;
1996
1997 if (listener->address_space_filter
1998 && listener->address_space_filter != as) {
1999 return;
2000 }
2001
2002 if (global_dirty_log) {
2003 if (listener->log_global_start) {
2004 listener->log_global_start(listener);
2005 }
2006 }
2007
2008 view = address_space_get_flatview(as);
2009 FOR_EACH_FLAT_RANGE(fr, view) {
2010 MemoryRegionSection section = {
2011 .mr = fr->mr,
2012 .address_space = as,
2013 .offset_within_region = fr->offset_in_region,
2014 .size = fr->addr.size,
2015 .offset_within_address_space = int128_get64(fr->addr.start),
2016 .readonly = fr->readonly,
2017 };
2018 if (listener->region_add) {
2019 listener->region_add(listener, &section);
2020 }
2021 }
2022 flatview_unref(view);
2023 }
2024
2025 void memory_listener_register(MemoryListener *listener, AddressSpace *filter)
2026 {
2027 MemoryListener *other = NULL;
2028 AddressSpace *as;
2029
2030 listener->address_space_filter = filter;
2031 if (QTAILQ_EMPTY(&memory_listeners)
2032 || listener->priority >= QTAILQ_LAST(&memory_listeners,
2033 memory_listeners)->priority) {
2034 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
2035 } else {
2036 QTAILQ_FOREACH(other, &memory_listeners, link) {
2037 if (listener->priority < other->priority) {
2038 break;
2039 }
2040 }
2041 QTAILQ_INSERT_BEFORE(other, listener, link);
2042 }
2043
2044 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2045 listener_add_address_space(listener, as);
2046 }
2047 }
2048
2049 void memory_listener_unregister(MemoryListener *listener)
2050 {
2051 QTAILQ_REMOVE(&memory_listeners, listener, link);
2052 }
2053
2054 void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
2055 {
2056 memory_region_ref(root);
2057 memory_region_transaction_begin();
2058 as->root = root;
2059 as->current_map = g_new(FlatView, 1);
2060 flatview_init(as->current_map);
2061 as->ioeventfd_nb = 0;
2062 as->ioeventfds = NULL;
2063 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
2064 as->name = g_strdup(name ? name : "anonymous");
2065 address_space_init_dispatch(as);
2066 memory_region_update_pending |= root->enabled;
2067 memory_region_transaction_commit();
2068 }
2069
2070 static void do_address_space_destroy(AddressSpace *as)
2071 {
2072 MemoryListener *listener;
2073
2074 address_space_destroy_dispatch(as);
2075
2076 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2077 assert(listener->address_space_filter != as);
2078 }
2079
2080 flatview_unref(as->current_map);
2081 g_free(as->name);
2082 g_free(as->ioeventfds);
2083 memory_region_unref(as->root);
2084 }
2085
2086 void address_space_destroy(AddressSpace *as)
2087 {
2088 MemoryRegion *root = as->root;
2089
2090 /* Flush out anything from MemoryListeners listening in on this */
2091 memory_region_transaction_begin();
2092 as->root = NULL;
2093 memory_region_transaction_commit();
2094 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
2095 address_space_unregister(as);
2096
2097 /* At this point, as->dispatch and as->current_map are dummy
2098 * entries that the guest should never use. Wait for the old
2099 * values to expire before freeing the data.
2100 */
2101 as->root = root;
2102 call_rcu(as, do_address_space_destroy, rcu);
2103 }
2104
2105 typedef struct MemoryRegionList MemoryRegionList;
2106
2107 struct MemoryRegionList {
2108 const MemoryRegion *mr;
2109 QTAILQ_ENTRY(MemoryRegionList) queue;
2110 };
2111
2112 typedef QTAILQ_HEAD(queue, MemoryRegionList) MemoryRegionListHead;
2113
2114 static void mtree_print_mr(fprintf_function mon_printf, void *f,
2115 const MemoryRegion *mr, unsigned int level,
2116 hwaddr base,
2117 MemoryRegionListHead *alias_print_queue)
2118 {
2119 MemoryRegionList *new_ml, *ml, *next_ml;
2120 MemoryRegionListHead submr_print_queue;
2121 const MemoryRegion *submr;
2122 unsigned int i;
2123
2124 if (!mr) {
2125 return;
2126 }
2127
2128 for (i = 0; i < level; i++) {
2129 mon_printf(f, " ");
2130 }
2131
2132 if (mr->alias) {
2133 MemoryRegionList *ml;
2134 bool found = false;
2135
2136 /* check if the alias is already in the queue */
2137 QTAILQ_FOREACH(ml, alias_print_queue, queue) {
2138 if (ml->mr == mr->alias) {
2139 found = true;
2140 }
2141 }
2142
2143 if (!found) {
2144 ml = g_new(MemoryRegionList, 1);
2145 ml->mr = mr->alias;
2146 QTAILQ_INSERT_TAIL(alias_print_queue, ml, queue);
2147 }
2148 mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
2149 " (prio %d, %c%c): alias %s @%s " TARGET_FMT_plx
2150 "-" TARGET_FMT_plx "%s\n",
2151 base + mr->addr,
2152 base + mr->addr
2153 + (int128_nz(mr->size) ?
2154 (hwaddr)int128_get64(int128_sub(mr->size,
2155 int128_one())) : 0),
2156 mr->priority,
2157 mr->romd_mode ? 'R' : '-',
2158 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2159 : '-',
2160 memory_region_name(mr),
2161 memory_region_name(mr->alias),
2162 mr->alias_offset,
2163 mr->alias_offset
2164 + (int128_nz(mr->size) ?
2165 (hwaddr)int128_get64(int128_sub(mr->size,
2166 int128_one())) : 0),
2167 mr->enabled ? "" : " [disabled]");
2168 } else {
2169 mon_printf(f,
2170 TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %c%c): %s%s\n",
2171 base + mr->addr,
2172 base + mr->addr
2173 + (int128_nz(mr->size) ?
2174 (hwaddr)int128_get64(int128_sub(mr->size,
2175 int128_one())) : 0),
2176 mr->priority,
2177 mr->romd_mode ? 'R' : '-',
2178 !mr->readonly && !(mr->rom_device && mr->romd_mode) ? 'W'
2179 : '-',
2180 memory_region_name(mr),
2181 mr->enabled ? "" : " [disabled]");
2182 }
2183
2184 QTAILQ_INIT(&submr_print_queue);
2185
2186 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
2187 new_ml = g_new(MemoryRegionList, 1);
2188 new_ml->mr = submr;
2189 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2190 if (new_ml->mr->addr < ml->mr->addr ||
2191 (new_ml->mr->addr == ml->mr->addr &&
2192 new_ml->mr->priority > ml->mr->priority)) {
2193 QTAILQ_INSERT_BEFORE(ml, new_ml, queue);
2194 new_ml = NULL;
2195 break;
2196 }
2197 }
2198 if (new_ml) {
2199 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, queue);
2200 }
2201 }
2202
2203 QTAILQ_FOREACH(ml, &submr_print_queue, queue) {
2204 mtree_print_mr(mon_printf, f, ml->mr, level + 1, base + mr->addr,
2205 alias_print_queue);
2206 }
2207
2208 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, queue, next_ml) {
2209 g_free(ml);
2210 }
2211 }
2212
2213 void mtree_info(fprintf_function mon_printf, void *f)
2214 {
2215 MemoryRegionListHead ml_head;
2216 MemoryRegionList *ml, *ml2;
2217 AddressSpace *as;
2218
2219 QTAILQ_INIT(&ml_head);
2220
2221 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
2222 mon_printf(f, "address-space: %s\n", as->name);
2223 mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
2224 mon_printf(f, "\n");
2225 }
2226
2227 /* print aliased regions */
2228 QTAILQ_FOREACH(ml, &ml_head, queue) {
2229 mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
2230 mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
2231 mon_printf(f, "\n");
2232 }
2233
2234 QTAILQ_FOREACH_SAFE(ml, &ml_head, queue, ml2) {
2235 g_free(ml);
2236 }
2237 }
2238
2239 static const TypeInfo memory_region_info = {
2240 .parent = TYPE_OBJECT,
2241 .name = TYPE_MEMORY_REGION,
2242 .instance_size = sizeof(MemoryRegion),
2243 .instance_init = memory_region_initfn,
2244 .instance_finalize = memory_region_finalize,
2245 };
2246
2247 static void memory_register_types(void)
2248 {
2249 type_register_static(&memory_region_info);
2250 }
2251
2252 type_init(memory_register_types)
QEmu