2 * QEMU<->ACPI BIOS PCI hotplug interface
4 * QEMU supports PCI hotplug via ACPI. This module
5 * implements the interface between QEMU and the ACPI BIOS.
6 * Interface specification - see docs/specs/acpi_pci_hotplug.txt
8 * Copyright (c) 2013, Red Hat Inc, Michael S. Tsirkin (mst@redhat.com)
9 * Copyright (c) 2006 Fabrice Bellard
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License version 2 as published by the Free Software Foundation.
15 * This library is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * Lesser General Public License for more details.
20 * You should have received a copy of the GNU Lesser General Public
21 * License along with this library; if not, see <http://www.gnu.org/licenses/>
23 * Contributions after 2012-01-13 are licensed under the terms of the
24 * GNU GPL, version 2 or (at your option) any later version.
27 #include "hw/acpi/pcihp.h"
30 #include "hw/i386/pc.h"
31 #include "hw/pci/pci.h"
32 #include "hw/acpi/acpi.h"
33 #include "sysemu/sysemu.h"
34 #include "qemu/range.h"
35 #include "exec/ioport.h"
36 #include "exec/address-spaces.h"
37 #include "hw/pci/pci_bus.h"
38 #include "qom/qom-qobject.h"
39 #include "qapi/qmp/qint.h"
44 # define ACPI_PCIHP_DPRINTF(format, ...) printf(format, ## __VA_ARGS__)
46 # define ACPI_PCIHP_DPRINTF(format, ...) do { } while (0)
49 #define PCI_HOTPLUG_ADDR 0xae00
50 #define PCI_HOTPLUG_SIZE 0x0014
51 #define PCI_UP_BASE 0x0000
52 #define PCI_DOWN_BASE 0x0004
53 #define PCI_EJ_BASE 0x0008
54 #define PCI_RMV_BASE 0x000c
55 #define PCI_SEL_BASE 0x0010
57 typedef struct AcpiPciHpFind
{
62 static int acpi_pcihp_get_bsel(PCIBus
*bus
)
64 QObject
*o
= object_property_get_qobject(OBJECT(bus
),
65 ACPI_PCIHP_PROP_BSEL
, NULL
);
68 bsel
= qint_get_int(qobject_to_qint(o
));
76 static void acpi_pcihp_test_hotplug_bus(PCIBus
*bus
, void *opaque
)
78 AcpiPciHpFind
*find
= opaque
;
79 if (find
->bsel
== acpi_pcihp_get_bsel(bus
)) {
84 static PCIBus
*acpi_pcihp_find_hotplug_bus(AcpiPciHpState
*s
, int bsel
)
86 AcpiPciHpFind find
= { .bsel
= bsel
, .bus
= NULL
};
92 pci_for_each_bus(s
->root
, acpi_pcihp_test_hotplug_bus
, &find
);
94 /* Make bsel 0 eject root bus if bsel property is not set,
95 * for compatibility with non acpi setups.
96 * TODO: really needed?
98 if (!bsel
&& !find
.bus
) {
104 static bool acpi_pcihp_pc_no_hotplug(AcpiPciHpState
*s
, PCIDevice
*dev
)
106 PCIDeviceClass
*pc
= PCI_DEVICE_GET_CLASS(dev
);
108 * ACPI doesn't allow hotplug of bridge devices. Don't allow
109 * hot-unplug of bridge devices unless they were added by hotplug
110 * (and so, not described by acpi).
112 return (pc
->is_bridge
&& !dev
->qdev
.hotplugged
) || pc
->no_hotplug
;
115 static void acpi_pcihp_eject_slot(AcpiPciHpState
*s
, unsigned bsel
, unsigned slots
)
117 BusChild
*kid
, *next
;
118 int slot
= ffs(slots
) - 1;
119 PCIBus
*bus
= acpi_pcihp_find_hotplug_bus(s
, bsel
);
125 /* Mark request as complete */
126 s
->acpi_pcihp_pci_status
[bsel
].down
&= ~(1U << slot
);
127 s
->acpi_pcihp_pci_status
[bsel
].up
&= ~(1U << slot
);
129 QTAILQ_FOREACH_SAFE(kid
, &bus
->qbus
.children
, sibling
, next
) {
130 DeviceState
*qdev
= kid
->child
;
131 PCIDevice
*dev
= PCI_DEVICE(qdev
);
132 if (PCI_SLOT(dev
->devfn
) == slot
) {
133 if (!acpi_pcihp_pc_no_hotplug(s
, dev
)) {
134 object_unparent(OBJECT(qdev
));
140 static void acpi_pcihp_update_hotplug_bus(AcpiPciHpState
*s
, int bsel
)
142 BusChild
*kid
, *next
;
143 PCIBus
*bus
= acpi_pcihp_find_hotplug_bus(s
, bsel
);
145 /* Execute any pending removes during reset */
146 while (s
->acpi_pcihp_pci_status
[bsel
].down
) {
147 acpi_pcihp_eject_slot(s
, bsel
, s
->acpi_pcihp_pci_status
[bsel
].down
);
150 s
->acpi_pcihp_pci_status
[bsel
].hotplug_enable
= ~0;
155 QTAILQ_FOREACH_SAFE(kid
, &bus
->qbus
.children
, sibling
, next
) {
156 DeviceState
*qdev
= kid
->child
;
157 PCIDevice
*pdev
= PCI_DEVICE(qdev
);
158 int slot
= PCI_SLOT(pdev
->devfn
);
160 if (acpi_pcihp_pc_no_hotplug(s
, pdev
)) {
161 s
->acpi_pcihp_pci_status
[bsel
].hotplug_enable
&= ~(1U << slot
);
166 static void acpi_pcihp_update(AcpiPciHpState
*s
)
170 for (i
= 0; i
< ACPI_PCIHP_MAX_HOTPLUG_BUS
; ++i
) {
171 acpi_pcihp_update_hotplug_bus(s
, i
);
175 void acpi_pcihp_reset(AcpiPciHpState
*s
)
177 acpi_pcihp_update(s
);
180 int acpi_pcihp_device_hotplug(AcpiPciHpState
*s
, PCIDevice
*dev
,
181 PCIHotplugState state
)
183 int slot
= PCI_SLOT(dev
->devfn
);
184 int bsel
= acpi_pcihp_get_bsel(dev
->bus
);
189 /* Don't send event when device is enabled during qemu machine creation:
190 * it is present on boot, no hotplug event is necessary. We do send an
191 * event when the device is disabled later. */
192 if (state
== PCI_COLDPLUG_ENABLED
) {
196 if (state
== PCI_HOTPLUG_ENABLED
) {
197 s
->acpi_pcihp_pci_status
[bsel
].up
|= (1U << slot
);
199 s
->acpi_pcihp_pci_status
[bsel
].down
|= (1U << slot
);
205 static uint64_t pci_read(void *opaque
, hwaddr addr
, unsigned int size
)
207 AcpiPciHpState
*s
= opaque
;
209 int bsel
= s
->hotplug_select
;
211 if (bsel
< 0 || bsel
> ACPI_PCIHP_MAX_HOTPLUG_BUS
) {
217 val
= s
->acpi_pcihp_pci_status
[bsel
].up
;
218 if (!s
->legacy_piix
) {
219 s
->acpi_pcihp_pci_status
[bsel
].up
= 0;
221 ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32
"\n", val
);
224 val
= s
->acpi_pcihp_pci_status
[bsel
].down
;
225 ACPI_PCIHP_DPRINTF("pci_down_read %" PRIu32
"\n", val
);
228 /* No feature defined yet */
229 ACPI_PCIHP_DPRINTF("pci_features_read %" PRIu32
"\n", val
);
232 val
= s
->acpi_pcihp_pci_status
[bsel
].hotplug_enable
;
233 ACPI_PCIHP_DPRINTF("pci_rmv_read %" PRIu32
"\n", val
);
236 val
= s
->hotplug_select
;
237 ACPI_PCIHP_DPRINTF("pci_sel_read %" PRIu32
"\n", val
);
245 static void pci_write(void *opaque
, hwaddr addr
, uint64_t data
,
248 AcpiPciHpState
*s
= opaque
;
251 if (s
->hotplug_select
>= ACPI_PCIHP_MAX_HOTPLUG_BUS
) {
254 acpi_pcihp_eject_slot(s
, s
->hotplug_select
, data
);
255 ACPI_PCIHP_DPRINTF("pciej write %" HWADDR_PRIx
" <== %" PRIu64
"\n",
259 s
->hotplug_select
= data
;
260 ACPI_PCIHP_DPRINTF("pcisel write %" HWADDR_PRIx
" <== %" PRIu64
"\n",
267 static const MemoryRegionOps acpi_pcihp_io_ops
= {
270 .endianness
= DEVICE_LITTLE_ENDIAN
,
272 .min_access_size
= 4,
273 .max_access_size
= 4,
277 void acpi_pcihp_init(AcpiPciHpState
*s
, PCIBus
*root_bus
,
278 MemoryRegion
*address_space_io
, bool bridges_enabled
)
281 s
->legacy_piix
= !bridges_enabled
;
282 memory_region_init_io(&s
->io
, NULL
, &acpi_pcihp_io_ops
, s
,
285 memory_region_add_subregion(address_space_io
, PCI_HOTPLUG_ADDR
, &s
->io
);
288 const VMStateDescription vmstate_acpi_pcihp_pci_status
= {
289 .name
= "acpi_pcihp_pci_status",
291 .minimum_version_id
= 1,
292 .minimum_version_id_old
= 1,
293 .fields
= (VMStateField
[]) {
294 VMSTATE_UINT32(up
, AcpiPciHpPciStatus
),
295 VMSTATE_UINT32(down
, AcpiPciHpPciStatus
),
296 VMSTATE_END_OF_LIST()