target-mips: fix MADD and MSUB/MSUBU instructions
[qemu.git] / hw / mips.h
blob5fd72bb0260d434af9244b5057ec83fdec45c69c
1 #ifndef HW_MIPS_H
2 #define HW_MIPS_H
3 /* Definitions for mips board emulation. */
5 /* gt64xxx.c */
6 PCIBus *pci_gt64120_init(qemu_irq *pic);
8 /* ds1225y.c */
9 void *ds1225y_init(target_phys_addr_t mem_base, const char *filename);
10 void ds1225y_set_protection(void *opaque, int protection);
12 /* g364fb.c */
13 int g364fb_mm_init(target_phys_addr_t vram_base,
14 target_phys_addr_t ctrl_base, int it_shift,
15 qemu_irq irq);
17 /* mipsnet.c */
18 void mipsnet_init(int base, qemu_irq irq, NICInfo *nd);
20 /* jazz_led.c */
21 extern void jazz_led_init(target_phys_addr_t base);
23 /* mips_int.c */
24 extern void cpu_mips_irq_init_cpu(CPUState *env);
26 /* mips_timer.c */
27 extern void cpu_mips_clock_init(CPUState *);
29 /* rc4030.c */
30 typedef struct rc4030DMAState *rc4030_dma;
31 void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write);
32 void rc4030_dma_read(void *dma, uint8_t *buf, int len);
33 void rc4030_dma_write(void *dma, uint8_t *buf, int len);
35 void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus,
36 qemu_irq **irqs, rc4030_dma **dmas);
38 /* dp8393x.c */
39 void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift,
40 qemu_irq irq, void* mem_opaque,
41 void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write));
43 #endif