2 * Virtual hardware watchdog.
4 * Copyright (C) 2009 Red Hat Inc.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
19 * By Richard W.M. Jones (rjones@redhat.com).
24 #include "qemu-common.h"
25 #include "qemu-timer.h"
30 /*#define I6300ESB_DEBUG 1*/
33 #define i6300esb_debug(fs,...) \
34 fprintf(stderr,"i6300esb: %s: "fs,__func__,##__VA_ARGS__)
36 #define i6300esb_debug(fs,...)
39 #ifndef PCI_DEVICE_ID_INTEL_ESB_9
40 #define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab
43 /* PCI configuration registers */
44 #define ESB_CONFIG_REG 0x60 /* Config register */
45 #define ESB_LOCK_REG 0x68 /* WDT lock register */
47 /* Memory mapped registers (offset from base address) */
48 #define ESB_TIMER1_REG 0x00 /* Timer1 value after each reset */
49 #define ESB_TIMER2_REG 0x04 /* Timer2 value after each reset */
50 #define ESB_GINTSR_REG 0x08 /* General Interrupt Status Register */
51 #define ESB_RELOAD_REG 0x0c /* Reload register */
53 /* Lock register bits */
54 #define ESB_WDT_FUNC (0x01 << 2) /* Watchdog functionality */
55 #define ESB_WDT_ENABLE (0x01 << 1) /* Enable WDT */
56 #define ESB_WDT_LOCK (0x01 << 0) /* Lock (nowayout) */
58 /* Config register bits */
59 #define ESB_WDT_REBOOT (0x01 << 5) /* Enable reboot on timeout */
60 #define ESB_WDT_FREQ (0x01 << 2) /* Decrement frequency */
61 #define ESB_WDT_INTTYPE (0x11 << 0) /* Interrupt type on timer1 timeout */
63 /* Reload register bits */
64 #define ESB_WDT_RELOAD (0x01 << 8) /* prevent timeout */
67 #define ESB_UNLOCK1 0x80 /* Step 1 to unlock reset registers */
68 #define ESB_UNLOCK2 0x86 /* Step 2 to unlock reset registers */
74 int reboot_enabled
; /* "Reboot" on timer expiry. The real action
75 * performed depends on the -watchdog-action
76 * param passed on QEMU command line.
78 int clock_scale
; /* Clock scale. */
79 #define CLOCK_SCALE_1KHZ 0
80 #define CLOCK_SCALE_1MHZ 1
82 int int_type
; /* Interrupt type generated. */
83 #define INT_TYPE_IRQ 0 /* APIC 1, INT 10 */
84 #define INT_TYPE_SMI 2
85 #define INT_TYPE_DISABLED 3
87 int free_run
; /* If true, reload timer on expiry. */
88 int locked
; /* If true, enabled field cannot be changed. */
89 int enabled
; /* If true, watchdog is enabled. */
91 QEMUTimer
*timer
; /* The actual watchdog timer. */
93 uint32_t timer1_preload
; /* Values preloaded into timer1, timer2. */
94 uint32_t timer2_preload
;
95 int stage
; /* Stage (1 or 2). */
97 int unlock_state
; /* Guest writes 0x80, 0x86 to unlock the
98 * registers, and we transition through
99 * states 0 -> 1 -> 2 when this happens.
102 int previous_reboot_flag
; /* If the watchdog caused the previous
103 * reboot, this flag will be set.
107 typedef struct I6300State I6300State
;
109 /* This function is called when the watchdog has either been enabled
110 * (hence it starts counting down) or has been keep-alived.
112 static void i6300esb_restart_timer(I6300State
*d
, int stage
)
122 timeout
= d
->timer1_preload
;
124 timeout
= d
->timer2_preload
;
126 if (d
->clock_scale
== CLOCK_SCALE_1KHZ
)
131 /* Get the timeout in units of ticks_per_sec. */
132 timeout
= get_ticks_per_sec() * timeout
/ 33000000;
134 i6300esb_debug("stage %d, timeout %" PRIi64
"\n", d
->stage
, timeout
);
136 qemu_mod_timer(d
->timer
, qemu_get_clock(vm_clock
) + timeout
);
139 /* This is called when the guest disables the watchdog. */
140 static void i6300esb_disable_timer(I6300State
*d
)
142 i6300esb_debug("timer disabled\n");
144 qemu_del_timer(d
->timer
);
147 static void i6300esb_reset(I6300State
*d
)
149 /* XXX We should probably reset other parts of the state here,
150 * but we should also reset our state on general machine reset
151 * too. For now just disable the timer so it doesn't fire
152 * again after the reboot.
154 i6300esb_disable_timer(d
);
157 /* This function is called when the watchdog expires. Note that
158 * the hardware has two timers, and so expiry happens in two stages.
159 * If d->stage == 1 then we perform the first stage action (usually,
160 * sending an interrupt) and then restart the timer again for the
161 * second stage. If the second stage expires then the watchdog
162 * really has run out.
164 static void i6300esb_timer_expired(void *vp
)
166 I6300State
*d
= (I6300State
*) vp
;
168 i6300esb_debug("stage %d\n", d
->stage
);
171 /* What to do at the end of stage 1? */
172 switch (d
->int_type
) {
174 fprintf(stderr
, "i6300esb_timer_expired: I would send APIC 1 INT 10 here if I knew how (XXX)\n");
177 fprintf(stderr
, "i6300esb_timer_expired: I would send SMI here if I knew how (XXX)\n");
181 /* Start the second stage. */
182 i6300esb_restart_timer(d
, 2);
184 /* Second stage expired, reboot for real. */
185 if (d
->reboot_enabled
) {
186 d
->previous_reboot_flag
= 1;
187 watchdog_perform_action(); /* This reboots, exits, etc */
191 /* In "free running mode" we start stage 1 again. */
193 i6300esb_restart_timer(d
, 1);
197 static void i6300esb_config_write(PCIDevice
*dev
, uint32_t addr
,
198 uint32_t data
, int len
)
200 I6300State
*d
= DO_UPCAST(I6300State
, dev
, dev
);
203 i6300esb_debug("addr = %x, data = %x, len = %d\n", addr
, data
, len
);
205 if (addr
== ESB_CONFIG_REG
&& len
== 2) {
206 d
->reboot_enabled
= (data
& ESB_WDT_REBOOT
) == 0;
208 (data
& ESB_WDT_FREQ
) != 0 ? CLOCK_SCALE_1MHZ
: CLOCK_SCALE_1KHZ
;
209 d
->int_type
= (data
& ESB_WDT_INTTYPE
);
210 } else if (addr
== ESB_LOCK_REG
&& len
== 1) {
212 d
->locked
= (data
& ESB_WDT_LOCK
) != 0;
213 d
->free_run
= (data
& ESB_WDT_FUNC
) != 0;
215 d
->enabled
= (data
& ESB_WDT_ENABLE
) != 0;
216 if (!old
&& d
->enabled
) /* Enabled transitioned from 0 -> 1 */
217 i6300esb_restart_timer(d
, 1);
218 else if (!d
->enabled
)
219 i6300esb_disable_timer(d
);
222 pci_default_write_config(dev
, addr
, data
, len
);
226 static uint32_t i6300esb_config_read(PCIDevice
*dev
, uint32_t addr
, int len
)
228 I6300State
*d
= DO_UPCAST(I6300State
, dev
, dev
);
231 i6300esb_debug ("addr = %x, len = %d\n", addr
, len
);
233 if (addr
== ESB_CONFIG_REG
&& len
== 2) {
235 (d
->reboot_enabled
? 0 : ESB_WDT_REBOOT
) |
236 (d
->clock_scale
== CLOCK_SCALE_1MHZ
? ESB_WDT_FREQ
: 0) |
239 } else if (addr
== ESB_LOCK_REG
&& len
== 1) {
241 (d
->free_run
? ESB_WDT_FUNC
: 0) |
242 (d
->locked
? ESB_WDT_LOCK
: 0) |
243 (d
->enabled
? ESB_WDT_ENABLE
: 0);
246 return pci_default_read_config(dev
, addr
, len
);
250 static uint32_t i6300esb_mem_readb(void *vp
, target_phys_addr_t addr
)
252 i6300esb_debug ("addr = %x\n", (int) addr
);
257 static uint32_t i6300esb_mem_readw(void *vp
, target_phys_addr_t addr
)
260 I6300State
*d
= (I6300State
*) vp
;
262 i6300esb_debug("addr = %x\n", (int) addr
);
265 /* The previous reboot flag is really bit 9, but there is
266 * a bug in the Linux driver where it thinks it's bit 12.
269 data
= d
->previous_reboot_flag
? 0x1200 : 0;
275 static uint32_t i6300esb_mem_readl(void *vp
, target_phys_addr_t addr
)
277 i6300esb_debug("addr = %x\n", (int) addr
);
282 static void i6300esb_mem_writeb(void *vp
, target_phys_addr_t addr
, uint32_t val
)
284 I6300State
*d
= (I6300State
*) vp
;
286 i6300esb_debug("addr = %x, val = %x\n", (int) addr
, val
);
288 if (addr
== 0xc && val
== 0x80)
290 else if (addr
== 0xc && val
== 0x86 && d
->unlock_state
== 1)
294 static void i6300esb_mem_writew(void *vp
, target_phys_addr_t addr
, uint32_t val
)
296 I6300State
*d
= (I6300State
*) vp
;
298 i6300esb_debug("addr = %x, val = %x\n", (int) addr
, val
);
300 if (addr
== 0xc && val
== 0x80)
302 else if (addr
== 0xc && val
== 0x86 && d
->unlock_state
== 1)
305 if (d
->unlock_state
== 2) {
307 if ((val
& 0x100) != 0)
308 /* This is the "ping" from the userspace watchdog in
311 i6300esb_restart_timer(d
, 1);
313 /* Setting bit 9 resets the previous reboot flag.
314 * There's a bug in the Linux driver where it sets
317 if ((val
& 0x200) != 0 || (val
& 0x1000) != 0) {
318 d
->previous_reboot_flag
= 0;
327 static void i6300esb_mem_writel(void *vp
, target_phys_addr_t addr
, uint32_t val
)
329 I6300State
*d
= (I6300State
*) vp
;
331 i6300esb_debug ("addr = %x, val = %x\n", (int) addr
, val
);
333 if (addr
== 0xc && val
== 0x80)
335 else if (addr
== 0xc && val
== 0x86 && d
->unlock_state
== 1)
338 if (d
->unlock_state
== 2) {
340 d
->timer1_preload
= val
& 0xfffff;
342 d
->timer2_preload
= val
& 0xfffff;
349 static void i6300esb_map(PCIDevice
*dev
, int region_num
,
350 uint32_t addr
, uint32_t size
, int type
)
352 static CPUReadMemoryFunc
* const mem_read
[3] = {
357 static CPUWriteMemoryFunc
* const mem_write
[3] = {
362 I6300State
*d
= DO_UPCAST(I6300State
, dev
, dev
);
365 i6300esb_debug("addr = %x, size = %x, type = %d\n", addr
, size
, type
);
367 io_mem
= cpu_register_io_memory(mem_read
, mem_write
, d
);
368 cpu_register_physical_memory (addr
, 0x10, io_mem
);
369 /* qemu_register_coalesced_mmio (addr, 0x10); ? */
372 static void i6300esb_save(QEMUFile
*f
, void *vp
)
374 I6300State
*d
= (I6300State
*) vp
;
376 pci_device_save(&d
->dev
, f
);
377 qemu_put_be32(f
, d
->reboot_enabled
);
378 qemu_put_be32(f
, d
->clock_scale
);
379 qemu_put_be32(f
, d
->int_type
);
380 qemu_put_be32(f
, d
->free_run
);
381 qemu_put_be32(f
, d
->locked
);
382 qemu_put_be32(f
, d
->enabled
);
383 qemu_put_timer(f
, d
->timer
);
384 qemu_put_be32(f
, d
->timer1_preload
);
385 qemu_put_be32(f
, d
->timer2_preload
);
386 qemu_put_be32(f
, d
->stage
);
387 qemu_put_be32(f
, d
->unlock_state
);
388 qemu_put_be32(f
, d
->previous_reboot_flag
);
391 static int i6300esb_load(QEMUFile
*f
, void *vp
, int version
)
393 I6300State
*d
= (I6300State
*) vp
;
395 if (version
!= sizeof (I6300State
))
398 pci_device_load(&d
->dev
, f
);
399 d
->reboot_enabled
= qemu_get_be32(f
);
400 d
->clock_scale
= qemu_get_be32(f
);
401 d
->int_type
= qemu_get_be32(f
);
402 d
->free_run
= qemu_get_be32(f
);
403 d
->locked
= qemu_get_be32(f
);
404 d
->enabled
= qemu_get_be32(f
);
405 qemu_get_timer(f
, d
->timer
);
406 d
->timer1_preload
= qemu_get_be32(f
);
407 d
->timer2_preload
= qemu_get_be32(f
);
408 d
->stage
= qemu_get_be32(f
);
409 d
->unlock_state
= qemu_get_be32(f
);
410 d
->previous_reboot_flag
= qemu_get_be32(f
);
415 static int i6300esb_init(PCIDevice
*dev
)
417 I6300State
*d
= DO_UPCAST(I6300State
, dev
, dev
);
420 d
->reboot_enabled
= 1;
421 d
->clock_scale
= CLOCK_SCALE_1KHZ
;
422 d
->int_type
= INT_TYPE_IRQ
;
426 d
->timer
= qemu_new_timer(vm_clock
, i6300esb_timer_expired
, d
);
427 d
->timer1_preload
= 0xfffff;
428 d
->timer2_preload
= 0xfffff;
431 d
->previous_reboot_flag
= 0;
433 pci_conf
= d
->dev
.config
;
434 pci_config_set_vendor_id(pci_conf
, PCI_VENDOR_ID_INTEL
);
435 pci_config_set_device_id(pci_conf
, PCI_DEVICE_ID_INTEL_ESB_9
);
436 pci_config_set_class(pci_conf
, PCI_CLASS_SYSTEM_OTHER
);
437 pci_conf
[0x0e] = 0x00;
439 pci_register_bar(&d
->dev
, 0, 0x10,
440 PCI_ADDRESS_SPACE_MEM
, i6300esb_map
);
442 register_savevm("i6300esb_wdt", -1, sizeof(I6300State
),
443 i6300esb_save
, i6300esb_load
, d
);
448 static WatchdogTimerModel model
= {
449 .wdt_name
= "i6300esb",
450 .wdt_description
= "Intel 6300ESB",
453 static PCIDeviceInfo i6300esb_info
= {
454 .qdev
.name
= "i6300esb",
455 .qdev
.size
= sizeof(I6300State
),
456 .config_read
= i6300esb_config_read
,
457 .config_write
= i6300esb_config_write
,
458 .init
= i6300esb_init
,
461 static void i6300esb_register_devices(void)
463 watchdog_add_model(&model
);
464 pci_qdev_register(&i6300esb_info
);
467 device_init(i6300esb_register_devices
);