s390x/cpu: Add error handling to cpu creation
[qemu.git] / hw / i2c / smbus.c
blob3979b3dad71868cf62a478566f58c2980d61dec4
1 /*
2 * QEMU SMBus device emulation.
4 * Copyright (c) 2007 CodeSourcery.
5 * Written by Paul Brook
7 * This code is licensed under the LGPL.
8 */
10 /* TODO: Implement PEC. */
12 #include "qemu/osdep.h"
13 #include "hw/hw.h"
14 #include "hw/i2c/i2c.h"
15 #include "hw/i2c/smbus.h"
17 //#define DEBUG_SMBUS 1
19 #ifdef DEBUG_SMBUS
20 #define DPRINTF(fmt, ...) \
21 do { printf("smbus(%02x): " fmt , dev->i2c.address, ## __VA_ARGS__); } while (0)
22 #define BADF(fmt, ...) \
23 do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
24 #else
25 #define DPRINTF(fmt, ...) do {} while(0)
26 #define BADF(fmt, ...) \
27 do { fprintf(stderr, "smbus: error: " fmt , ## __VA_ARGS__);} while (0)
28 #endif
30 enum {
31 SMBUS_IDLE,
32 SMBUS_WRITE_DATA,
33 SMBUS_RECV_BYTE,
34 SMBUS_READ_DATA,
35 SMBUS_DONE,
36 SMBUS_CONFUSED = -1
39 static void smbus_do_quick_cmd(SMBusDevice *dev, int recv)
41 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
43 DPRINTF("Quick Command %d\n", recv);
44 if (sc->quick_cmd) {
45 sc->quick_cmd(dev, recv);
49 static void smbus_do_write(SMBusDevice *dev)
51 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
53 if (dev->data_len == 0) {
54 smbus_do_quick_cmd(dev, 0);
55 } else if (dev->data_len == 1) {
56 DPRINTF("Send Byte\n");
57 if (sc->send_byte) {
58 sc->send_byte(dev, dev->data_buf[0]);
60 } else {
61 dev->command = dev->data_buf[0];
62 DPRINTF("Command %d len %d\n", dev->command, dev->data_len - 1);
63 if (sc->write_data) {
64 sc->write_data(dev, dev->command, dev->data_buf + 1,
65 dev->data_len - 1);
70 static void smbus_i2c_event(I2CSlave *s, enum i2c_event event)
72 SMBusDevice *dev = SMBUS_DEVICE(s);
74 switch (event) {
75 case I2C_START_SEND:
76 switch (dev->mode) {
77 case SMBUS_IDLE:
78 DPRINTF("Incoming data\n");
79 dev->mode = SMBUS_WRITE_DATA;
80 break;
81 default:
82 BADF("Unexpected send start condition in state %d\n", dev->mode);
83 dev->mode = SMBUS_CONFUSED;
84 break;
86 break;
88 case I2C_START_RECV:
89 switch (dev->mode) {
90 case SMBUS_IDLE:
91 DPRINTF("Read mode\n");
92 dev->mode = SMBUS_RECV_BYTE;
93 break;
94 case SMBUS_WRITE_DATA:
95 if (dev->data_len == 0) {
96 BADF("Read after write with no data\n");
97 dev->mode = SMBUS_CONFUSED;
98 } else {
99 if (dev->data_len > 1) {
100 smbus_do_write(dev);
101 } else {
102 dev->command = dev->data_buf[0];
103 DPRINTF("%02x: Command %d\n", dev->i2c.address,
104 dev->command);
106 DPRINTF("Read mode\n");
107 dev->data_len = 0;
108 dev->mode = SMBUS_READ_DATA;
110 break;
111 default:
112 BADF("Unexpected recv start condition in state %d\n", dev->mode);
113 dev->mode = SMBUS_CONFUSED;
114 break;
116 break;
118 case I2C_FINISH:
119 switch (dev->mode) {
120 case SMBUS_WRITE_DATA:
121 smbus_do_write(dev);
122 break;
123 case SMBUS_RECV_BYTE:
124 smbus_do_quick_cmd(dev, 1);
125 break;
126 case SMBUS_READ_DATA:
127 BADF("Unexpected stop during receive\n");
128 break;
129 default:
130 /* Nothing to do. */
131 break;
133 dev->mode = SMBUS_IDLE;
134 dev->data_len = 0;
135 break;
137 case I2C_NACK:
138 switch (dev->mode) {
139 case SMBUS_DONE:
140 /* Nothing to do. */
141 break;
142 case SMBUS_READ_DATA:
143 dev->mode = SMBUS_DONE;
144 break;
145 default:
146 BADF("Unexpected NACK in state %d\n", dev->mode);
147 dev->mode = SMBUS_CONFUSED;
148 break;
153 static int smbus_i2c_recv(I2CSlave *s)
155 SMBusDevice *dev = SMBUS_DEVICE(s);
156 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
157 int ret;
159 switch (dev->mode) {
160 case SMBUS_RECV_BYTE:
161 if (sc->receive_byte) {
162 ret = sc->receive_byte(dev);
163 } else {
164 ret = 0;
166 DPRINTF("Receive Byte %02x\n", ret);
167 dev->mode = SMBUS_DONE;
168 break;
169 case SMBUS_READ_DATA:
170 if (sc->read_data) {
171 ret = sc->read_data(dev, dev->command, dev->data_len);
172 dev->data_len++;
173 } else {
174 ret = 0;
176 DPRINTF("Read data %02x\n", ret);
177 break;
178 default:
179 BADF("Unexpected read in state %d\n", dev->mode);
180 dev->mode = SMBUS_CONFUSED;
181 ret = 0;
182 break;
184 return ret;
187 static int smbus_i2c_send(I2CSlave *s, uint8_t data)
189 SMBusDevice *dev = SMBUS_DEVICE(s);
191 switch (dev->mode) {
192 case SMBUS_WRITE_DATA:
193 DPRINTF("Write data %02x\n", data);
194 dev->data_buf[dev->data_len++] = data;
195 break;
196 default:
197 BADF("Unexpected write in state %d\n", dev->mode);
198 break;
200 return 0;
203 static int smbus_device_init(I2CSlave *i2c)
205 SMBusDevice *dev = SMBUS_DEVICE(i2c);
206 SMBusDeviceClass *sc = SMBUS_DEVICE_GET_CLASS(dev);
208 return sc->init(dev);
211 /* Master device commands. */
212 int smbus_quick_command(I2CBus *bus, uint8_t addr, int read)
214 if (i2c_start_transfer(bus, addr, read)) {
215 return -1;
217 i2c_end_transfer(bus);
218 return 0;
221 int smbus_receive_byte(I2CBus *bus, uint8_t addr)
223 uint8_t data;
225 if (i2c_start_transfer(bus, addr, 1)) {
226 return -1;
228 data = i2c_recv(bus);
229 i2c_nack(bus);
230 i2c_end_transfer(bus);
231 return data;
234 int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data)
236 if (i2c_start_transfer(bus, addr, 0)) {
237 return -1;
239 i2c_send(bus, data);
240 i2c_end_transfer(bus);
241 return 0;
244 int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command)
246 uint8_t data;
247 if (i2c_start_transfer(bus, addr, 0)) {
248 return -1;
250 i2c_send(bus, command);
251 i2c_start_transfer(bus, addr, 1);
252 data = i2c_recv(bus);
253 i2c_nack(bus);
254 i2c_end_transfer(bus);
255 return data;
258 int smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data)
260 if (i2c_start_transfer(bus, addr, 0)) {
261 return -1;
263 i2c_send(bus, command);
264 i2c_send(bus, data);
265 i2c_end_transfer(bus);
266 return 0;
269 int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command)
271 uint16_t data;
272 if (i2c_start_transfer(bus, addr, 0)) {
273 return -1;
275 i2c_send(bus, command);
276 i2c_start_transfer(bus, addr, 1);
277 data = i2c_recv(bus);
278 data |= i2c_recv(bus) << 8;
279 i2c_nack(bus);
280 i2c_end_transfer(bus);
281 return data;
284 int smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data)
286 if (i2c_start_transfer(bus, addr, 0)) {
287 return -1;
289 i2c_send(bus, command);
290 i2c_send(bus, data & 0xff);
291 i2c_send(bus, data >> 8);
292 i2c_end_transfer(bus);
293 return 0;
296 int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data)
298 int len;
299 int i;
301 if (i2c_start_transfer(bus, addr, 0)) {
302 return -1;
304 i2c_send(bus, command);
305 i2c_start_transfer(bus, addr, 1);
306 len = i2c_recv(bus);
307 if (len > 32) {
308 len = 0;
310 for (i = 0; i < len; i++) {
311 data[i] = i2c_recv(bus);
313 i2c_nack(bus);
314 i2c_end_transfer(bus);
315 return len;
318 int smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
319 int len)
321 int i;
323 if (len > 32)
324 len = 32;
326 if (i2c_start_transfer(bus, addr, 0)) {
327 return -1;
329 i2c_send(bus, command);
330 i2c_send(bus, len);
331 for (i = 0; i < len; i++) {
332 i2c_send(bus, data[i]);
334 i2c_end_transfer(bus);
335 return 0;
338 static void smbus_device_class_init(ObjectClass *klass, void *data)
340 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
342 sc->init = smbus_device_init;
343 sc->event = smbus_i2c_event;
344 sc->recv = smbus_i2c_recv;
345 sc->send = smbus_i2c_send;
348 static const TypeInfo smbus_device_type_info = {
349 .name = TYPE_SMBUS_DEVICE,
350 .parent = TYPE_I2C_SLAVE,
351 .instance_size = sizeof(SMBusDevice),
352 .abstract = true,
353 .class_size = sizeof(SMBusDeviceClass),
354 .class_init = smbus_device_class_init,
357 static void smbus_device_register_types(void)
359 type_register_static(&smbus_device_type_info);
362 type_init(smbus_device_register_types)