include/hw/ssi/aspeed_smc.h

   1 /*
   2  * ASPEED AST2400 SMC Controller (SPI Flash Only)
   3  *
   4  * Copyright (C) 2016 IBM Corp.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a copy
   7  * of this software and associated documentation files (the "Software"), to deal
   8  * in the Software without restriction, including without limitation the rights
   9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  10  * copies of the Software, and to permit persons to whom the Software is
  11  * furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  22  * THE SOFTWARE.
  23  */
  24
  25 #ifndef ASPEED_SMC_H
  26 #define ASPEED_SMC_H
  27
  28 #include "hw/ssi/ssi.h"
  29
  30 typedef struct AspeedSegments {
  31     hwaddr addr;
  32     uint32_t size;
  33 } AspeedSegments;
  34
  35 struct AspeedSMCState;
  36 typedef struct AspeedSMCController {
  37     const char *name;
  38     uint8_t r_conf;
  39     uint8_t r_ce_ctrl;
  40     uint8_t r_ctrl0;
  41     uint8_t r_timings;
  42     uint8_t conf_enable_w0;
  43     uint8_t max_slaves;
  44     const AspeedSegments *segments;
  45     uint32_t mapping_window_size;
  46 } AspeedSMCController;
  47
  48 typedef struct AspeedSMCFlash {
  49     const struct AspeedSMCState *controller;
  50
  51     uint8_t id;
  52     uint32_t size;
  53
  54     MemoryRegion mmio;
  55     DeviceState *flash;
  56 } AspeedSMCFlash;
  57
  58 #define TYPE_ASPEED_SMC "aspeed.smc"
  59 #define ASPEED_SMC(obj) OBJECT_CHECK(AspeedSMCState, (obj), TYPE_ASPEED_SMC)
  60 #define ASPEED_SMC_CLASS(klass) \
  61      OBJECT_CLASS_CHECK(AspeedSMCClass, (klass), TYPE_ASPEED_SMC)
  62 #define ASPEED_SMC_GET_CLASS(obj) \
  63      OBJECT_GET_CLASS(AspeedSMCClass, (obj), TYPE_ASPEED_SMC)
  64
  65 typedef struct  AspeedSMCClass {
  66     SysBusDevice parent_obj;
  67     const AspeedSMCController *ctrl;
  68 }  AspeedSMCClass;
  69
  70 #define ASPEED_SMC_R_MAX        (0x100 / 4)
  71
  72 typedef struct AspeedSMCState {
  73     SysBusDevice parent_obj;
  74
  75     const AspeedSMCController *ctrl;
  76
  77     MemoryRegion mmio;
  78     MemoryRegion mmio_flash;
  79
  80     qemu_irq irq;
  81     int irqline;
  82
  83     uint32_t num_cs;
  84     qemu_irq *cs_lines;
  85
  86     SSIBus *spi;
  87
  88     uint32_t regs[ASPEED_SMC_R_MAX];
  89
  90     /* depends on the controller type */
  91     uint8_t r_conf;
  92     uint8_t r_ce_ctrl;
  93     uint8_t r_ctrl0;
  94     uint8_t r_timings;
  95     uint8_t conf_enable_w0;
  96
  97     AspeedSMCFlash *flashes;
  98 } AspeedSMCState;
  99
 100 #endif /* ASPEED_SMC_H */