4 * Copyright (c) 2003-2008 Fabrice Bellard
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
26 #include <sys/syscall.h>
29 #include "qemu-common.h"
30 #include "cache-utils.h"
37 #define DEBUG_LOGFILE "/tmp/qemu.log"
42 #if defined(CONFIG_USE_GUEST_BASE)
43 unsigned long mmap_min_addr
;
44 unsigned long guest_base
;
48 static const char *interp_prefix
= CONFIG_QEMU_PREFIX
;
49 const char *qemu_uname_release
= CONFIG_UNAME_RELEASE
;
51 /* for recent libc, we add these dummy symbols which are not declared
52 when generating a linked object (bug in ld ?) */
53 #if ((__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && \
54 !defined(CONFIG_STATIC)) && !defined(CONFIG_USER_PIE)
55 asm(".globl __preinit_array_start\n"
56 ".globl __preinit_array_end\n"
57 ".globl __init_array_start\n"
58 ".globl __init_array_end\n"
59 ".globl __fini_array_start\n"
60 ".globl __fini_array_end\n"
61 ".section \".rodata\"\n"
62 "__preinit_array_start:\n"
63 "__preinit_array_end:\n"
64 "__init_array_start:\n"
66 "__fini_array_start:\n"
72 /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
73 we allocate a bigger stack. Need a better solution, for example
74 by remapping the process stack directly at the right place */
75 unsigned long x86_stack_size
= 512 * 1024;
77 void gemu_log(const char *fmt
, ...)
82 vfprintf(stderr
, fmt
, ap
);
86 #if defined(TARGET_I386)
87 int cpu_get_pic_interrupt(CPUState
*env
)
93 /* timers for rdtsc */
97 static uint64_t emu_time
;
99 int64_t cpu_get_real_ticks(void)
106 #if defined(CONFIG_USE_NPTL)
107 /***********************************************************/
108 /* Helper routines for implementing atomic operations. */
110 /* To implement exclusive operations we force all cpus to syncronise.
111 We don't require a full sync, only that no cpus are executing guest code.
112 The alternative is to map target atomic ops onto host equivalents,
113 which requires quite a lot of per host/target work. */
114 static pthread_mutex_t cpu_list_mutex
= PTHREAD_MUTEX_INITIALIZER
;
115 static pthread_mutex_t exclusive_lock
= PTHREAD_MUTEX_INITIALIZER
;
116 static pthread_cond_t exclusive_cond
= PTHREAD_COND_INITIALIZER
;
117 static pthread_cond_t exclusive_resume
= PTHREAD_COND_INITIALIZER
;
118 static int pending_cpus
;
120 /* Make sure everything is in a consistent state for calling fork(). */
121 void fork_start(void)
124 pthread_mutex_lock(&tb_lock
);
125 pthread_mutex_lock(&exclusive_lock
);
128 void fork_end(int child
)
131 /* Child processes created by fork() only have a single thread.
132 Discard information about the parent threads. */
133 first_cpu
= thread_env
;
134 thread_env
->next_cpu
= NULL
;
136 pthread_mutex_init(&exclusive_lock
, NULL
);
137 pthread_mutex_init(&cpu_list_mutex
, NULL
);
138 pthread_cond_init(&exclusive_cond
, NULL
);
139 pthread_cond_init(&exclusive_resume
, NULL
);
140 pthread_mutex_init(&tb_lock
, NULL
);
141 gdbserver_fork(thread_env
);
143 pthread_mutex_unlock(&exclusive_lock
);
144 pthread_mutex_unlock(&tb_lock
);
146 mmap_fork_end(child
);
149 /* Wait for pending exclusive operations to complete. The exclusive lock
151 static inline void exclusive_idle(void)
153 while (pending_cpus
) {
154 pthread_cond_wait(&exclusive_resume
, &exclusive_lock
);
158 /* Start an exclusive operation.
159 Must only be called from outside cpu_arm_exec. */
160 static inline void start_exclusive(void)
163 pthread_mutex_lock(&exclusive_lock
);
167 /* Make all other cpus stop executing. */
168 for (other
= first_cpu
; other
; other
= other
->next_cpu
) {
169 if (other
->running
) {
174 if (pending_cpus
> 1) {
175 pthread_cond_wait(&exclusive_cond
, &exclusive_lock
);
179 /* Finish an exclusive operation. */
180 static inline void end_exclusive(void)
183 pthread_cond_broadcast(&exclusive_resume
);
184 pthread_mutex_unlock(&exclusive_lock
);
187 /* Wait for exclusive ops to finish, and begin cpu execution. */
188 static inline void cpu_exec_start(CPUState
*env
)
190 pthread_mutex_lock(&exclusive_lock
);
193 pthread_mutex_unlock(&exclusive_lock
);
196 /* Mark cpu as not executing, and release pending exclusive ops. */
197 static inline void cpu_exec_end(CPUState
*env
)
199 pthread_mutex_lock(&exclusive_lock
);
201 if (pending_cpus
> 1) {
203 if (pending_cpus
== 1) {
204 pthread_cond_signal(&exclusive_cond
);
208 pthread_mutex_unlock(&exclusive_lock
);
211 void cpu_list_lock(void)
213 pthread_mutex_lock(&cpu_list_mutex
);
216 void cpu_list_unlock(void)
218 pthread_mutex_unlock(&cpu_list_mutex
);
220 #else /* if !CONFIG_USE_NPTL */
221 /* These are no-ops because we are not threadsafe. */
222 static inline void cpu_exec_start(CPUState
*env
)
226 static inline void cpu_exec_end(CPUState
*env
)
230 static inline void start_exclusive(void)
234 static inline void end_exclusive(void)
238 void fork_start(void)
242 void fork_end(int child
)
245 gdbserver_fork(thread_env
);
249 void cpu_list_lock(void)
253 void cpu_list_unlock(void)
260 /***********************************************************/
261 /* CPUX86 core interface */
263 void cpu_smm_update(CPUState
*env
)
267 uint64_t cpu_get_tsc(CPUX86State
*env
)
269 return cpu_get_real_ticks();
272 static void write_dt(void *ptr
, unsigned long addr
, unsigned long limit
,
277 e1
= (addr
<< 16) | (limit
& 0xffff);
278 e2
= ((addr
>> 16) & 0xff) | (addr
& 0xff000000) | (limit
& 0x000f0000);
285 static uint64_t *idt_table
;
287 static void set_gate64(void *ptr
, unsigned int type
, unsigned int dpl
,
288 uint64_t addr
, unsigned int sel
)
291 e1
= (addr
& 0xffff) | (sel
<< 16);
292 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
296 p
[2] = tswap32(addr
>> 32);
299 /* only dpl matters as we do only user space emulation */
300 static void set_idt(int n
, unsigned int dpl
)
302 set_gate64(idt_table
+ n
* 2, 0, dpl
, 0, 0);
305 static void set_gate(void *ptr
, unsigned int type
, unsigned int dpl
,
306 uint32_t addr
, unsigned int sel
)
309 e1
= (addr
& 0xffff) | (sel
<< 16);
310 e2
= (addr
& 0xffff0000) | 0x8000 | (dpl
<< 13) | (type
<< 8);
316 /* only dpl matters as we do only user space emulation */
317 static void set_idt(int n
, unsigned int dpl
)
319 set_gate(idt_table
+ n
, 0, dpl
, 0, 0);
323 void cpu_loop(CPUX86State
*env
)
327 target_siginfo_t info
;
330 trapnr
= cpu_x86_exec(env
);
333 /* linux syscall from int $0x80 */
334 env
->regs
[R_EAX
] = do_syscall(env
,
345 /* linux syscall from syscall intruction */
346 env
->regs
[R_EAX
] = do_syscall(env
,
354 env
->eip
= env
->exception_next_eip
;
359 info
.si_signo
= SIGBUS
;
361 info
.si_code
= TARGET_SI_KERNEL
;
362 info
._sifields
._sigfault
._addr
= 0;
363 queue_signal(env
, info
.si_signo
, &info
);
366 /* XXX: potential problem if ABI32 */
367 #ifndef TARGET_X86_64
368 if (env
->eflags
& VM_MASK
) {
369 handle_vm86_fault(env
);
373 info
.si_signo
= SIGSEGV
;
375 info
.si_code
= TARGET_SI_KERNEL
;
376 info
._sifields
._sigfault
._addr
= 0;
377 queue_signal(env
, info
.si_signo
, &info
);
381 info
.si_signo
= SIGSEGV
;
383 if (!(env
->error_code
& 1))
384 info
.si_code
= TARGET_SEGV_MAPERR
;
386 info
.si_code
= TARGET_SEGV_ACCERR
;
387 info
._sifields
._sigfault
._addr
= env
->cr
[2];
388 queue_signal(env
, info
.si_signo
, &info
);
391 #ifndef TARGET_X86_64
392 if (env
->eflags
& VM_MASK
) {
393 handle_vm86_trap(env
, trapnr
);
397 /* division by zero */
398 info
.si_signo
= SIGFPE
;
400 info
.si_code
= TARGET_FPE_INTDIV
;
401 info
._sifields
._sigfault
._addr
= env
->eip
;
402 queue_signal(env
, info
.si_signo
, &info
);
407 #ifndef TARGET_X86_64
408 if (env
->eflags
& VM_MASK
) {
409 handle_vm86_trap(env
, trapnr
);
413 info
.si_signo
= SIGTRAP
;
415 if (trapnr
== EXCP01_DB
) {
416 info
.si_code
= TARGET_TRAP_BRKPT
;
417 info
._sifields
._sigfault
._addr
= env
->eip
;
419 info
.si_code
= TARGET_SI_KERNEL
;
420 info
._sifields
._sigfault
._addr
= 0;
422 queue_signal(env
, info
.si_signo
, &info
);
427 #ifndef TARGET_X86_64
428 if (env
->eflags
& VM_MASK
) {
429 handle_vm86_trap(env
, trapnr
);
433 info
.si_signo
= SIGSEGV
;
435 info
.si_code
= TARGET_SI_KERNEL
;
436 info
._sifields
._sigfault
._addr
= 0;
437 queue_signal(env
, info
.si_signo
, &info
);
441 info
.si_signo
= SIGILL
;
443 info
.si_code
= TARGET_ILL_ILLOPN
;
444 info
._sifields
._sigfault
._addr
= env
->eip
;
445 queue_signal(env
, info
.si_signo
, &info
);
448 /* just indicate that signals should be handled asap */
454 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
459 info
.si_code
= TARGET_TRAP_BRKPT
;
460 queue_signal(env
, info
.si_signo
, &info
);
465 pc
= env
->segs
[R_CS
].base
+ env
->eip
;
466 fprintf(stderr
, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
470 process_pending_signals(env
);
477 static void arm_cache_flush(abi_ulong start
, abi_ulong last
)
479 abi_ulong addr
, last1
;
485 last1
= ((addr
+ TARGET_PAGE_SIZE
) & TARGET_PAGE_MASK
) - 1;
488 tb_invalidate_page_range(addr
, last1
+ 1);
495 /* Handle a jump to the kernel code page. */
497 do_kernel_trap(CPUARMState
*env
)
503 switch (env
->regs
[15]) {
504 case 0xffff0fa0: /* __kernel_memory_barrier */
505 /* ??? No-op. Will need to do better for SMP. */
507 case 0xffff0fc0: /* __kernel_cmpxchg */
508 /* XXX: This only works between threads, not between processes.
509 It's probably possible to implement this with native host
510 operations. However things like ldrex/strex are much harder so
511 there's not much point trying. */
513 cpsr
= cpsr_read(env
);
515 /* FIXME: This should SEGV if the access fails. */
516 if (get_user_u32(val
, addr
))
518 if (val
== env
->regs
[0]) {
520 /* FIXME: Check for segfaults. */
521 put_user_u32(val
, addr
);
528 cpsr_write(env
, cpsr
, CPSR_C
);
531 case 0xffff0fe0: /* __kernel_get_tls */
532 env
->regs
[0] = env
->cp15
.c13_tls2
;
537 /* Jump back to the caller. */
538 addr
= env
->regs
[14];
543 env
->regs
[15] = addr
;
548 void cpu_loop(CPUARMState
*env
)
551 unsigned int n
, insn
;
552 target_siginfo_t info
;
557 trapnr
= cpu_arm_exec(env
);
562 TaskState
*ts
= env
->opaque
;
566 /* we handle the FPU emulation here, as Linux */
567 /* we get the opcode */
568 /* FIXME - what to do if get_user() fails? */
569 get_user_u32(opcode
, env
->regs
[15]);
571 rc
= EmulateAll(opcode
, &ts
->fpa
, env
);
572 if (rc
== 0) { /* illegal instruction */
573 info
.si_signo
= SIGILL
;
575 info
.si_code
= TARGET_ILL_ILLOPN
;
576 info
._sifields
._sigfault
._addr
= env
->regs
[15];
577 queue_signal(env
, info
.si_signo
, &info
);
578 } else if (rc
< 0) { /* FP exception */
581 /* translate softfloat flags to FPSR flags */
582 if (-rc
& float_flag_invalid
)
584 if (-rc
& float_flag_divbyzero
)
586 if (-rc
& float_flag_overflow
)
588 if (-rc
& float_flag_underflow
)
590 if (-rc
& float_flag_inexact
)
593 FPSR fpsr
= ts
->fpa
.fpsr
;
594 //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
596 if (fpsr
& (arm_fpe
<< 16)) { /* exception enabled? */
597 info
.si_signo
= SIGFPE
;
600 /* ordered by priority, least first */
601 if (arm_fpe
& BIT_IXC
) info
.si_code
= TARGET_FPE_FLTRES
;
602 if (arm_fpe
& BIT_UFC
) info
.si_code
= TARGET_FPE_FLTUND
;
603 if (arm_fpe
& BIT_OFC
) info
.si_code
= TARGET_FPE_FLTOVF
;
604 if (arm_fpe
& BIT_DZC
) info
.si_code
= TARGET_FPE_FLTDIV
;
605 if (arm_fpe
& BIT_IOC
) info
.si_code
= TARGET_FPE_FLTINV
;
607 info
._sifields
._sigfault
._addr
= env
->regs
[15];
608 queue_signal(env
, info
.si_signo
, &info
);
613 /* accumulate unenabled exceptions */
614 if ((!(fpsr
& BIT_IXE
)) && (arm_fpe
& BIT_IXC
))
616 if ((!(fpsr
& BIT_UFE
)) && (arm_fpe
& BIT_UFC
))
618 if ((!(fpsr
& BIT_OFE
)) && (arm_fpe
& BIT_OFC
))
620 if ((!(fpsr
& BIT_DZE
)) && (arm_fpe
& BIT_DZC
))
622 if ((!(fpsr
& BIT_IOE
)) && (arm_fpe
& BIT_IOC
))
625 } else { /* everything OK */
636 if (trapnr
== EXCP_BKPT
) {
638 /* FIXME - what to do if get_user() fails? */
639 get_user_u16(insn
, env
->regs
[15]);
643 /* FIXME - what to do if get_user() fails? */
644 get_user_u32(insn
, env
->regs
[15]);
645 n
= (insn
& 0xf) | ((insn
>> 4) & 0xff0);
650 /* FIXME - what to do if get_user() fails? */
651 get_user_u16(insn
, env
->regs
[15] - 2);
654 /* FIXME - what to do if get_user() fails? */
655 get_user_u32(insn
, env
->regs
[15] - 4);
660 if (n
== ARM_NR_cacheflush
) {
661 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
662 } else if (n
== ARM_NR_semihosting
663 || n
== ARM_NR_thumb_semihosting
) {
664 env
->regs
[0] = do_arm_semihosting (env
);
665 } else if (n
== 0 || n
>= ARM_SYSCALL_BASE
666 || (env
->thumb
&& n
== ARM_THUMB_SYSCALL
)) {
668 if (env
->thumb
|| n
== 0) {
671 n
-= ARM_SYSCALL_BASE
;
674 if ( n
> ARM_NR_BASE
) {
676 case ARM_NR_cacheflush
:
677 arm_cache_flush(env
->regs
[0], env
->regs
[1]);
680 cpu_set_tls(env
, env
->regs
[0]);
684 gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
686 env
->regs
[0] = -TARGET_ENOSYS
;
690 env
->regs
[0] = do_syscall(env
,
705 /* just indicate that signals should be handled asap */
707 case EXCP_PREFETCH_ABORT
:
708 addr
= env
->cp15
.c6_insn
;
710 case EXCP_DATA_ABORT
:
711 addr
= env
->cp15
.c6_data
;
715 info
.si_signo
= SIGSEGV
;
717 /* XXX: check env->error_code */
718 info
.si_code
= TARGET_SEGV_MAPERR
;
719 info
._sifields
._sigfault
._addr
= addr
;
720 queue_signal(env
, info
.si_signo
, &info
);
727 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
732 info
.si_code
= TARGET_TRAP_BRKPT
;
733 queue_signal(env
, info
.si_signo
, &info
);
737 case EXCP_KERNEL_TRAP
:
738 if (do_kernel_trap(env
))
743 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
745 cpu_dump_state(env
, stderr
, fprintf
, 0);
748 process_pending_signals(env
);
755 #define SPARC64_STACK_BIAS 2047
759 /* WARNING: dealing with register windows _is_ complicated. More info
760 can be found at http://www.sics.se/~psm/sparcstack.html */
761 static inline int get_reg_index(CPUSPARCState
*env
, int cwp
, int index
)
763 index
= (index
+ cwp
* 16) % (16 * env
->nwindows
);
764 /* wrap handling : if cwp is on the last window, then we use the
765 registers 'after' the end */
766 if (index
< 8 && env
->cwp
== env
->nwindows
- 1)
767 index
+= 16 * env
->nwindows
;
771 /* save the register window 'cwp1' */
772 static inline void save_window_offset(CPUSPARCState
*env
, int cwp1
)
777 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
778 #ifdef TARGET_SPARC64
780 sp_ptr
+= SPARC64_STACK_BIAS
;
782 #if defined(DEBUG_WIN)
783 printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" save_cwp=%d\n",
786 for(i
= 0; i
< 16; i
++) {
787 /* FIXME - what to do if put_user() fails? */
788 put_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
789 sp_ptr
+= sizeof(abi_ulong
);
793 static void save_window(CPUSPARCState
*env
)
795 #ifndef TARGET_SPARC64
796 unsigned int new_wim
;
797 new_wim
= ((env
->wim
>> 1) | (env
->wim
<< (env
->nwindows
- 1))) &
798 ((1LL << env
->nwindows
) - 1);
799 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
802 save_window_offset(env
, cpu_cwp_dec(env
, env
->cwp
- 2));
808 static void restore_window(CPUSPARCState
*env
)
810 #ifndef TARGET_SPARC64
811 unsigned int new_wim
;
813 unsigned int i
, cwp1
;
816 #ifndef TARGET_SPARC64
817 new_wim
= ((env
->wim
<< 1) | (env
->wim
>> (env
->nwindows
- 1))) &
818 ((1LL << env
->nwindows
) - 1);
821 /* restore the invalid window */
822 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
823 sp_ptr
= env
->regbase
[get_reg_index(env
, cwp1
, 6)];
824 #ifdef TARGET_SPARC64
826 sp_ptr
+= SPARC64_STACK_BIAS
;
828 #if defined(DEBUG_WIN)
829 printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx
" load_cwp=%d\n",
832 for(i
= 0; i
< 16; i
++) {
833 /* FIXME - what to do if get_user() fails? */
834 get_user_ual(env
->regbase
[get_reg_index(env
, cwp1
, 8 + i
)], sp_ptr
);
835 sp_ptr
+= sizeof(abi_ulong
);
837 #ifdef TARGET_SPARC64
839 if (env
->cleanwin
< env
->nwindows
- 1)
847 static void flush_windows(CPUSPARCState
*env
)
853 /* if restore would invoke restore_window(), then we can stop */
854 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ offset
);
855 #ifndef TARGET_SPARC64
856 if (env
->wim
& (1 << cwp1
))
859 if (env
->canrestore
== 0)
864 save_window_offset(env
, cwp1
);
867 cwp1
= cpu_cwp_inc(env
, env
->cwp
+ 1);
868 #ifndef TARGET_SPARC64
869 /* set wim so that restore will reload the registers */
870 env
->wim
= 1 << cwp1
;
872 #if defined(DEBUG_WIN)
873 printf("flush_windows: nb=%d\n", offset
- 1);
877 void cpu_loop (CPUSPARCState
*env
)
880 target_siginfo_t info
;
883 trapnr
= cpu_sparc_exec (env
);
886 #ifndef TARGET_SPARC64
893 ret
= do_syscall (env
, env
->gregs
[1],
894 env
->regwptr
[0], env
->regwptr
[1],
895 env
->regwptr
[2], env
->regwptr
[3],
896 env
->regwptr
[4], env
->regwptr
[5]);
897 if ((unsigned int)ret
>= (unsigned int)(-515)) {
898 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
899 env
->xcc
|= PSR_CARRY
;
901 env
->psr
|= PSR_CARRY
;
905 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
906 env
->xcc
&= ~PSR_CARRY
;
908 env
->psr
&= ~PSR_CARRY
;
911 env
->regwptr
[0] = ret
;
912 /* next instruction */
914 env
->npc
= env
->npc
+ 4;
916 case 0x83: /* flush windows */
921 /* next instruction */
923 env
->npc
= env
->npc
+ 4;
925 #ifndef TARGET_SPARC64
926 case TT_WIN_OVF
: /* window overflow */
929 case TT_WIN_UNF
: /* window underflow */
935 info
.si_signo
= SIGSEGV
;
937 /* XXX: check env->error_code */
938 info
.si_code
= TARGET_SEGV_MAPERR
;
939 info
._sifields
._sigfault
._addr
= env
->mmuregs
[4];
940 queue_signal(env
, info
.si_signo
, &info
);
944 case TT_SPILL
: /* window overflow */
947 case TT_FILL
: /* window underflow */
953 info
.si_signo
= SIGSEGV
;
955 /* XXX: check env->error_code */
956 info
.si_code
= TARGET_SEGV_MAPERR
;
957 if (trapnr
== TT_DFAULT
)
958 info
._sifields
._sigfault
._addr
= env
->dmmuregs
[4];
960 info
._sifields
._sigfault
._addr
= cpu_tsptr(env
)->tpc
;
961 queue_signal(env
, info
.si_signo
, &info
);
967 sparc64_get_context(env
);
971 sparc64_set_context(env
);
976 /* just indicate that signals should be handled asap */
982 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
987 info
.si_code
= TARGET_TRAP_BRKPT
;
988 queue_signal(env
, info
.si_signo
, &info
);
993 printf ("Unhandled trap: 0x%x\n", trapnr
);
994 cpu_dump_state(env
, stderr
, fprintf
, 0);
997 process_pending_signals (env
);
1004 static inline uint64_t cpu_ppc_get_tb (CPUState
*env
)
1010 uint32_t cpu_ppc_load_tbl (CPUState
*env
)
1012 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1015 uint32_t cpu_ppc_load_tbu (CPUState
*env
)
1017 return cpu_ppc_get_tb(env
) >> 32;
1020 uint32_t cpu_ppc_load_atbl (CPUState
*env
)
1022 return cpu_ppc_get_tb(env
) & 0xFFFFFFFF;
1025 uint32_t cpu_ppc_load_atbu (CPUState
*env
)
1027 return cpu_ppc_get_tb(env
) >> 32;
1030 uint32_t cpu_ppc601_load_rtcu (CPUState
*env
)
1031 __attribute__ (( alias ("cpu_ppc_load_tbu") ));
1033 uint32_t cpu_ppc601_load_rtcl (CPUState
*env
)
1035 return cpu_ppc_load_tbl(env
) & 0x3FFFFF80;
1038 /* XXX: to be fixed */
1039 int ppc_dcr_read (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong
*valp
)
1044 int ppc_dcr_write (ppc_dcr_t
*dcr_env
, int dcrn
, target_ulong val
)
1049 #define EXCP_DUMP(env, fmt, ...) \
1051 fprintf(stderr, fmt , ## __VA_ARGS__); \
1052 cpu_dump_state(env, stderr, fprintf, 0); \
1053 qemu_log(fmt, ## __VA_ARGS__); \
1055 log_cpu_state(env, 0); \
1058 static int do_store_exclusive(CPUPPCState
*env
)
1061 target_ulong page_addr
;
1066 addr
= env
->reserve_ea
;
1067 page_addr
= addr
& TARGET_PAGE_MASK
;
1070 flags
= page_get_flags(page_addr
);
1071 if ((flags
& PAGE_READ
) == 0) {
1074 int reg
= env
->reserve_info
& 0x1f;
1075 int size
= (env
->reserve_info
>> 5) & 0xf;
1078 if (addr
== env
->reserve_addr
) {
1080 case 1: segv
= get_user_u8(val
, addr
); break;
1081 case 2: segv
= get_user_u16(val
, addr
); break;
1082 case 4: segv
= get_user_u32(val
, addr
); break;
1083 #if defined(TARGET_PPC64)
1084 case 8: segv
= get_user_u64(val
, addr
); break;
1088 if (!segv
&& val
== env
->reserve_val
) {
1089 val
= env
->gpr
[reg
];
1091 case 1: segv
= put_user_u8(val
, addr
); break;
1092 case 2: segv
= put_user_u16(val
, addr
); break;
1093 case 4: segv
= put_user_u32(val
, addr
); break;
1094 #if defined(TARGET_PPC64)
1095 case 8: segv
= put_user_u64(val
, addr
); break;
1104 env
->crf
[0] = (stored
<< 1) | xer_so
;
1105 env
->reserve_addr
= (target_ulong
)-1;
1115 void cpu_loop(CPUPPCState
*env
)
1117 target_siginfo_t info
;
1122 cpu_exec_start(env
);
1123 trapnr
= cpu_ppc_exec(env
);
1126 case POWERPC_EXCP_NONE
:
1129 case POWERPC_EXCP_CRITICAL
: /* Critical input */
1130 cpu_abort(env
, "Critical interrupt while in user mode. "
1133 case POWERPC_EXCP_MCHECK
: /* Machine check exception */
1134 cpu_abort(env
, "Machine check exception while in user mode. "
1137 case POWERPC_EXCP_DSI
: /* Data storage exception */
1138 EXCP_DUMP(env
, "Invalid data memory access: 0x" TARGET_FMT_lx
"\n",
1140 /* XXX: check this. Seems bugged */
1141 switch (env
->error_code
& 0xFF000000) {
1143 info
.si_signo
= TARGET_SIGSEGV
;
1145 info
.si_code
= TARGET_SEGV_MAPERR
;
1148 info
.si_signo
= TARGET_SIGILL
;
1150 info
.si_code
= TARGET_ILL_ILLADR
;
1153 info
.si_signo
= TARGET_SIGSEGV
;
1155 info
.si_code
= TARGET_SEGV_ACCERR
;
1158 /* Let's send a regular segfault... */
1159 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1161 info
.si_signo
= TARGET_SIGSEGV
;
1163 info
.si_code
= TARGET_SEGV_MAPERR
;
1166 info
._sifields
._sigfault
._addr
= env
->nip
;
1167 queue_signal(env
, info
.si_signo
, &info
);
1169 case POWERPC_EXCP_ISI
: /* Instruction storage exception */
1170 EXCP_DUMP(env
, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
1171 "\n", env
->spr
[SPR_SRR0
]);
1172 /* XXX: check this */
1173 switch (env
->error_code
& 0xFF000000) {
1175 info
.si_signo
= TARGET_SIGSEGV
;
1177 info
.si_code
= TARGET_SEGV_MAPERR
;
1181 info
.si_signo
= TARGET_SIGSEGV
;
1183 info
.si_code
= TARGET_SEGV_ACCERR
;
1186 /* Let's send a regular segfault... */
1187 EXCP_DUMP(env
, "Invalid segfault errno (%02x)\n",
1189 info
.si_signo
= TARGET_SIGSEGV
;
1191 info
.si_code
= TARGET_SEGV_MAPERR
;
1194 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1195 queue_signal(env
, info
.si_signo
, &info
);
1197 case POWERPC_EXCP_EXTERNAL
: /* External input */
1198 cpu_abort(env
, "External interrupt while in user mode. "
1201 case POWERPC_EXCP_ALIGN
: /* Alignment exception */
1202 EXCP_DUMP(env
, "Unaligned memory access\n");
1203 /* XXX: check this */
1204 info
.si_signo
= TARGET_SIGBUS
;
1206 info
.si_code
= TARGET_BUS_ADRALN
;
1207 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1208 queue_signal(env
, info
.si_signo
, &info
);
1210 case POWERPC_EXCP_PROGRAM
: /* Program exception */
1211 /* XXX: check this */
1212 switch (env
->error_code
& ~0xF) {
1213 case POWERPC_EXCP_FP
:
1214 EXCP_DUMP(env
, "Floating point program exception\n");
1215 info
.si_signo
= TARGET_SIGFPE
;
1217 switch (env
->error_code
& 0xF) {
1218 case POWERPC_EXCP_FP_OX
:
1219 info
.si_code
= TARGET_FPE_FLTOVF
;
1221 case POWERPC_EXCP_FP_UX
:
1222 info
.si_code
= TARGET_FPE_FLTUND
;
1224 case POWERPC_EXCP_FP_ZX
:
1225 case POWERPC_EXCP_FP_VXZDZ
:
1226 info
.si_code
= TARGET_FPE_FLTDIV
;
1228 case POWERPC_EXCP_FP_XX
:
1229 info
.si_code
= TARGET_FPE_FLTRES
;
1231 case POWERPC_EXCP_FP_VXSOFT
:
1232 info
.si_code
= TARGET_FPE_FLTINV
;
1234 case POWERPC_EXCP_FP_VXSNAN
:
1235 case POWERPC_EXCP_FP_VXISI
:
1236 case POWERPC_EXCP_FP_VXIDI
:
1237 case POWERPC_EXCP_FP_VXIMZ
:
1238 case POWERPC_EXCP_FP_VXVC
:
1239 case POWERPC_EXCP_FP_VXSQRT
:
1240 case POWERPC_EXCP_FP_VXCVI
:
1241 info
.si_code
= TARGET_FPE_FLTSUB
;
1244 EXCP_DUMP(env
, "Unknown floating point exception (%02x)\n",
1249 case POWERPC_EXCP_INVAL
:
1250 EXCP_DUMP(env
, "Invalid instruction\n");
1251 info
.si_signo
= TARGET_SIGILL
;
1253 switch (env
->error_code
& 0xF) {
1254 case POWERPC_EXCP_INVAL_INVAL
:
1255 info
.si_code
= TARGET_ILL_ILLOPC
;
1257 case POWERPC_EXCP_INVAL_LSWX
:
1258 info
.si_code
= TARGET_ILL_ILLOPN
;
1260 case POWERPC_EXCP_INVAL_SPR
:
1261 info
.si_code
= TARGET_ILL_PRVREG
;
1263 case POWERPC_EXCP_INVAL_FP
:
1264 info
.si_code
= TARGET_ILL_COPROC
;
1267 EXCP_DUMP(env
, "Unknown invalid operation (%02x)\n",
1268 env
->error_code
& 0xF);
1269 info
.si_code
= TARGET_ILL_ILLADR
;
1273 case POWERPC_EXCP_PRIV
:
1274 EXCP_DUMP(env
, "Privilege violation\n");
1275 info
.si_signo
= TARGET_SIGILL
;
1277 switch (env
->error_code
& 0xF) {
1278 case POWERPC_EXCP_PRIV_OPC
:
1279 info
.si_code
= TARGET_ILL_PRVOPC
;
1281 case POWERPC_EXCP_PRIV_REG
:
1282 info
.si_code
= TARGET_ILL_PRVREG
;
1285 EXCP_DUMP(env
, "Unknown privilege violation (%02x)\n",
1286 env
->error_code
& 0xF);
1287 info
.si_code
= TARGET_ILL_PRVOPC
;
1291 case POWERPC_EXCP_TRAP
:
1292 cpu_abort(env
, "Tried to call a TRAP\n");
1295 /* Should not happen ! */
1296 cpu_abort(env
, "Unknown program exception (%02x)\n",
1300 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1301 queue_signal(env
, info
.si_signo
, &info
);
1303 case POWERPC_EXCP_FPU
: /* Floating-point unavailable exception */
1304 EXCP_DUMP(env
, "No floating point allowed\n");
1305 info
.si_signo
= TARGET_SIGILL
;
1307 info
.si_code
= TARGET_ILL_COPROC
;
1308 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1309 queue_signal(env
, info
.si_signo
, &info
);
1311 case POWERPC_EXCP_SYSCALL
: /* System call exception */
1312 cpu_abort(env
, "Syscall exception while in user mode. "
1315 case POWERPC_EXCP_APU
: /* Auxiliary processor unavailable */
1316 EXCP_DUMP(env
, "No APU instruction allowed\n");
1317 info
.si_signo
= TARGET_SIGILL
;
1319 info
.si_code
= TARGET_ILL_COPROC
;
1320 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1321 queue_signal(env
, info
.si_signo
, &info
);
1323 case POWERPC_EXCP_DECR
: /* Decrementer exception */
1324 cpu_abort(env
, "Decrementer interrupt while in user mode. "
1327 case POWERPC_EXCP_FIT
: /* Fixed-interval timer interrupt */
1328 cpu_abort(env
, "Fix interval timer interrupt while in user mode. "
1331 case POWERPC_EXCP_WDT
: /* Watchdog timer interrupt */
1332 cpu_abort(env
, "Watchdog timer interrupt while in user mode. "
1335 case POWERPC_EXCP_DTLB
: /* Data TLB error */
1336 cpu_abort(env
, "Data TLB exception while in user mode. "
1339 case POWERPC_EXCP_ITLB
: /* Instruction TLB error */
1340 cpu_abort(env
, "Instruction TLB exception while in user mode. "
1343 case POWERPC_EXCP_SPEU
: /* SPE/embedded floating-point unavail. */
1344 EXCP_DUMP(env
, "No SPE/floating-point instruction allowed\n");
1345 info
.si_signo
= TARGET_SIGILL
;
1347 info
.si_code
= TARGET_ILL_COPROC
;
1348 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1349 queue_signal(env
, info
.si_signo
, &info
);
1351 case POWERPC_EXCP_EFPDI
: /* Embedded floating-point data IRQ */
1352 cpu_abort(env
, "Embedded floating-point data IRQ not handled\n");
1354 case POWERPC_EXCP_EFPRI
: /* Embedded floating-point round IRQ */
1355 cpu_abort(env
, "Embedded floating-point round IRQ not handled\n");
1357 case POWERPC_EXCP_EPERFM
: /* Embedded performance monitor IRQ */
1358 cpu_abort(env
, "Performance monitor exception not handled\n");
1360 case POWERPC_EXCP_DOORI
: /* Embedded doorbell interrupt */
1361 cpu_abort(env
, "Doorbell interrupt while in user mode. "
1364 case POWERPC_EXCP_DOORCI
: /* Embedded doorbell critical interrupt */
1365 cpu_abort(env
, "Doorbell critical interrupt while in user mode. "
1368 case POWERPC_EXCP_RESET
: /* System reset exception */
1369 cpu_abort(env
, "Reset interrupt while in user mode. "
1372 case POWERPC_EXCP_DSEG
: /* Data segment exception */
1373 cpu_abort(env
, "Data segment exception while in user mode. "
1376 case POWERPC_EXCP_ISEG
: /* Instruction segment exception */
1377 cpu_abort(env
, "Instruction segment exception "
1378 "while in user mode. Aborting\n");
1380 /* PowerPC 64 with hypervisor mode support */
1381 case POWERPC_EXCP_HDECR
: /* Hypervisor decrementer exception */
1382 cpu_abort(env
, "Hypervisor decrementer interrupt "
1383 "while in user mode. Aborting\n");
1385 case POWERPC_EXCP_TRACE
: /* Trace exception */
1387 * we use this exception to emulate step-by-step execution mode.
1390 /* PowerPC 64 with hypervisor mode support */
1391 case POWERPC_EXCP_HDSI
: /* Hypervisor data storage exception */
1392 cpu_abort(env
, "Hypervisor data storage exception "
1393 "while in user mode. Aborting\n");
1395 case POWERPC_EXCP_HISI
: /* Hypervisor instruction storage excp */
1396 cpu_abort(env
, "Hypervisor instruction storage exception "
1397 "while in user mode. Aborting\n");
1399 case POWERPC_EXCP_HDSEG
: /* Hypervisor data segment exception */
1400 cpu_abort(env
, "Hypervisor data segment exception "
1401 "while in user mode. Aborting\n");
1403 case POWERPC_EXCP_HISEG
: /* Hypervisor instruction segment excp */
1404 cpu_abort(env
, "Hypervisor instruction segment exception "
1405 "while in user mode. Aborting\n");
1407 case POWERPC_EXCP_VPU
: /* Vector unavailable exception */
1408 EXCP_DUMP(env
, "No Altivec instructions allowed\n");
1409 info
.si_signo
= TARGET_SIGILL
;
1411 info
.si_code
= TARGET_ILL_COPROC
;
1412 info
._sifields
._sigfault
._addr
= env
->nip
- 4;
1413 queue_signal(env
, info
.si_signo
, &info
);
1415 case POWERPC_EXCP_PIT
: /* Programmable interval timer IRQ */
1416 cpu_abort(env
, "Programable interval timer interrupt "
1417 "while in user mode. Aborting\n");
1419 case POWERPC_EXCP_IO
: /* IO error exception */
1420 cpu_abort(env
, "IO error exception while in user mode. "
1423 case POWERPC_EXCP_RUNM
: /* Run mode exception */
1424 cpu_abort(env
, "Run mode exception while in user mode. "
1427 case POWERPC_EXCP_EMUL
: /* Emulation trap exception */
1428 cpu_abort(env
, "Emulation trap exception not handled\n");
1430 case POWERPC_EXCP_IFTLB
: /* Instruction fetch TLB error */
1431 cpu_abort(env
, "Instruction fetch TLB exception "
1432 "while in user-mode. Aborting");
1434 case POWERPC_EXCP_DLTLB
: /* Data load TLB miss */
1435 cpu_abort(env
, "Data load TLB exception while in user-mode. "
1438 case POWERPC_EXCP_DSTLB
: /* Data store TLB miss */
1439 cpu_abort(env
, "Data store TLB exception while in user-mode. "
1442 case POWERPC_EXCP_FPA
: /* Floating-point assist exception */
1443 cpu_abort(env
, "Floating-point assist exception not handled\n");
1445 case POWERPC_EXCP_IABR
: /* Instruction address breakpoint */
1446 cpu_abort(env
, "Instruction address breakpoint exception "
1449 case POWERPC_EXCP_SMI
: /* System management interrupt */
1450 cpu_abort(env
, "System management interrupt while in user mode. "
1453 case POWERPC_EXCP_THERM
: /* Thermal interrupt */
1454 cpu_abort(env
, "Thermal interrupt interrupt while in user mode. "
1457 case POWERPC_EXCP_PERFM
: /* Embedded performance monitor IRQ */
1458 cpu_abort(env
, "Performance monitor exception not handled\n");
1460 case POWERPC_EXCP_VPUA
: /* Vector assist exception */
1461 cpu_abort(env
, "Vector assist exception not handled\n");
1463 case POWERPC_EXCP_SOFTP
: /* Soft patch exception */
1464 cpu_abort(env
, "Soft patch exception not handled\n");
1466 case POWERPC_EXCP_MAINT
: /* Maintenance exception */
1467 cpu_abort(env
, "Maintenance exception while in user mode. "
1470 case POWERPC_EXCP_STOP
: /* stop translation */
1471 /* We did invalidate the instruction cache. Go on */
1473 case POWERPC_EXCP_BRANCH
: /* branch instruction: */
1474 /* We just stopped because of a branch. Go on */
1476 case POWERPC_EXCP_SYSCALL_USER
:
1477 /* system call in user-mode emulation */
1479 * PPC ABI uses overflow flag in cr0 to signal an error
1483 printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env
->gpr
[0],
1484 env
->gpr
[3], env
->gpr
[4], env
->gpr
[5], env
->gpr
[6]);
1486 env
->crf
[0] &= ~0x1;
1487 ret
= do_syscall(env
, env
->gpr
[0], env
->gpr
[3], env
->gpr
[4],
1488 env
->gpr
[5], env
->gpr
[6], env
->gpr
[7],
1490 if (ret
== (uint32_t)(-TARGET_QEMU_ESIGRETURN
)) {
1491 /* Returning from a successful sigreturn syscall.
1492 Avoid corrupting register state. */
1495 if (ret
> (uint32_t)(-515)) {
1501 printf("syscall returned 0x%08x (%d)\n", ret
, ret
);
1504 case POWERPC_EXCP_STCX
:
1505 if (do_store_exclusive(env
)) {
1506 info
.si_signo
= TARGET_SIGSEGV
;
1508 info
.si_code
= TARGET_SEGV_MAPERR
;
1509 info
._sifields
._sigfault
._addr
= env
->nip
;
1510 queue_signal(env
, info
.si_signo
, &info
);
1517 sig
= gdb_handlesig(env
, TARGET_SIGTRAP
);
1519 info
.si_signo
= sig
;
1521 info
.si_code
= TARGET_TRAP_BRKPT
;
1522 queue_signal(env
, info
.si_signo
, &info
);
1526 case EXCP_INTERRUPT
:
1527 /* just indicate that signals should be handled asap */
1530 cpu_abort(env
, "Unknown exception 0x%d. Aborting\n", trapnr
);
1533 process_pending_signals(env
);
1540 #define MIPS_SYS(name, args) args,
1542 static const uint8_t mips_syscall_args
[] = {
1543 MIPS_SYS(sys_syscall
, 0) /* 4000 */
1544 MIPS_SYS(sys_exit
, 1)
1545 MIPS_SYS(sys_fork
, 0)
1546 MIPS_SYS(sys_read
, 3)
1547 MIPS_SYS(sys_write
, 3)
1548 MIPS_SYS(sys_open
, 3) /* 4005 */
1549 MIPS_SYS(sys_close
, 1)
1550 MIPS_SYS(sys_waitpid
, 3)
1551 MIPS_SYS(sys_creat
, 2)
1552 MIPS_SYS(sys_link
, 2)
1553 MIPS_SYS(sys_unlink
, 1) /* 4010 */
1554 MIPS_SYS(sys_execve
, 0)
1555 MIPS_SYS(sys_chdir
, 1)
1556 MIPS_SYS(sys_time
, 1)
1557 MIPS_SYS(sys_mknod
, 3)
1558 MIPS_SYS(sys_chmod
, 2) /* 4015 */
1559 MIPS_SYS(sys_lchown
, 3)
1560 MIPS_SYS(sys_ni_syscall
, 0)
1561 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_stat */
1562 MIPS_SYS(sys_lseek
, 3)
1563 MIPS_SYS(sys_getpid
, 0) /* 4020 */
1564 MIPS_SYS(sys_mount
, 5)
1565 MIPS_SYS(sys_oldumount
, 1)
1566 MIPS_SYS(sys_setuid
, 1)
1567 MIPS_SYS(sys_getuid
, 0)
1568 MIPS_SYS(sys_stime
, 1) /* 4025 */
1569 MIPS_SYS(sys_ptrace
, 4)
1570 MIPS_SYS(sys_alarm
, 1)
1571 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_fstat */
1572 MIPS_SYS(sys_pause
, 0)
1573 MIPS_SYS(sys_utime
, 2) /* 4030 */
1574 MIPS_SYS(sys_ni_syscall
, 0)
1575 MIPS_SYS(sys_ni_syscall
, 0)
1576 MIPS_SYS(sys_access
, 2)
1577 MIPS_SYS(sys_nice
, 1)
1578 MIPS_SYS(sys_ni_syscall
, 0) /* 4035 */
1579 MIPS_SYS(sys_sync
, 0)
1580 MIPS_SYS(sys_kill
, 2)
1581 MIPS_SYS(sys_rename
, 2)
1582 MIPS_SYS(sys_mkdir
, 2)
1583 MIPS_SYS(sys_rmdir
, 1) /* 4040 */
1584 MIPS_SYS(sys_dup
, 1)
1585 MIPS_SYS(sys_pipe
, 0)
1586 MIPS_SYS(sys_times
, 1)
1587 MIPS_SYS(sys_ni_syscall
, 0)
1588 MIPS_SYS(sys_brk
, 1) /* 4045 */
1589 MIPS_SYS(sys_setgid
, 1)
1590 MIPS_SYS(sys_getgid
, 0)
1591 MIPS_SYS(sys_ni_syscall
, 0) /* was signal(2) */
1592 MIPS_SYS(sys_geteuid
, 0)
1593 MIPS_SYS(sys_getegid
, 0) /* 4050 */
1594 MIPS_SYS(sys_acct
, 0)
1595 MIPS_SYS(sys_umount
, 2)
1596 MIPS_SYS(sys_ni_syscall
, 0)
1597 MIPS_SYS(sys_ioctl
, 3)
1598 MIPS_SYS(sys_fcntl
, 3) /* 4055 */
1599 MIPS_SYS(sys_ni_syscall
, 2)
1600 MIPS_SYS(sys_setpgid
, 2)
1601 MIPS_SYS(sys_ni_syscall
, 0)
1602 MIPS_SYS(sys_olduname
, 1)
1603 MIPS_SYS(sys_umask
, 1) /* 4060 */
1604 MIPS_SYS(sys_chroot
, 1)
1605 MIPS_SYS(sys_ustat
, 2)
1606 MIPS_SYS(sys_dup2
, 2)
1607 MIPS_SYS(sys_getppid
, 0)
1608 MIPS_SYS(sys_getpgrp
, 0) /* 4065 */
1609 MIPS_SYS(sys_setsid
, 0)
1610 MIPS_SYS(sys_sigaction
, 3)
1611 MIPS_SYS(sys_sgetmask
, 0)
1612 MIPS_SYS(sys_ssetmask
, 1)
1613 MIPS_SYS(sys_setreuid
, 2) /* 4070 */
1614 MIPS_SYS(sys_setregid
, 2)
1615 MIPS_SYS(sys_sigsuspend
, 0)
1616 MIPS_SYS(sys_sigpending
, 1)
1617 MIPS_SYS(sys_sethostname
, 2)
1618 MIPS_SYS(sys_setrlimit
, 2) /* 4075 */
1619 MIPS_SYS(sys_getrlimit
, 2)
1620 MIPS_SYS(sys_getrusage
, 2)
1621 MIPS_SYS(sys_gettimeofday
, 2)
1622 MIPS_SYS(sys_settimeofday
, 2)
1623 MIPS_SYS(sys_getgroups
, 2) /* 4080 */
1624 MIPS_SYS(sys_setgroups
, 2)
1625 MIPS_SYS(sys_ni_syscall
, 0) /* old_select */
1626 MIPS_SYS(sys_symlink
, 2)
1627 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_lstat */
1628 MIPS_SYS(sys_readlink
, 3) /* 4085 */
1629 MIPS_SYS(sys_uselib
, 1)
1630 MIPS_SYS(sys_swapon
, 2)
1631 MIPS_SYS(sys_reboot
, 3)
1632 MIPS_SYS(old_readdir
, 3)
1633 MIPS_SYS(old_mmap
, 6) /* 4090 */
1634 MIPS_SYS(sys_munmap
, 2)
1635 MIPS_SYS(sys_truncate
, 2)
1636 MIPS_SYS(sys_ftruncate
, 2)
1637 MIPS_SYS(sys_fchmod
, 2)
1638 MIPS_SYS(sys_fchown
, 3) /* 4095 */
1639 MIPS_SYS(sys_getpriority
, 2)
1640 MIPS_SYS(sys_setpriority
, 3)
1641 MIPS_SYS(sys_ni_syscall
, 0)
1642 MIPS_SYS(sys_statfs
, 2)
1643 MIPS_SYS(sys_fstatfs
, 2) /* 4100 */
1644 MIPS_SYS(sys_ni_syscall
, 0) /* was ioperm(2) */
1645 MIPS_SYS(sys_socketcall
, 2)
1646 MIPS_SYS(sys_syslog
, 3)
1647 MIPS_SYS(sys_setitimer
, 3)
1648 MIPS_SYS(sys_getitimer
, 2) /* 4105 */
1649 MIPS_SYS(sys_newstat
, 2)
1650 MIPS_SYS(sys_newlstat
, 2)
1651 MIPS_SYS(sys_newfstat
, 2)
1652 MIPS_SYS(sys_uname
, 1)
1653 MIPS_SYS(sys_ni_syscall
, 0) /* 4110 was iopl(2) */
1654 MIPS_SYS(sys_vhangup
, 0)
1655 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_idle() */
1656 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_vm86 */
1657 MIPS_SYS(sys_wait4
, 4)
1658 MIPS_SYS(sys_swapoff
, 1) /* 4115 */
1659 MIPS_SYS(sys_sysinfo
, 1)
1660 MIPS_SYS(sys_ipc
, 6)
1661 MIPS_SYS(sys_fsync
, 1)
1662 MIPS_SYS(sys_sigreturn
, 0)
1663 MIPS_SYS(sys_clone
, 6) /* 4120 */
1664 MIPS_SYS(sys_setdomainname
, 2)
1665 MIPS_SYS(sys_newuname
, 1)
1666 MIPS_SYS(sys_ni_syscall
, 0) /* sys_modify_ldt */
1667 MIPS_SYS(sys_adjtimex
, 1)
1668 MIPS_SYS(sys_mprotect
, 3) /* 4125 */
1669 MIPS_SYS(sys_sigprocmask
, 3)
1670 MIPS_SYS(sys_ni_syscall
, 0) /* was create_module */
1671 MIPS_SYS(sys_init_module
, 5)
1672 MIPS_SYS(sys_delete_module
, 1)
1673 MIPS_SYS(sys_ni_syscall
, 0) /* 4130 was get_kernel_syms */
1674 MIPS_SYS(sys_quotactl
, 0)
1675 MIPS_SYS(sys_getpgid
, 1)
1676 MIPS_SYS(sys_fchdir
, 1)
1677 MIPS_SYS(sys_bdflush
, 2)
1678 MIPS_SYS(sys_sysfs
, 3) /* 4135 */
1679 MIPS_SYS(sys_personality
, 1)
1680 MIPS_SYS(sys_ni_syscall
, 0) /* for afs_syscall */
1681 MIPS_SYS(sys_setfsuid
, 1)
1682 MIPS_SYS(sys_setfsgid
, 1)
1683 MIPS_SYS(sys_llseek
, 5) /* 4140 */
1684 MIPS_SYS(sys_getdents
, 3)
1685 MIPS_SYS(sys_select
, 5)
1686 MIPS_SYS(sys_flock
, 2)
1687 MIPS_SYS(sys_msync
, 3)
1688 MIPS_SYS(sys_readv
, 3) /* 4145 */
1689 MIPS_SYS(sys_writev
, 3)
1690 MIPS_SYS(sys_cacheflush
, 3)
1691 MIPS_SYS(sys_cachectl
, 3)
1692 MIPS_SYS(sys_sysmips
, 4)
1693 MIPS_SYS(sys_ni_syscall
, 0) /* 4150 */
1694 MIPS_SYS(sys_getsid
, 1)
1695 MIPS_SYS(sys_fdatasync
, 0)
1696 MIPS_SYS(sys_sysctl
, 1)
1697 MIPS_SYS(sys_mlock
, 2)
1698 MIPS_SYS(sys_munlock
, 2) /* 4155 */
1699 MIPS_SYS(sys_mlockall
, 1)
1700 MIPS_SYS(sys_munlockall
, 0)
1701 MIPS_SYS(sys_sched_setparam
, 2)
1702 MIPS_SYS(sys_sched_getparam
, 2)
1703 MIPS_SYS(sys_sched_setscheduler
, 3) /* 4160 */
1704 MIPS_SYS(sys_sched_getscheduler
, 1)
1705 MIPS_SYS(sys_sched_yield
, 0)
1706 MIPS_SYS(sys_sched_get_priority_max
, 1)
1707 MIPS_SYS(sys_sched_get_priority_min
, 1)
1708 MIPS_SYS(sys_sched_rr_get_interval
, 2) /* 4165 */
1709 MIPS_SYS(sys_nanosleep
, 2)
1710 MIPS_SYS(sys_mremap
, 4)
1711 MIPS_SYS(sys_accept
, 3)
1712 MIPS_SYS(sys_bind
, 3)
1713 MIPS_SYS(sys_connect
, 3) /* 4170 */
1714 MIPS_SYS(sys_getpeername
, 3)
1715 MIPS_SYS(sys_getsockname
, 3)
1716 MIPS_SYS(sys_getsockopt
, 5)
1717 MIPS_SYS(sys_listen
, 2)
1718 MIPS_SYS(sys_recv
, 4) /* 4175 */
1719 MIPS_SYS(sys_recvfrom
, 6)
1720 MIPS_SYS(sys_recvmsg
, 3)
1721 MIPS_SYS(sys_send
, 4)
1722 MIPS_SYS(sys_sendmsg
, 3)
1723 MIPS_SYS(sys_sendto
, 6) /* 4180 */
1724 MIPS_SYS(sys_setsockopt
, 5)
1725 MIPS_SYS(sys_shutdown
, 2)
1726 MIPS_SYS(sys_socket
, 3)
1727 MIPS_SYS(sys_socketpair
, 4)
1728 MIPS_SYS(sys_setresuid
, 3) /* 4185 */
1729 MIPS_SYS(sys_getresuid
, 3)
1730 MIPS_SYS(sys_ni_syscall
, 0) /* was sys_query_module */
1731 MIPS_SYS(sys_poll
, 3)
1732 MIPS_SYS(sys_nfsservctl
, 3)
1733 MIPS_SYS(sys_setresgid
, 3) /* 4190 */
1734 MIPS_SYS(sys_getresgid
, 3)
1735 MIPS_SYS(sys_prctl
, 5)
1736 MIPS_SYS(sys_rt_sigreturn
, 0)
1737 MIPS_SYS(sys_rt_sigaction
, 4)
1738 MIPS_SYS(sys_rt_sigprocmask
, 4) /* 4195 */
1739 MIPS_SYS(sys_rt_sigpending
, 2)
1740 MIPS_SYS(sys_rt_sigtimedwait
, 4)
1741 MIPS_SYS(sys_rt_sigqueueinfo
, 3)
1742 MIPS_SYS(sys_rt_sigsuspend
, 0)
1743 MIPS_SYS(sys_pread64
, 6) /* 4200 */
1744 MIPS_SYS(sys_pwrite64
, 6)
1745 MIPS_SYS(sys_chown
, 3)
1746 MIPS_SYS(sys_getcwd
, 2)
1747 MIPS_SYS(sys_capget
, 2)
1748 MIPS_SYS(sys_capset
, 2) /* 4205 */
1749 MIPS_SYS(sys_sigaltstack
, 0)
1750 MIPS_SYS(sys_sendfile
, 4)
1751 MIPS_SYS(sys_ni_syscall
, 0)
1752 MIPS_SYS(sys_ni_syscall
, 0)
1753 MIPS_SYS(sys_mmap2
, 6) /* 4210 */
1754 MIPS_SYS(sys_truncate64
, 4)
1755 MIPS_SYS(sys_ftruncate64
, 4)
1756 MIPS_SYS(sys_stat64
, 2)
1757 MIPS_SYS(sys_lstat64
, 2)
1758 MIPS_SYS(sys_fstat64
, 2) /* 4215 */
1759 MIPS_SYS(sys_pivot_root
, 2)
1760 MIPS_SYS(sys_mincore
, 3)
1761 MIPS_SYS(sys_madvise
, 3)
1762 MIPS_SYS(sys_getdents64
, 3)
1763 MIPS_SYS(sys_fcntl64
, 3) /* 4220 */
1764 MIPS_SYS(sys_ni_syscall
, 0)
1765 MIPS_SYS(sys_gettid
, 0)
1766 MIPS_SYS(sys_readahead
, 5)
1767 MIPS_SYS(sys_setxattr
, 5)
1768 MIPS_SYS(sys_lsetxattr
, 5) /* 4225 */
1769 MIPS_SYS(sys_fsetxattr
, 5)
1770 MIPS_SYS(sys_getxattr
, 4)
1771 MIPS_SYS(sys_lgetxattr
, 4)
1772 MIPS_SYS(sys_fgetxattr
, 4)
1773 MIPS_SYS(sys_listxattr
, 3) /* 4230 */
1774 MIPS_SYS(sys_llistxattr
, 3)
1775 MIPS_SYS(sys_flistxattr
, 3)
1776 MIPS_SYS(sys_removexattr
, 2)
1777 MIPS_SYS(sys_lremovexattr
, 2)
1778 MIPS_SYS(sys_fremovexattr
, 2) /* 4235 */
1779 MIPS_SYS(sys_tkill
, 2)
1780 MIPS_SYS(sys_sendfile64
, 5)
1781 MIPS_SYS(sys_futex
, 2)
1782 MIPS_SYS(sys_sched_setaffinity
, 3)
1783 MIPS_SYS(sys_sched_getaffinity
, 3) /* 4240 */
1784 MIPS_SYS(sys_io_setup
, 2)
1785 MIPS_SYS(sys_io_destroy
, 1)
1786 MIPS_SYS(sys_io_getevents
, 5)
1787 MIPS_SYS(sys_io_submit
, 3)
1788 MIPS_SYS(sys_io_cancel
, 3) /* 4245 */
1789 MIPS_SYS(sys_exit_group
, 1)
1790 MIPS_SYS(sys_lookup_dcookie
, 3)
1791 MIPS_SYS(sys_epoll_create
, 1)
1792 MIPS_SYS(sys_epoll_ctl
, 4)
1793 MIPS_SYS(sys_epoll_wait
, 3) /* 4250 */
1794 MIPS_SYS(sys_remap_file_pages
, 5)
1795 MIPS_SYS(sys_set_tid_address
, 1)
1796 MIPS_SYS(sys_restart_syscall
, 0)
1797 MIPS_SYS(sys_fadvise64_64
, 7)
1798 MIPS_SYS(sys_statfs64
, 3) /* 4255 */
1799 MIPS_SYS(sys_fstatfs64
, 2)
1800 MIPS_SYS(sys_timer_create
, 3)
1801 MIPS_SYS(sys_timer_settime
, 4)
1802 MIPS_SYS(sys_timer_gettime
, 2)
1803 MIPS_SYS(sys_timer_getoverrun
, 1) /* 4260 */
1804 MIPS_SYS(sys_timer_delete
, 1)
1805 MIPS_SYS(sys_clock_settime
, 2)
1806 MIPS_SYS(sys_clock_gettime
, 2)
1807 MIPS_SYS(sys_clock_getres
, 2)
1808 MIPS_SYS(sys_clock_nanosleep
, 4) /* 4265 */
1809 MIPS_SYS(sys_tgkill
, 3)
1810 MIPS_SYS(sys_utimes
, 2)
1811 MIPS_SYS(sys_mbind
, 4)
1812 MIPS_SYS(sys_ni_syscall
, 0) /* sys_get_mempolicy */
1813 MIPS_SYS(sys_ni_syscall
, 0) /* 4270 sys_set_mempolicy */
1814 MIPS_SYS(sys_mq_open
, 4)
1815 MIPS_SYS(sys_mq_unlink
, 1)
1816 MIPS_SYS(sys_mq_timedsend
, 5)
1817 MIPS_SYS(sys_mq_timedreceive
, 5)
1818 MIPS_SYS(sys_mq_notify
, 2) /* 4275 */
1819 MIPS_SYS(sys_mq_getsetattr
, 3)
1820 MIPS_SYS(sys_ni_syscall
, 0) /* sys_vserver */
1821 MIPS_SYS(sys_waitid
, 4)
1822 MIPS_SYS(sys_ni_syscall
, 0) /* available, was setaltroot */
1823 MIPS_SYS(sys_add_key
, 5)
1824 MIPS_SYS(sys_request_key
, 4)
1825 MIPS_SYS(sys_keyctl
, 5)
1826 MIPS_SYS(sys_set_thread_area
, 1)
1827 MIPS_SYS(sys_inotify_init
, 0)
1828 MIPS_SYS(sys_inotify_add_watch
, 3) /* 4285 */
1829 MIPS_SYS(sys_inotify_rm_watch
, 2)
1830 MIPS_SYS(sys_migrate_pages
, 4)
1831 MIPS_SYS(sys_openat
, 4)
1832 MIPS_SYS(sys_mkdirat
, 3)
1833 MIPS_SYS(sys_mknodat
, 4) /* 4290 */
1834 MIPS_SYS(sys_fchownat
, 5)
1835 MIPS_SYS(sys_futimesat
, 3)
1836 MIPS_SYS(sys_fstatat64
, 4)
1837 MIPS_SYS(sys_unlinkat
, 3)
1838 MIPS_SYS(sys_renameat
, 4) /* 4295 */
1839 MIPS_SYS(sys_linkat
, 5)
1840 MIPS_SYS(sys_symlinkat
, 3)
1841 MIPS_SYS(sys_readlinkat
, 4)
1842 MIPS_SYS(sys_fchmodat
, 3)
1843 MIPS_SYS(sys_faccessat
, 3) /* 4300 */
1844 MIPS_SYS(sys_pselect6
, 6)
1845 MIPS_SYS(sys_ppoll
, 5)
1846 MIPS_SYS(sys_unshare
, 1)
1847 MIPS_SYS(sys_splice
, 4)
1848 MIPS_SYS(sys_sync_file_range
, 7) /* 4305 */
1849 MIPS_SYS(sys_tee
, 4)
1850 MIPS_SYS(sys_vmsplice
, 4)
1851 MIPS_SYS(sys_move_pages
, 6)
1852 MIPS_SYS(sys_set_robust_list
, 2)
1853 MIPS_SYS(sys_get_robust_list
, 3) /* 4310 */
1854 MIPS_SYS(sys_kexec_load
, 4)
1855 MIPS_SYS(sys_getcpu
, 3)
1856 MIPS_SYS(sys_epoll_pwait
, 6)
1857 MIPS_SYS(sys_ioprio_set
, 3)
1858 MIPS_SYS(sys_ioprio_get
, 2)
1863 static int do_store_exclusive(CPUMIPSState
*env
)
1866 target_ulong page_addr
;
1873 addr
= env
->CP0_LLAddr
;
1874 page_addr
= addr
& TARGET_PAGE_MASK
;
1877 flags
= page_get_flags(page_addr
);
1878 if ((flags
& PAGE_READ
) == 0) {
1881 reg
= env
->llreg
& 0x1f;
1882 d
= (env
->llreg
& 0x20) != 0;
1884 segv
= get_user_s64(val
, addr
);
1886 segv
= get_user_s32(val
, addr
);
1889 if (val
!= env
->llval
) {
1890 env
->active_tc
.gpr
[reg
] = 0;
1893 segv
= put_user_u64(env
->llnewval
, addr
);
1895 segv
= put_user_u32(env
->llnewval
, addr
);
1898 env
->active_tc
.gpr
[reg
] = 1;
1903 env
->CP0_LLAddr
= -1;
1905 env
->active_tc
.PC
+= 4;
1912 void cpu_loop(CPUMIPSState
*env
)
1914 target_siginfo_t info
;
1916 unsigned int syscall_num
;
1919 cpu_exec_start(env
);
1920 trapnr
= cpu_mips_exec(env
);
1924 syscall_num
= env
->active_tc
.gpr
[2] - 4000;
1925 env
->active_tc
.PC
+= 4;
1926 if (syscall_num
>= sizeof(mips_syscall_args
)) {
1931 abi_ulong arg5
= 0, arg6
= 0, arg7
= 0, arg8
= 0;
1933 nb_args
= mips_syscall_args
[syscall_num
];
1934 sp_reg
= env
->active_tc
.gpr
[29];
1936 /* these arguments are taken from the stack */
1937 /* FIXME - what to do if get_user() fails? */
1938 case 8: get_user_ual(arg8
, sp_reg
+ 28);
1939 case 7: get_user_ual(arg7
, sp_reg
+ 24);
1940 case 6: get_user_ual(arg6
, sp_reg
+ 20);
1941 case 5: get_user_ual(arg5
, sp_reg
+ 16);
1945 ret
= do_syscall(env
, env
->active_tc
.gpr
[2],
1946 env
->active_tc
.gpr
[4],
1947 env
->active_tc
.gpr
[5],
1948 env
->active_tc
.gpr
[6],
1949 env
->active_tc
.gpr
[7],
1950 arg5
, arg6
/*, arg7, arg8*/);
1952 if (ret
== -TARGET_QEMU_ESIGRETURN
) {
1953 /* Returning from a successful sigreturn syscall.
1954 Avoid clobbering register state. */
1957 if ((unsigned int)ret
>= (unsigned int)(-1133)) {
1958 env
->active_tc
.gpr
[7] = 1; /* error flag */
1961 env
->active_tc
.gpr
[7] = 0; /* error flag */
1963 env
->active_tc
.gpr
[2] = ret
;
1967 info
.si_signo
= TARGET_SIGSEGV
;
1969 /* XXX: check env->error_code */
1970 info
.si_code
= TARGET_SEGV_MAPERR
;
1971 info
._sifields
._sigfault
._addr
= env
->CP0_BadVAddr
;
1972 queue_signal(env
, info
.si_signo
, &info
);
1976 info
.si_signo
= TARGET_SIGILL
;
1979 queue_signal(env
, info
.si_signo
, &info
);
1981 case EXCP_INTERRUPT
:
1982 /* just indicate that signals should be handled asap */
1988 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
1991 info
.si_signo
= sig
;
1993 info
.si_code
= TARGET_TRAP_BRKPT
;
1994 queue_signal(env
, info
.si_signo
, &info
);
1999 if (do_store_exclusive(env
)) {
2000 info
.si_signo
= TARGET_SIGSEGV
;
2002 info
.si_code
= TARGET_SEGV_MAPERR
;
2003 info
._sifields
._sigfault
._addr
= env
->active_tc
.PC
;
2004 queue_signal(env
, info
.si_signo
, &info
);
2009 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2011 cpu_dump_state(env
, stderr
, fprintf
, 0);
2014 process_pending_signals(env
);
2020 void cpu_loop (CPUState
*env
)
2023 target_siginfo_t info
;
2026 trapnr
= cpu_sh4_exec (env
);
2031 ret
= do_syscall(env
,
2039 env
->gregs
[0] = ret
;
2041 case EXCP_INTERRUPT
:
2042 /* just indicate that signals should be handled asap */
2048 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2051 info
.si_signo
= sig
;
2053 info
.si_code
= TARGET_TRAP_BRKPT
;
2054 queue_signal(env
, info
.si_signo
, &info
);
2060 info
.si_signo
= SIGSEGV
;
2062 info
.si_code
= TARGET_SEGV_MAPERR
;
2063 info
._sifields
._sigfault
._addr
= env
->tea
;
2064 queue_signal(env
, info
.si_signo
, &info
);
2068 printf ("Unhandled trap: 0x%x\n", trapnr
);
2069 cpu_dump_state(env
, stderr
, fprintf
, 0);
2072 process_pending_signals (env
);
2078 void cpu_loop (CPUState
*env
)
2081 target_siginfo_t info
;
2084 trapnr
= cpu_cris_exec (env
);
2088 info
.si_signo
= SIGSEGV
;
2090 /* XXX: check env->error_code */
2091 info
.si_code
= TARGET_SEGV_MAPERR
;
2092 info
._sifields
._sigfault
._addr
= env
->pregs
[PR_EDA
];
2093 queue_signal(env
, info
.si_signo
, &info
);
2096 case EXCP_INTERRUPT
:
2097 /* just indicate that signals should be handled asap */
2100 ret
= do_syscall(env
,
2108 env
->regs
[10] = ret
;
2114 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2117 info
.si_signo
= sig
;
2119 info
.si_code
= TARGET_TRAP_BRKPT
;
2120 queue_signal(env
, info
.si_signo
, &info
);
2125 printf ("Unhandled trap: 0x%x\n", trapnr
);
2126 cpu_dump_state(env
, stderr
, fprintf
, 0);
2129 process_pending_signals (env
);
2134 #ifdef TARGET_MICROBLAZE
2135 void cpu_loop (CPUState
*env
)
2138 target_siginfo_t info
;
2141 trapnr
= cpu_mb_exec (env
);
2145 info
.si_signo
= SIGSEGV
;
2147 /* XXX: check env->error_code */
2148 info
.si_code
= TARGET_SEGV_MAPERR
;
2149 info
._sifields
._sigfault
._addr
= 0;
2150 queue_signal(env
, info
.si_signo
, &info
);
2153 case EXCP_INTERRUPT
:
2154 /* just indicate that signals should be handled asap */
2157 /* Return address is 4 bytes after the call. */
2159 ret
= do_syscall(env
,
2168 env
->sregs
[SR_PC
] = env
->regs
[14];
2174 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2177 info
.si_signo
= sig
;
2179 info
.si_code
= TARGET_TRAP_BRKPT
;
2180 queue_signal(env
, info
.si_signo
, &info
);
2185 printf ("Unhandled trap: 0x%x\n", trapnr
);
2186 cpu_dump_state(env
, stderr
, fprintf
, 0);
2189 process_pending_signals (env
);
2196 void cpu_loop(CPUM68KState
*env
)
2200 target_siginfo_t info
;
2201 TaskState
*ts
= env
->opaque
;
2204 trapnr
= cpu_m68k_exec(env
);
2208 if (ts
->sim_syscalls
) {
2210 nr
= lduw(env
->pc
+ 2);
2212 do_m68k_simcall(env
, nr
);
2218 case EXCP_HALT_INSN
:
2219 /* Semihosing syscall. */
2221 do_m68k_semihosting(env
, env
->dregs
[0]);
2225 case EXCP_UNSUPPORTED
:
2227 info
.si_signo
= SIGILL
;
2229 info
.si_code
= TARGET_ILL_ILLOPN
;
2230 info
._sifields
._sigfault
._addr
= env
->pc
;
2231 queue_signal(env
, info
.si_signo
, &info
);
2235 ts
->sim_syscalls
= 0;
2238 env
->dregs
[0] = do_syscall(env
,
2248 case EXCP_INTERRUPT
:
2249 /* just indicate that signals should be handled asap */
2253 info
.si_signo
= SIGSEGV
;
2255 /* XXX: check env->error_code */
2256 info
.si_code
= TARGET_SEGV_MAPERR
;
2257 info
._sifields
._sigfault
._addr
= env
->mmu
.ar
;
2258 queue_signal(env
, info
.si_signo
, &info
);
2265 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2268 info
.si_signo
= sig
;
2270 info
.si_code
= TARGET_TRAP_BRKPT
;
2271 queue_signal(env
, info
.si_signo
, &info
);
2276 fprintf(stderr
, "qemu: unhandled CPU exception 0x%x - aborting\n",
2278 cpu_dump_state(env
, stderr
, fprintf
, 0);
2281 process_pending_signals(env
);
2284 #endif /* TARGET_M68K */
2287 void cpu_loop (CPUState
*env
)
2290 target_siginfo_t info
;
2293 trapnr
= cpu_alpha_exec (env
);
2297 fprintf(stderr
, "Reset requested. Exit\n");
2301 fprintf(stderr
, "Machine check exception. Exit\n");
2305 fprintf(stderr
, "Arithmetic trap.\n");
2308 case EXCP_HW_INTERRUPT
:
2309 fprintf(stderr
, "External interrupt. Exit\n");
2313 fprintf(stderr
, "MMU data fault\n");
2316 case EXCP_DTB_MISS_PAL
:
2317 fprintf(stderr
, "MMU data TLB miss in PALcode\n");
2321 fprintf(stderr
, "MMU instruction TLB miss\n");
2325 fprintf(stderr
, "MMU instruction access violation\n");
2328 case EXCP_DTB_MISS_NATIVE
:
2329 fprintf(stderr
, "MMU data TLB miss\n");
2333 fprintf(stderr
, "Unaligned access\n");
2337 fprintf(stderr
, "Invalid instruction\n");
2341 fprintf(stderr
, "Floating-point not allowed\n");
2344 case EXCP_CALL_PAL
... (EXCP_CALL_PALP
- 1):
2345 call_pal(env
, (trapnr
>> 6) | 0x80);
2347 case EXCP_CALL_PALP
... (EXCP_CALL_PALE
- 1):
2348 fprintf(stderr
, "Privileged call to PALcode\n");
2355 sig
= gdb_handlesig (env
, TARGET_SIGTRAP
);
2358 info
.si_signo
= sig
;
2360 info
.si_code
= TARGET_TRAP_BRKPT
;
2361 queue_signal(env
, info
.si_signo
, &info
);
2366 printf ("Unhandled trap: 0x%x\n", trapnr
);
2367 cpu_dump_state(env
, stderr
, fprintf
, 0);
2370 process_pending_signals (env
);
2373 #endif /* TARGET_ALPHA */
2375 static void usage(void)
2377 printf("qemu-" TARGET_ARCH
" version " QEMU_VERSION QEMU_PKGVERSION
", Copyright (c) 2003-2008 Fabrice Bellard\n"
2378 "usage: qemu-" TARGET_ARCH
" [options] program [arguments...]\n"
2379 "Linux CPU emulator (compiled for %s emulation)\n"
2381 "Standard options:\n"
2382 "-h print this help\n"
2383 "-g port wait gdb connection to port\n"
2384 "-L path set the elf interpreter prefix (default=%s)\n"
2385 "-s size set the stack size in bytes (default=%ld)\n"
2386 "-cpu model select CPU (-cpu ? for list)\n"
2387 "-drop-ld-preload drop LD_PRELOAD for target process\n"
2388 "-E var=value sets/modifies targets environment variable(s)\n"
2389 "-U var unsets targets environment variable(s)\n"
2390 "-0 argv0 forces target process argv[0] to be argv0\n"
2391 #if defined(CONFIG_USE_GUEST_BASE)
2392 "-B address set guest_base address to address\n"
2396 "-d options activate log (logfile=%s)\n"
2397 "-p pagesize set the host page size to 'pagesize'\n"
2398 "-singlestep always run in singlestep mode\n"
2399 "-strace log system calls\n"
2401 "Environment variables:\n"
2402 "QEMU_STRACE Print system calls and arguments similar to the\n"
2403 " 'strace' program. Enable by setting to any value.\n"
2404 "You can use -E and -U options to set/unset environment variables\n"
2405 "for target process. It is possible to provide several variables\n"
2406 "by repeating the option. For example:\n"
2407 " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
2408 "Note that if you provide several changes to single variable\n"
2409 "last change will stay in effect.\n"
2418 THREAD CPUState
*thread_env
;
2420 void task_settid(TaskState
*ts
)
2422 if (ts
->ts_tid
== 0) {
2423 #ifdef CONFIG_USE_NPTL
2424 ts
->ts_tid
= (pid_t
)syscall(SYS_gettid
);
2426 /* when no threads are used, tid becomes pid */
2427 ts
->ts_tid
= getpid();
2432 void stop_all_tasks(void)
2435 * We trust that when using NPTL, start_exclusive()
2436 * handles thread stopping correctly.
2441 /* Assumes contents are already zeroed. */
2442 void init_task_state(TaskState
*ts
)
2447 ts
->first_free
= ts
->sigqueue_table
;
2448 for (i
= 0; i
< MAX_SIGQUEUE_SIZE
- 1; i
++) {
2449 ts
->sigqueue_table
[i
].next
= &ts
->sigqueue_table
[i
+ 1];
2451 ts
->sigqueue_table
[i
].next
= NULL
;
2454 int main(int argc
, char **argv
, char **envp
)
2456 const char *filename
;
2457 const char *cpu_model
;
2458 struct target_pt_regs regs1
, *regs
= ®s1
;
2459 struct image_info info1
, *info
= &info1
;
2460 struct linux_binprm bprm
;
2461 TaskState ts1
, *ts
= &ts1
;
2465 int gdbstub_port
= 0;
2466 char **target_environ
, **wrk
;
2469 envlist_t
*envlist
= NULL
;
2470 const char *argv0
= NULL
;
2477 qemu_cache_utils_init(envp
);
2480 cpu_set_log_filename(DEBUG_LOGFILE
);
2482 if ((envlist
= envlist_create()) == NULL
) {
2483 (void) fprintf(stderr
, "Unable to allocate envlist\n");
2487 /* add current environment into the list */
2488 for (wrk
= environ
; *wrk
!= NULL
; wrk
++) {
2489 (void) envlist_setenv(envlist
, *wrk
);
2502 if (!strcmp(r
, "-")) {
2504 } else if (!strcmp(r
, "d")) {
2506 const CPULogItem
*item
;
2512 mask
= cpu_str_to_log_mask(r
);
2514 printf("Log items (comma separated):\n");
2515 for(item
= cpu_log_items
; item
->mask
!= 0; item
++) {
2516 printf("%-10s %s\n", item
->name
, item
->help
);
2521 } else if (!strcmp(r
, "E")) {
2523 if (envlist_setenv(envlist
, r
) != 0)
2525 } else if (!strcmp(r
, "U")) {
2527 if (envlist_unsetenv(envlist
, r
) != 0)
2529 } else if (!strcmp(r
, "0")) {
2532 } else if (!strcmp(r
, "s")) {
2536 x86_stack_size
= strtol(r
, (char **)&r
, 0);
2537 if (x86_stack_size
<= 0)
2540 x86_stack_size
*= 1024 * 1024;
2541 else if (*r
== 'k' || *r
== 'K')
2542 x86_stack_size
*= 1024;
2543 } else if (!strcmp(r
, "L")) {
2544 interp_prefix
= argv
[optind
++];
2545 } else if (!strcmp(r
, "p")) {
2548 qemu_host_page_size
= atoi(argv
[optind
++]);
2549 if (qemu_host_page_size
== 0 ||
2550 (qemu_host_page_size
& (qemu_host_page_size
- 1)) != 0) {
2551 fprintf(stderr
, "page size must be a power of two\n");
2554 } else if (!strcmp(r
, "g")) {
2557 gdbstub_port
= atoi(argv
[optind
++]);
2558 } else if (!strcmp(r
, "r")) {
2559 qemu_uname_release
= argv
[optind
++];
2560 } else if (!strcmp(r
, "cpu")) {
2561 cpu_model
= argv
[optind
++];
2562 if (cpu_model
== NULL
|| strcmp(cpu_model
, "?") == 0) {
2563 /* XXX: implement xxx_cpu_list for targets that still miss it */
2564 #if defined(cpu_list)
2565 cpu_list(stdout
, &fprintf
);
2569 #if defined(CONFIG_USE_GUEST_BASE)
2570 } else if (!strcmp(r
, "B")) {
2571 guest_base
= strtol(argv
[optind
++], NULL
, 0);
2572 have_guest_base
= 1;
2574 } else if (!strcmp(r
, "drop-ld-preload")) {
2575 (void) envlist_unsetenv(envlist
, "LD_PRELOAD");
2576 } else if (!strcmp(r
, "singlestep")) {
2578 } else if (!strcmp(r
, "strace")) {
2587 filename
= argv
[optind
];
2588 exec_path
= argv
[optind
];
2591 memset(regs
, 0, sizeof(struct target_pt_regs
));
2593 /* Zero out image_info */
2594 memset(info
, 0, sizeof(struct image_info
));
2596 memset(&bprm
, 0, sizeof (bprm
));
2598 /* Scan interp_prefix dir for replacement files. */
2599 init_paths(interp_prefix
);
2601 if (cpu_model
== NULL
) {
2602 #if defined(TARGET_I386)
2603 #ifdef TARGET_X86_64
2604 cpu_model
= "qemu64";
2606 cpu_model
= "qemu32";
2608 #elif defined(TARGET_ARM)
2610 #elif defined(TARGET_M68K)
2612 #elif defined(TARGET_SPARC)
2613 #ifdef TARGET_SPARC64
2614 cpu_model
= "TI UltraSparc II";
2616 cpu_model
= "Fujitsu MB86904";
2618 #elif defined(TARGET_MIPS)
2619 #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
2624 #elif defined(TARGET_PPC)
2634 cpu_exec_init_all(0);
2635 /* NOTE: we need to init the CPU at this stage to get
2636 qemu_host_page_size */
2637 env
= cpu_init(cpu_model
);
2639 fprintf(stderr
, "Unable to find CPU definition\n");
2644 if (getenv("QEMU_STRACE")) {
2648 target_environ
= envlist_to_environ(envlist
, NULL
);
2649 envlist_free(envlist
);
2651 #if defined(CONFIG_USE_GUEST_BASE)
2653 * Now that page sizes are configured in cpu_init() we can do
2654 * proper page alignment for guest_base.
2656 guest_base
= HOST_PAGE_ALIGN(guest_base
);
2659 * Read in mmap_min_addr kernel parameter. This value is used
2660 * When loading the ELF image to determine whether guest_base
2663 * When user has explicitly set the quest base, we skip this
2666 if (!have_guest_base
) {
2669 if ((fp
= fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL
) {
2671 if (fscanf(fp
, "%lu", &tmp
) == 1) {
2672 mmap_min_addr
= tmp
;
2673 qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr
);
2678 #endif /* CONFIG_USE_GUEST_BASE */
2681 * Prepare copy of argv vector for target.
2683 target_argc
= argc
- optind
;
2684 target_argv
= calloc(target_argc
+ 1, sizeof (char *));
2685 if (target_argv
== NULL
) {
2686 (void) fprintf(stderr
, "Unable to allocate memory for target_argv\n");
2691 * If argv0 is specified (using '-0' switch) we replace
2692 * argv[0] pointer with the given one.
2695 if (argv0
!= NULL
) {
2696 target_argv
[i
++] = strdup(argv0
);
2698 for (; i
< target_argc
; i
++) {
2699 target_argv
[i
] = strdup(argv
[optind
+ i
]);
2701 target_argv
[target_argc
] = NULL
;
2703 memset(ts
, 0, sizeof(TaskState
));
2704 init_task_state(ts
);
2705 /* build Task State */
2711 ret
= loader_exec(filename
, target_argv
, target_environ
, regs
,
2714 printf("Error %d while loading %s\n", ret
, filename
);
2718 for (i
= 0; i
< target_argc
; i
++) {
2719 free(target_argv
[i
]);
2723 for (wrk
= target_environ
; *wrk
; wrk
++) {
2727 free(target_environ
);
2729 if (qemu_log_enabled()) {
2730 #if defined(CONFIG_USE_GUEST_BASE)
2731 qemu_log("guest_base 0x%lx\n", guest_base
);
2735 qemu_log("start_brk 0x" TARGET_ABI_FMT_lx
"\n", info
->start_brk
);
2736 qemu_log("end_code 0x" TARGET_ABI_FMT_lx
"\n", info
->end_code
);
2737 qemu_log("start_code 0x" TARGET_ABI_FMT_lx
"\n",
2739 qemu_log("start_data 0x" TARGET_ABI_FMT_lx
"\n",
2741 qemu_log("end_data 0x" TARGET_ABI_FMT_lx
"\n", info
->end_data
);
2742 qemu_log("start_stack 0x" TARGET_ABI_FMT_lx
"\n",
2744 qemu_log("brk 0x" TARGET_ABI_FMT_lx
"\n", info
->brk
);
2745 qemu_log("entry 0x" TARGET_ABI_FMT_lx
"\n", info
->entry
);
2748 target_set_brk(info
->brk
);
2752 #if defined(TARGET_I386)
2753 cpu_x86_set_cpl(env
, 3);
2755 env
->cr
[0] = CR0_PG_MASK
| CR0_WP_MASK
| CR0_PE_MASK
;
2756 env
->hflags
|= HF_PE_MASK
;
2757 if (env
->cpuid_features
& CPUID_SSE
) {
2758 env
->cr
[4] |= CR4_OSFXSR_MASK
;
2759 env
->hflags
|= HF_OSFXSR_MASK
;
2761 #ifndef TARGET_ABI32
2762 /* enable 64 bit mode if possible */
2763 if (!(env
->cpuid_ext2_features
& CPUID_EXT2_LM
)) {
2764 fprintf(stderr
, "The selected x86 CPU does not support 64 bit mode\n");
2767 env
->cr
[4] |= CR4_PAE_MASK
;
2768 env
->efer
|= MSR_EFER_LMA
| MSR_EFER_LME
;
2769 env
->hflags
|= HF_LMA_MASK
;
2772 /* flags setup : we activate the IRQs by default as in user mode */
2773 env
->eflags
|= IF_MASK
;
2775 /* linux register setup */
2776 #ifndef TARGET_ABI32
2777 env
->regs
[R_EAX
] = regs
->rax
;
2778 env
->regs
[R_EBX
] = regs
->rbx
;
2779 env
->regs
[R_ECX
] = regs
->rcx
;
2780 env
->regs
[R_EDX
] = regs
->rdx
;
2781 env
->regs
[R_ESI
] = regs
->rsi
;
2782 env
->regs
[R_EDI
] = regs
->rdi
;
2783 env
->regs
[R_EBP
] = regs
->rbp
;
2784 env
->regs
[R_ESP
] = regs
->rsp
;
2785 env
->eip
= regs
->rip
;
2787 env
->regs
[R_EAX
] = regs
->eax
;
2788 env
->regs
[R_EBX
] = regs
->ebx
;
2789 env
->regs
[R_ECX
] = regs
->ecx
;
2790 env
->regs
[R_EDX
] = regs
->edx
;
2791 env
->regs
[R_ESI
] = regs
->esi
;
2792 env
->regs
[R_EDI
] = regs
->edi
;
2793 env
->regs
[R_EBP
] = regs
->ebp
;
2794 env
->regs
[R_ESP
] = regs
->esp
;
2795 env
->eip
= regs
->eip
;
2798 /* linux interrupt setup */
2799 #ifndef TARGET_ABI32
2800 env
->idt
.limit
= 511;
2802 env
->idt
.limit
= 255;
2804 env
->idt
.base
= target_mmap(0, sizeof(uint64_t) * (env
->idt
.limit
+ 1),
2805 PROT_READ
|PROT_WRITE
,
2806 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2807 idt_table
= g2h(env
->idt
.base
);
2830 /* linux segment setup */
2832 uint64_t *gdt_table
;
2833 env
->gdt
.base
= target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES
,
2834 PROT_READ
|PROT_WRITE
,
2835 MAP_ANONYMOUS
|MAP_PRIVATE
, -1, 0);
2836 env
->gdt
.limit
= sizeof(uint64_t) * TARGET_GDT_ENTRIES
- 1;
2837 gdt_table
= g2h(env
->gdt
.base
);
2839 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2840 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2841 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2843 /* 64 bit code segment */
2844 write_dt(&gdt_table
[__USER_CS
>> 3], 0, 0xfffff,
2845 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2847 (3 << DESC_DPL_SHIFT
) | (0xa << DESC_TYPE_SHIFT
));
2849 write_dt(&gdt_table
[__USER_DS
>> 3], 0, 0xfffff,
2850 DESC_G_MASK
| DESC_B_MASK
| DESC_P_MASK
| DESC_S_MASK
|
2851 (3 << DESC_DPL_SHIFT
) | (0x2 << DESC_TYPE_SHIFT
));
2853 cpu_x86_load_seg(env
, R_CS
, __USER_CS
);
2854 cpu_x86_load_seg(env
, R_SS
, __USER_DS
);
2856 cpu_x86_load_seg(env
, R_DS
, __USER_DS
);
2857 cpu_x86_load_seg(env
, R_ES
, __USER_DS
);
2858 cpu_x86_load_seg(env
, R_FS
, __USER_DS
);
2859 cpu_x86_load_seg(env
, R_GS
, __USER_DS
);
2860 /* This hack makes Wine work... */
2861 env
->segs
[R_FS
].selector
= 0;
2863 cpu_x86_load_seg(env
, R_DS
, 0);
2864 cpu_x86_load_seg(env
, R_ES
, 0);
2865 cpu_x86_load_seg(env
, R_FS
, 0);
2866 cpu_x86_load_seg(env
, R_GS
, 0);
2868 #elif defined(TARGET_ARM)
2871 cpsr_write(env
, regs
->uregs
[16], 0xffffffff);
2872 for(i
= 0; i
< 16; i
++) {
2873 env
->regs
[i
] = regs
->uregs
[i
];
2876 #elif defined(TARGET_SPARC)
2880 env
->npc
= regs
->npc
;
2882 for(i
= 0; i
< 8; i
++)
2883 env
->gregs
[i
] = regs
->u_regs
[i
];
2884 for(i
= 0; i
< 8; i
++)
2885 env
->regwptr
[i
] = regs
->u_regs
[i
+ 8];
2887 #elif defined(TARGET_PPC)
2891 #if defined(TARGET_PPC64)
2892 #if defined(TARGET_ABI32)
2893 env
->msr
&= ~((target_ulong
)1 << MSR_SF
);
2895 env
->msr
|= (target_ulong
)1 << MSR_SF
;
2898 env
->nip
= regs
->nip
;
2899 for(i
= 0; i
< 32; i
++) {
2900 env
->gpr
[i
] = regs
->gpr
[i
];
2903 #elif defined(TARGET_M68K)
2906 env
->dregs
[0] = regs
->d0
;
2907 env
->dregs
[1] = regs
->d1
;
2908 env
->dregs
[2] = regs
->d2
;
2909 env
->dregs
[3] = regs
->d3
;
2910 env
->dregs
[4] = regs
->d4
;
2911 env
->dregs
[5] = regs
->d5
;
2912 env
->dregs
[6] = regs
->d6
;
2913 env
->dregs
[7] = regs
->d7
;
2914 env
->aregs
[0] = regs
->a0
;
2915 env
->aregs
[1] = regs
->a1
;
2916 env
->aregs
[2] = regs
->a2
;
2917 env
->aregs
[3] = regs
->a3
;
2918 env
->aregs
[4] = regs
->a4
;
2919 env
->aregs
[5] = regs
->a5
;
2920 env
->aregs
[6] = regs
->a6
;
2921 env
->aregs
[7] = regs
->usp
;
2923 ts
->sim_syscalls
= 1;
2925 #elif defined(TARGET_MICROBLAZE)
2927 env
->regs
[0] = regs
->r0
;
2928 env
->regs
[1] = regs
->r1
;
2929 env
->regs
[2] = regs
->r2
;
2930 env
->regs
[3] = regs
->r3
;
2931 env
->regs
[4] = regs
->r4
;
2932 env
->regs
[5] = regs
->r5
;
2933 env
->regs
[6] = regs
->r6
;
2934 env
->regs
[7] = regs
->r7
;
2935 env
->regs
[8] = regs
->r8
;
2936 env
->regs
[9] = regs
->r9
;
2937 env
->regs
[10] = regs
->r10
;
2938 env
->regs
[11] = regs
->r11
;
2939 env
->regs
[12] = regs
->r12
;
2940 env
->regs
[13] = regs
->r13
;
2941 env
->regs
[14] = regs
->r14
;
2942 env
->regs
[15] = regs
->r15
;
2943 env
->regs
[16] = regs
->r16
;
2944 env
->regs
[17] = regs
->r17
;
2945 env
->regs
[18] = regs
->r18
;
2946 env
->regs
[19] = regs
->r19
;
2947 env
->regs
[20] = regs
->r20
;
2948 env
->regs
[21] = regs
->r21
;
2949 env
->regs
[22] = regs
->r22
;
2950 env
->regs
[23] = regs
->r23
;
2951 env
->regs
[24] = regs
->r24
;
2952 env
->regs
[25] = regs
->r25
;
2953 env
->regs
[26] = regs
->r26
;
2954 env
->regs
[27] = regs
->r27
;
2955 env
->regs
[28] = regs
->r28
;
2956 env
->regs
[29] = regs
->r29
;
2957 env
->regs
[30] = regs
->r30
;
2958 env
->regs
[31] = regs
->r31
;
2959 env
->sregs
[SR_PC
] = regs
->pc
;
2961 #elif defined(TARGET_MIPS)
2965 for(i
= 0; i
< 32; i
++) {
2966 env
->active_tc
.gpr
[i
] = regs
->regs
[i
];
2968 env
->active_tc
.PC
= regs
->cp0_epc
;
2970 #elif defined(TARGET_SH4)
2974 for(i
= 0; i
< 16; i
++) {
2975 env
->gregs
[i
] = regs
->regs
[i
];
2979 #elif defined(TARGET_ALPHA)
2983 for(i
= 0; i
< 28; i
++) {
2984 env
->ir
[i
] = ((abi_ulong
*)regs
)[i
];
2986 env
->ipr
[IPR_USP
] = regs
->usp
;
2987 env
->ir
[30] = regs
->usp
;
2989 env
->unique
= regs
->unique
;
2991 #elif defined(TARGET_CRIS)
2993 env
->regs
[0] = regs
->r0
;
2994 env
->regs
[1] = regs
->r1
;
2995 env
->regs
[2] = regs
->r2
;
2996 env
->regs
[3] = regs
->r3
;
2997 env
->regs
[4] = regs
->r4
;
2998 env
->regs
[5] = regs
->r5
;
2999 env
->regs
[6] = regs
->r6
;
3000 env
->regs
[7] = regs
->r7
;
3001 env
->regs
[8] = regs
->r8
;
3002 env
->regs
[9] = regs
->r9
;
3003 env
->regs
[10] = regs
->r10
;
3004 env
->regs
[11] = regs
->r11
;
3005 env
->regs
[12] = regs
->r12
;
3006 env
->regs
[13] = regs
->r13
;
3007 env
->regs
[14] = info
->start_stack
;
3008 env
->regs
[15] = regs
->acr
;
3009 env
->pc
= regs
->erp
;
3012 #error unsupported target CPU
3015 #if defined(TARGET_ARM) || defined(TARGET_M68K)
3016 ts
->stack_base
= info
->start_stack
;
3017 ts
->heap_base
= info
->brk
;
3018 /* This will be filled in on the first SYS_HEAPINFO call. */
3023 gdbserver_start (gdbstub_port
);
3024 gdb_handlesig(env
, 0);