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target/ppc/kvm: Convert DPRINTF to traces
[qemu.git] / hw / mips / mips_fulong2e.c
blob9d7480ed31714582561a959a4918e746bd2cc0fd
1 /*
2 * QEMU fulong 2e mini pc support
3 *
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
5 * Copyright (c) 2009 chenming (chenming@rdc.faw.com.cn)
6 * Copyright (c) 2010 Huacai Chen (zltjiangshi@gmail.com)
7 * This code is licensed under the GNU GPL v2.
8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
11 */
12
13 /*
14 * Fulong 2e mini pc is based on ICT/ST Loongson 2e CPU (MIPS III like, 800MHz)
15 * http://www.linux-mips.org/wiki/Fulong
16 *
17 * Loongson 2e user manual:
18 * http://www.loongsondeveloper.com/doc/Loongson2EUserGuide.pdf
19 */
20
21 #include "qemu/osdep.h"
22 #include "qemu/units.h"
23 #include "qapi/error.h"
24 #include "cpu.h"
25 #include "hw/hw.h"
26 #include "hw/i386/pc.h"
27 #include "hw/dma/i8257.h"
28 #include "hw/isa/superio.h"
29 #include "net/net.h"
30 #include "hw/boards.h"
31 #include "hw/i2c/smbus_eeprom.h"
32 #include "hw/block/flash.h"
33 #include "hw/mips/mips.h"
34 #include "hw/mips/cpudevs.h"
35 #include "hw/pci/pci.h"
36 #include "audio/audio.h"
37 #include "qemu/log.h"
38 #include "hw/loader.h"
39 #include "hw/ide.h"
40 #include "elf.h"
41 #include "hw/isa/vt82c686.h"
42 #include "hw/timer/mc146818rtc.h"
43 #include "hw/timer/i8254.h"
44 #include "exec/address-spaces.h"
45 #include "sysemu/qtest.h"
46 #include "qemu/error-report.h"
47
48 #define DEBUG_FULONG2E_INIT
49
50 #define ENVP_ADDR 0x80002000l
51 #define ENVP_NB_ENTRIES 16
52 #define ENVP_ENTRY_SIZE 256
53
54 /* fulong 2e has a 512k flash: Winbond W39L040AP70Z */
55 #define BIOS_SIZE (512 * KiB)
56 #define MAX_IDE_BUS 2
57
58 /*
59 * PMON is not part of qemu and released with BSD license, anyone
60 * who want to build a pmon binary please first git-clone the source
61 * from the git repository at:
62 * http://www.loongson.cn/support/git/pmon
63 * Then follow the "Compile Guide" available at:
64 * http://dev.lemote.com/code/pmon
65 *
66 * Notes:
67 * 1, don't use the source at http://dev.lemote.com/http_git/pmon.git
68 * 2, use "Bonito2edev" to replace "dir_corresponding_to_your_target_hardware"
69 * in the "Compile Guide".
70 */
71 #define FULONG_BIOSNAME "pmon_fulong2e.bin"
72
73 /* PCI SLOT in fulong 2e */
74 #define FULONG2E_VIA_SLOT 5
75 #define FULONG2E_ATI_SLOT 6
76 #define FULONG2E_RTL8139_SLOT 7
77
78 static struct _loaderparams {
79 int ram_size;
80 const char *kernel_filename;
81 const char *kernel_cmdline;
82 const char *initrd_filename;
83 } loaderparams;
84
85 static void GCC_FMT_ATTR(3, 4) prom_set(uint32_t* prom_buf, int index,
86 const char *string, ...)
87 {
88 va_list ap;
89 int32_t table_addr;
90
91 if (index >= ENVP_NB_ENTRIES)
92 return;
93
94 if (string == NULL) {
95 prom_buf[index] = 0;
96 return;
97 }
98
99 table_addr = sizeof(int32_t) * ENVP_NB_ENTRIES + index * ENVP_ENTRY_SIZE;
100 prom_buf[index] = tswap32(ENVP_ADDR + table_addr);
101
102 va_start(ap, string);
103 vsnprintf((char *)prom_buf + table_addr, ENVP_ENTRY_SIZE, string, ap);
104 va_end(ap);
105 }
106
107 static int64_t load_kernel (CPUMIPSState *env)
108 {
109 int64_t kernel_entry, kernel_low, kernel_high, initrd_size;
110 int index = 0;
111 long kernel_size;
112 ram_addr_t initrd_offset;
113 uint32_t *prom_buf;
114 long prom_size;
115
116 kernel_size = load_elf(loaderparams.kernel_filename, NULL,
117 cpu_mips_kseg0_to_phys, NULL,
118 (uint64_t *)&kernel_entry,
119 (uint64_t *)&kernel_low, (uint64_t *)&kernel_high,
120 0, EM_MIPS, 1, 0);
121 if (kernel_size < 0) {
122 error_report("could not load kernel '%s': %s",
123 loaderparams.kernel_filename,
124 load_elf_strerror(kernel_size));
125 exit(1);
126 }
127
128 /* load initrd */
129 initrd_size = 0;
130 initrd_offset = 0;
131 if (loaderparams.initrd_filename) {
132 initrd_size = get_image_size (loaderparams.initrd_filename);
133 if (initrd_size > 0) {
134 initrd_offset = (kernel_high + ~INITRD_PAGE_MASK) & INITRD_PAGE_MASK;
135 if (initrd_offset + initrd_size > ram_size) {
136 error_report("memory too small for initial ram disk '%s'",
137 loaderparams.initrd_filename);
138 exit(1);
139 }
140 initrd_size = load_image_targphys(loaderparams.initrd_filename,
141 initrd_offset, ram_size - initrd_offset);
142 }
143 if (initrd_size == (target_ulong) -1) {
144 error_report("could not load initial ram disk '%s'",
145 loaderparams.initrd_filename);
146 exit(1);
147 }
148 }
149
150 /* Setup prom parameters. */
151 prom_size = ENVP_NB_ENTRIES * (sizeof(int32_t) + ENVP_ENTRY_SIZE);
152 prom_buf = g_malloc(prom_size);
153
154 prom_set(prom_buf, index++, "%s", loaderparams.kernel_filename);
155 if (initrd_size > 0) {
156 prom_set(prom_buf, index++, "rd_start=0x%" PRIx64 " rd_size=%" PRId64 " %s",
157 cpu_mips_phys_to_kseg0(NULL, initrd_offset), initrd_size,
158 loaderparams.kernel_cmdline);
159 } else {
160 prom_set(prom_buf, index++, "%s", loaderparams.kernel_cmdline);
161 }
162
163 /* Setup minimum environment variables */
164 prom_set(prom_buf, index++, "busclock=33000000");
165 prom_set(prom_buf, index++, "cpuclock=100000000");
166 prom_set(prom_buf, index++, "memsize=%"PRIi64, loaderparams.ram_size / MiB);
167 prom_set(prom_buf, index++, "modetty0=38400n8r");
168 prom_set(prom_buf, index++, NULL);
169
170 rom_add_blob_fixed("prom", prom_buf, prom_size,
171 cpu_mips_kseg0_to_phys(NULL, ENVP_ADDR));
172
173 g_free(prom_buf);
174 return kernel_entry;
175 }
176
177 static void write_bootloader (CPUMIPSState *env, uint8_t *base, int64_t kernel_addr)
178 {
179 uint32_t *p;
180
181 /* Small bootloader */
182 p = (uint32_t *) base;
183
184 stl_p(p++, 0x0bf00010); /* j 0x1fc00040 */
185 stl_p(p++, 0x00000000); /* nop */
186
187 /* Second part of the bootloader */
188 p = (uint32_t *) (base + 0x040);
189
190 stl_p(p++, 0x3c040000); /* lui a0, 0 */
191 stl_p(p++, 0x34840002); /* ori a0, a0, 2 */
192 stl_p(p++, 0x3c050000 | ((ENVP_ADDR >> 16) & 0xffff)); /* lui a1, high(ENVP_ADDR) */
193 stl_p(p++, 0x34a50000 | (ENVP_ADDR & 0xffff)); /* ori a1, a0, low(ENVP_ADDR) */
194 stl_p(p++, 0x3c060000 | (((ENVP_ADDR + 8) >> 16) & 0xffff)); /* lui a2, high(ENVP_ADDR + 8) */
195 stl_p(p++, 0x34c60000 | ((ENVP_ADDR + 8) & 0xffff)); /* ori a2, a2, low(ENVP_ADDR + 8) */
196 stl_p(p++, 0x3c070000 | (loaderparams.ram_size >> 16)); /* lui a3, high(env->ram_size) */
197 stl_p(p++, 0x34e70000 | (loaderparams.ram_size & 0xffff)); /* ori a3, a3, low(env->ram_size) */
198 stl_p(p++, 0x3c1f0000 | ((kernel_addr >> 16) & 0xffff)); /* lui ra, high(kernel_addr) */;
199 stl_p(p++, 0x37ff0000 | (kernel_addr & 0xffff)); /* ori ra, ra, low(kernel_addr) */
200 stl_p(p++, 0x03e00008); /* jr ra */
201 stl_p(p++, 0x00000000); /* nop */
202 }
203
204
205 static void main_cpu_reset(void *opaque)
206 {
207 MIPSCPU *cpu = opaque;
208 CPUMIPSState *env = &cpu->env;
209
210 cpu_reset(CPU(cpu));
211 /* TODO: 2E reset stuff */
212 if (loaderparams.kernel_filename) {
213 env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL));
214 }
215 }
216
217 static void vt82c686b_southbridge_init(PCIBus *pci_bus, int slot, qemu_irq intc,
218 I2CBus **i2c_bus, ISABus **p_isa_bus)
219 {
220 qemu_irq *i8259;
221 ISABus *isa_bus;
222 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
223
224 isa_bus = vt82c686b_isa_init(pci_bus, PCI_DEVFN(slot, 0));
225 if (!isa_bus) {
226 fprintf(stderr, "vt82c686b_init error\n");
227 exit(1);
228 }
229 *p_isa_bus = isa_bus;
230 /* Interrupt controller */
231 /* The 8259 -> IP5 */
232 i8259 = i8259_init(isa_bus, intc);
233 isa_bus_irqs(isa_bus, i8259);
234 /* init other devices */
235 i8254_pit_init(isa_bus, 0x40, 0, NULL);
236 i8257_dma_init(isa_bus, 0);
237 /* Super I/O */
238 isa_create_simple(isa_bus, TYPE_VT82C686B_SUPERIO);
239
240 ide_drive_get(hd, ARRAY_SIZE(hd));
241 via_ide_init(pci_bus, hd, PCI_DEVFN(slot, 1));
242
243 pci_create_simple(pci_bus, PCI_DEVFN(slot, 2), "vt82c686b-usb-uhci");
244 pci_create_simple(pci_bus, PCI_DEVFN(slot, 3), "vt82c686b-usb-uhci");
245
246 *i2c_bus = vt82c686b_pm_init(pci_bus, PCI_DEVFN(slot, 4), 0xeee1, NULL);
247
248 /* Audio support */
249 vt82c686b_ac97_init(pci_bus, PCI_DEVFN(slot, 5));
250 vt82c686b_mc97_init(pci_bus, PCI_DEVFN(slot, 6));
251 }
252
253 /* Network support */
254 static void network_init (PCIBus *pci_bus)
255 {
256 int i;
257
258 for(i = 0; i < nb_nics; i++) {
259 NICInfo *nd = &nd_table[i];
260 const char *default_devaddr = NULL;
261
262 if (i == 0 && (!nd->model || strcmp(nd->model, "rtl8139") == 0)) {
263 /* The fulong board has a RTL8139 card using PCI SLOT 7 */
264 default_devaddr = "07";
265 }
266
267 pci_nic_init_nofail(nd, pci_bus, "rtl8139", default_devaddr);
268 }
269 }
270
271 static void mips_fulong2e_init(MachineState *machine)
272 {
273 const char *kernel_filename = machine->kernel_filename;
274 const char *kernel_cmdline = machine->kernel_cmdline;
275 const char *initrd_filename = machine->initrd_filename;
276 char *filename;
277 MemoryRegion *address_space_mem = get_system_memory();
278 MemoryRegion *ram = g_new(MemoryRegion, 1);
279 MemoryRegion *bios = g_new(MemoryRegion, 1);
280 ram_addr_t ram_size = machine->ram_size;
281 long bios_size;
282 uint8_t *spd_data;
283 Error *err = NULL;
284 int64_t kernel_entry;
285 PCIBus *pci_bus;
286 ISABus *isa_bus;
287 I2CBus *smbus;
288 MIPSCPU *cpu;
289 CPUMIPSState *env;
290 DeviceState *dev;
291
292 /* init CPUs */
293 cpu = MIPS_CPU(cpu_create(machine->cpu_type));
294 env = &cpu->env;
295
296 qemu_register_reset(main_cpu_reset, cpu);
297
298 /* TODO: support more than 256M RAM as highmem */
299 ram_size = 256 * MiB;
300
301 /* allocate RAM */
302 memory_region_allocate_system_memory(ram, NULL, "fulong2e.ram", ram_size);
303 memory_region_init_ram(bios, NULL, "fulong2e.bios", BIOS_SIZE,
304 &error_fatal);
305 memory_region_set_readonly(bios, true);
306
307 memory_region_add_subregion(address_space_mem, 0, ram);
308 memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios);
309
310 /* We do not support flash operation, just loading pmon.bin as raw BIOS.
311 * Please use -L to set the BIOS path and -bios to set bios name. */
312
313 if (kernel_filename) {
314 loaderparams.ram_size = ram_size;
315 loaderparams.kernel_filename = kernel_filename;
316 loaderparams.kernel_cmdline = kernel_cmdline;
317 loaderparams.initrd_filename = initrd_filename;
318 kernel_entry = load_kernel (env);
319 write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry);
320 } else {
321 if (bios_name == NULL) {
322 bios_name = FULONG_BIOSNAME;
323 }
324 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
325 if (filename) {
326 bios_size = load_image_targphys(filename, 0x1fc00000LL,
327 BIOS_SIZE);
328 g_free(filename);
329 } else {
330 bios_size = -1;
331 }
332
333 if ((bios_size < 0 || bios_size > BIOS_SIZE) &&
334 !kernel_filename && !qtest_enabled()) {
335 error_report("Could not load MIPS bios '%s'", bios_name);
336 exit(1);
337 }
338 }
339
340 /* Init internal devices */
341 cpu_mips_irq_init_cpu(cpu);
342 cpu_mips_clock_init(cpu);
343
344 /* North bridge, Bonito --> IP2 */
345 pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
346
347 /* South bridge -> IP5 */
348 vt82c686b_southbridge_init(pci_bus, FULONG2E_VIA_SLOT, env->irq[5],
349 &smbus, &isa_bus);
350
351 /* GPU */
352 dev = DEVICE(pci_create(pci_bus, -1, "ati-vga"));
353 qdev_prop_set_uint32(dev, "vgamem_mb", 16);
354 qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
355 qdev_init_nofail(dev);
356
357 /* Populate SPD eeprom data */
358 spd_data = spd_data_generate(DDR, ram_size, &err);
359 if (err) {
360 warn_report_err(err);
361 }
362 if (spd_data) {
363 smbus_eeprom_init_one(smbus, 0x50, spd_data);
364 }
365
366 mc146818_rtc_init(isa_bus, 2000, NULL);
367
368 /* Network card: RTL8139D */
369 network_init(pci_bus);
370 }
371
372 static void mips_fulong2e_machine_init(MachineClass *mc)
373 {
374 mc->desc = "Fulong 2e mini pc";
375 mc->init = mips_fulong2e_init;
376 mc->block_default_type = IF_IDE;
377 mc->default_cpu_type = MIPS_CPU_TYPE_NAME("Loongson-2E");
378 mc->default_ram_size = 256 * MiB;
379 }
380
381 DEFINE_MACHINE("fulong2e", mips_fulong2e_machine_init)
QEmu