2 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
7 * * Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * * Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * * Neither the name of the Open Source and Linux Lab nor the
13 * names of its contributors may be used to endorse or promote products
14 * derived from this software without specific prior written permission.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
20 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
23 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
25 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 #include "qemu-timer.h"
32 void xtensa_advance_ccount(CPUState
*env
, uint32_t d
)
34 uint32_t old_ccount
= env
->sregs
[CCOUNT
];
36 env
->sregs
[CCOUNT
] += d
;
38 if (xtensa_option_enabled(env
->config
, XTENSA_OPTION_TIMER_INTERRUPT
)) {
40 for (i
= 0; i
< env
->config
->nccompare
; ++i
) {
41 if (env
->sregs
[CCOMPARE
+ i
] - old_ccount
<= d
) {
42 xtensa_timer_irq(env
, i
, 1);
48 void check_interrupts(CPUState
*env
)
50 int minlevel
= xtensa_get_cintlevel(env
);
51 uint32_t int_set_enabled
= env
->sregs
[INTSET
] & env
->sregs
[INTENABLE
];
54 /* If the CPU is halted advance CCOUNT according to the vm_clock time
55 * elapsed since the moment when it was advanced last time.
58 int64_t now
= qemu_get_clock_ns(vm_clock
);
60 xtensa_advance_ccount(env
,
61 muldiv64(now
- env
->halt_clock
,
62 env
->config
->clock_freq_khz
, 1000000));
63 env
->halt_clock
= now
;
65 for (level
= env
->config
->nlevel
; level
> minlevel
; --level
) {
66 if (env
->config
->level_mask
[level
] & int_set_enabled
) {
67 env
->pending_irq_level
= level
;
68 cpu_interrupt(env
, CPU_INTERRUPT_HARD
);
69 qemu_log_mask(CPU_LOG_INT
,
70 "%s level = %d, cintlevel = %d, "
71 "pc = %08x, a0 = %08x, ps = %08x, "
72 "intset = %08x, intenable = %08x, "
74 __func__
, level
, xtensa_get_cintlevel(env
),
75 env
->pc
, env
->regs
[0], env
->sregs
[PS
],
76 env
->sregs
[INTSET
], env
->sregs
[INTENABLE
],
81 env
->pending_irq_level
= 0;
82 cpu_reset_interrupt(env
, CPU_INTERRUPT_HARD
);
85 static void xtensa_set_irq(void *opaque
, int irq
, int active
)
87 CPUState
*env
= opaque
;
89 if (irq
>= env
->config
->ninterrupt
) {
90 qemu_log("%s: bad IRQ %d\n", __func__
, irq
);
92 uint32_t irq_bit
= 1 << irq
;
95 env
->sregs
[INTSET
] |= irq_bit
;
96 } else if (env
->config
->interrupt
[irq
].inttype
== INTTYPE_LEVEL
) {
97 env
->sregs
[INTSET
] &= ~irq_bit
;
100 check_interrupts(env
);
104 void xtensa_timer_irq(CPUState
*env
, uint32_t id
, uint32_t active
)
106 qemu_set_irq(env
->irq_inputs
[env
->config
->timerint
[id
]], active
);
109 void xtensa_rearm_ccompare_timer(CPUState
*env
)
112 uint32_t wake_ccount
= env
->sregs
[CCOUNT
] - 1;
114 for (i
= 0; i
< env
->config
->nccompare
; ++i
) {
115 if (env
->sregs
[CCOMPARE
+ i
] - env
->sregs
[CCOUNT
] <
116 wake_ccount
- env
->sregs
[CCOUNT
]) {
117 wake_ccount
= env
->sregs
[CCOMPARE
+ i
];
120 env
->wake_ccount
= wake_ccount
;
121 qemu_mod_timer(env
->ccompare_timer
, env
->halt_clock
+
122 muldiv64(wake_ccount
- env
->sregs
[CCOUNT
],
123 1000000, env
->config
->clock_freq_khz
));
126 static void xtensa_ccompare_cb(void *opaque
)
128 CPUState
*env
= opaque
;
131 env
->halt_clock
= qemu_get_clock_ns(vm_clock
);
132 xtensa_advance_ccount(env
, env
->wake_ccount
- env
->sregs
[CCOUNT
]);
133 if (!cpu_has_work(env
)) {
134 env
->sregs
[CCOUNT
] = env
->wake_ccount
+ 1;
135 xtensa_rearm_ccompare_timer(env
);
140 void xtensa_irq_init(CPUState
*env
)
142 env
->irq_inputs
= (void **)qemu_allocate_irqs(
143 xtensa_set_irq
, env
, env
->config
->ninterrupt
);
144 if (xtensa_option_enabled(env
->config
, XTENSA_OPTION_TIMER_INTERRUPT
) &&
145 env
->config
->nccompare
> 0) {
146 env
->ccompare_timer
=
147 qemu_new_timer_ns(vm_clock
, &xtensa_ccompare_cb
, env
);
151 void *xtensa_get_extint(CPUState
*env
, unsigned extint
)
153 if (extint
< env
->config
->nextint
) {
154 unsigned irq
= env
->config
->extint
[extint
];
155 return env
->irq_inputs
[irq
];
157 qemu_log("%s: trying to acquire invalid external interrupt %d\n",