hw/rtc/ds1338.c

   1 /*
   2  * MAXIM DS1338 I2C RTC+NVRAM
   3  *
   4  * Copyright (c) 2009 CodeSourcery.
   5  * Written by Paul Brook
   6  *
   7  * This code is licensed under the GNU GPL v2.
   8  *
   9  * Contributions after 2012-01-13 are licensed under the terms of the
  10  * GNU GPL, version 2 or (at your option) any later version.
  11  */
  12
  13 #include "qemu/osdep.h"
  14 #include "qemu-common.h"
  15 #include "hw/i2c/i2c.h"
  16 #include "migration/vmstate.h"
  17 #include "qemu/bcd.h"
  18 #include "qemu/module.h"
  19 #include "qom/object.h"
  20
  21 /* Size of NVRAM including both the user-accessible area and the
  22  * secondary register area.
  23  */
  24 #define NVRAM_SIZE 64
  25
  26 /* Flags definitions */
  27 #define SECONDS_CH 0x80
  28 #define HOURS_12   0x40
  29 #define HOURS_PM   0x20
  30 #define CTRL_OSF   0x20
  31
  32 #define TYPE_DS1338 "ds1338"
  33 OBJECT_DECLARE_SIMPLE_TYPE(DS1338State, DS1338)
  34
  35 struct DS1338State {
  36     I2CSlave parent_obj;
  37
  38     int64_t offset;
  39     uint8_t wday_offset;
  40     uint8_t nvram[NVRAM_SIZE];
  41     int32_t ptr;
  42     bool addr_byte;
  43 };
  44
  45 static const VMStateDescription vmstate_ds1338 = {
  46     .name = "ds1338",
  47     .version_id = 2,
  48     .minimum_version_id = 1,
  49     .fields = (VMStateField[]) {
  50         VMSTATE_I2C_SLAVE(parent_obj, DS1338State),
  51         VMSTATE_INT64(offset, DS1338State),
  52         VMSTATE_UINT8_V(wday_offset, DS1338State, 2),
  53         VMSTATE_UINT8_ARRAY(nvram, DS1338State, NVRAM_SIZE),
  54         VMSTATE_INT32(ptr, DS1338State),
  55         VMSTATE_BOOL(addr_byte, DS1338State),
  56         VMSTATE_END_OF_LIST()
  57     }
  58 };
  59
  60 static void capture_current_time(DS1338State *s)
  61 {
  62     /* Capture the current time into the secondary registers
  63      * which will be actually read by the data transfer operation.
  64      */
  65     struct tm now;
  66     qemu_get_timedate(&now, s->offset);
  67     s->nvram[0] = to_bcd(now.tm_sec);
  68     s->nvram[1] = to_bcd(now.tm_min);
  69     if (s->nvram[2] & HOURS_12) {
  70         int tmp = now.tm_hour;
  71         if (tmp % 12 == 0) {
  72             tmp += 12;
  73         }
  74         if (tmp <= 12) {
  75             s->nvram[2] = HOURS_12 | to_bcd(tmp);
  76         } else {
  77             s->nvram[2] = HOURS_12 | HOURS_PM | to_bcd(tmp - 12);
  78         }
  79     } else {
  80         s->nvram[2] = to_bcd(now.tm_hour);
  81     }
  82     s->nvram[3] = (now.tm_wday + s->wday_offset) % 7 + 1;
  83     s->nvram[4] = to_bcd(now.tm_mday);
  84     s->nvram[5] = to_bcd(now.tm_mon + 1);
  85     s->nvram[6] = to_bcd(now.tm_year - 100);
  86 }
  87
  88 static void inc_regptr(DS1338State *s)
  89 {
  90     /* The register pointer wraps around after 0x3F; wraparound
  91      * causes the current time/date to be retransferred into
  92      * the secondary registers.
  93      */
  94     s->ptr = (s->ptr + 1) & (NVRAM_SIZE - 1);
  95     if (!s->ptr) {
  96         capture_current_time(s);
  97     }
  98 }
  99
 100 static int ds1338_event(I2CSlave *i2c, enum i2c_event event)
 101 {
 102     DS1338State *s = DS1338(i2c);
 103
 104     switch (event) {
 105     case I2C_START_RECV:
 106         /* In h/w, capture happens on any START condition, not just a
 107          * START_RECV, but there is no need to actually capture on
 108          * START_SEND, because the guest can't get at that data
 109          * without going through a START_RECV which would overwrite it.
 110          */
 111         capture_current_time(s);
 112         break;
 113     case I2C_START_SEND:
 114         s->addr_byte = true;
 115         break;
 116     default:
 117         break;
 118     }
 119
 120     return 0;
 121 }
 122
 123 static uint8_t ds1338_recv(I2CSlave *i2c)
 124 {
 125     DS1338State *s = DS1338(i2c);
 126     uint8_t res;
 127
 128     res  = s->nvram[s->ptr];
 129     inc_regptr(s);
 130     return res;
 131 }
 132
 133 static int ds1338_send(I2CSlave *i2c, uint8_t data)
 134 {
 135     DS1338State *s = DS1338(i2c);
 136
 137     if (s->addr_byte) {
 138         s->ptr = data & (NVRAM_SIZE - 1);
 139         s->addr_byte = false;
 140         return 0;
 141     }
 142     if (s->ptr < 7) {
 143         /* Time register. */
 144         struct tm now;
 145         qemu_get_timedate(&now, s->offset);
 146         switch(s->ptr) {
 147         case 0:
 148             /* TODO: Implement CH (stop) bit.  */
 149             now.tm_sec = from_bcd(data & 0x7f);
 150             break;
 151         case 1:
 152             now.tm_min = from_bcd(data & 0x7f);
 153             break;
 154         case 2:
 155             if (data & HOURS_12) {
 156                 int tmp = from_bcd(data & (HOURS_PM - 1));
 157                 if (data & HOURS_PM) {
 158                     tmp += 12;
 159                 }
 160                 if (tmp % 12 == 0) {
 161                     tmp -= 12;
 162                 }
 163                 now.tm_hour = tmp;
 164             } else {
 165                 now.tm_hour = from_bcd(data & (HOURS_12 - 1));
 166             }
 167             break;
 168         case 3:
 169             {
 170                 /* The day field is supposed to contain a value in
 171                    the range 1-7. Otherwise behavior is undefined.
 172                  */
 173                 int user_wday = (data & 7) - 1;
 174                 s->wday_offset = (user_wday - now.tm_wday + 7) % 7;
 175             }
 176             break;
 177         case 4:
 178             now.tm_mday = from_bcd(data & 0x3f);
 179             break;
 180         case 5:
 181             now.tm_mon = from_bcd(data & 0x1f) - 1;
 182             break;
 183         case 6:
 184             now.tm_year = from_bcd(data) + 100;
 185             break;
 186         }
 187         s->offset = qemu_timedate_diff(&now);
 188     } else if (s->ptr == 7) {
 189         /* Control register. */
 190
 191         /* Ensure bits 2, 3 and 6 will read back as zero. */
 192         data &= 0xB3;
 193
 194         /* Attempting to write the OSF flag to logic 1 leaves the
 195            value unchanged. */
 196         data = (data & ~CTRL_OSF) | (data & s->nvram[s->ptr] & CTRL_OSF);
 197
 198         s->nvram[s->ptr] = data;
 199     } else {
 200         s->nvram[s->ptr] = data;
 201     }
 202     inc_regptr(s);
 203     return 0;
 204 }
 205
 206 static void ds1338_reset(DeviceState *dev)
 207 {
 208     DS1338State *s = DS1338(dev);
 209
 210     /* The clock is running and synchronized with the host */
 211     s->offset = 0;
 212     s->wday_offset = 0;
 213     memset(s->nvram, 0, NVRAM_SIZE);
 214     s->ptr = 0;
 215     s->addr_byte = false;
 216 }
 217
 218 static void ds1338_class_init(ObjectClass *klass, void *data)
 219 {
 220     DeviceClass *dc = DEVICE_CLASS(klass);
 221     I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
 222
 223     k->event = ds1338_event;
 224     k->recv = ds1338_recv;
 225     k->send = ds1338_send;
 226     dc->reset = ds1338_reset;
 227     dc->vmsd = &vmstate_ds1338;
 228 }
 229
 230 static const TypeInfo ds1338_info = {
 231     .name          = TYPE_DS1338,
 232     .parent        = TYPE_I2C_SLAVE,
 233     .instance_size = sizeof(DS1338State),
 234     .class_init    = ds1338_class_init,
 235 };
 236
 237 static void ds1338_register_types(void)
 238 {
 239     type_register_static(&ds1338_info);
 240 }
 241
 242 type_init(ds1338_register_types)