spapr_drc.c: handle hotunplug errors in drc_unisolate_logical()
[qemu.git] / hw / acpi / cpu.c
blobe2317be546b3770e04ddcdca72a1aafb8a2f671c
1 #include "qemu/osdep.h"
2 #include "hw/boards.h"
3 #include "migration/vmstate.h"
4 #include "hw/acpi/cpu.h"
5 #include "qapi/error.h"
6 #include "qapi/qapi-events-acpi.h"
7 #include "trace.h"
8 #include "sysemu/numa.h"
10 #define ACPI_CPU_HOTPLUG_REG_LEN 12
11 #define ACPI_CPU_SELECTOR_OFFSET_WR 0
12 #define ACPI_CPU_FLAGS_OFFSET_RW 4
13 #define ACPI_CPU_CMD_OFFSET_WR 5
14 #define ACPI_CPU_CMD_DATA_OFFSET_RW 8
15 #define ACPI_CPU_CMD_DATA2_OFFSET_R 0
17 #define OVMF_CPUHP_SMI_CMD 4
19 enum {
20 CPHP_GET_NEXT_CPU_WITH_EVENT_CMD = 0,
21 CPHP_OST_EVENT_CMD = 1,
22 CPHP_OST_STATUS_CMD = 2,
23 CPHP_GET_CPU_ID_CMD = 3,
24 CPHP_CMD_MAX
27 static ACPIOSTInfo *acpi_cpu_device_status(int idx, AcpiCpuStatus *cdev)
29 ACPIOSTInfo *info = g_new0(ACPIOSTInfo, 1);
31 info->slot_type = ACPI_SLOT_TYPE_CPU;
32 info->slot = g_strdup_printf("%d", idx);
33 info->source = cdev->ost_event;
34 info->status = cdev->ost_status;
35 if (cdev->cpu) {
36 DeviceState *dev = DEVICE(cdev->cpu);
37 if (dev->id) {
38 info->device = g_strdup(dev->id);
39 info->has_device = true;
42 return info;
45 void acpi_cpu_ospm_status(CPUHotplugState *cpu_st, ACPIOSTInfoList ***list)
47 ACPIOSTInfoList ***tail = list;
48 int i;
50 for (i = 0; i < cpu_st->dev_count; i++) {
51 QAPI_LIST_APPEND(*tail, acpi_cpu_device_status(i, &cpu_st->devs[i]));
55 static uint64_t cpu_hotplug_rd(void *opaque, hwaddr addr, unsigned size)
57 uint64_t val = 0;
58 CPUHotplugState *cpu_st = opaque;
59 AcpiCpuStatus *cdev;
61 if (cpu_st->selector >= cpu_st->dev_count) {
62 return val;
65 cdev = &cpu_st->devs[cpu_st->selector];
66 switch (addr) {
67 case ACPI_CPU_FLAGS_OFFSET_RW: /* pack and return is_* fields */
68 val |= cdev->cpu ? 1 : 0;
69 val |= cdev->is_inserting ? 2 : 0;
70 val |= cdev->is_removing ? 4 : 0;
71 val |= cdev->fw_remove ? 16 : 0;
72 trace_cpuhp_acpi_read_flags(cpu_st->selector, val);
73 break;
74 case ACPI_CPU_CMD_DATA_OFFSET_RW:
75 switch (cpu_st->command) {
76 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
77 val = cpu_st->selector;
78 break;
79 case CPHP_GET_CPU_ID_CMD:
80 val = cdev->arch_id & 0xFFFFFFFF;
81 break;
82 default:
83 break;
85 trace_cpuhp_acpi_read_cmd_data(cpu_st->selector, val);
86 break;
87 case ACPI_CPU_CMD_DATA2_OFFSET_R:
88 switch (cpu_st->command) {
89 case CPHP_GET_NEXT_CPU_WITH_EVENT_CMD:
90 val = 0;
91 break;
92 case CPHP_GET_CPU_ID_CMD:
93 val = cdev->arch_id >> 32;
94 break;
95 default:
96 break;
98 trace_cpuhp_acpi_read_cmd_data2(cpu_st->selector, val);
99 break;
100 default:
101 break;
103 return val;
106 static void cpu_hotplug_wr(void *opaque, hwaddr addr, uint64_t data,
107 unsigned int size)
109 CPUHotplugState *cpu_st = opaque;
110 AcpiCpuStatus *cdev;
111 ACPIOSTInfo *info;
113 assert(cpu_st->dev_count);
115 if (addr) {
116 if (cpu_st->selector >= cpu_st->dev_count) {
117 trace_cpuhp_acpi_invalid_idx_selected(cpu_st->selector);
118 return;
122 switch (addr) {
123 case ACPI_CPU_SELECTOR_OFFSET_WR: /* current CPU selector */
124 cpu_st->selector = data;
125 trace_cpuhp_acpi_write_idx(cpu_st->selector);
126 break;
127 case ACPI_CPU_FLAGS_OFFSET_RW: /* set is_* fields */
128 cdev = &cpu_st->devs[cpu_st->selector];
129 if (data & 2) { /* clear insert event */
130 cdev->is_inserting = false;
131 trace_cpuhp_acpi_clear_inserting_evt(cpu_st->selector);
132 } else if (data & 4) { /* clear remove event */
133 cdev->is_removing = false;
134 trace_cpuhp_acpi_clear_remove_evt(cpu_st->selector);
135 } else if (data & 8) {
136 DeviceState *dev = NULL;
137 HotplugHandler *hotplug_ctrl = NULL;
139 if (!cdev->cpu || cdev->cpu == first_cpu) {
140 trace_cpuhp_acpi_ejecting_invalid_cpu(cpu_st->selector);
141 break;
144 trace_cpuhp_acpi_ejecting_cpu(cpu_st->selector);
145 dev = DEVICE(cdev->cpu);
146 hotplug_ctrl = qdev_get_hotplug_handler(dev);
147 hotplug_handler_unplug(hotplug_ctrl, dev, NULL);
148 object_unparent(OBJECT(dev));
149 cdev->fw_remove = false;
150 } else if (data & 16) {
151 if (!cdev->cpu || cdev->cpu == first_cpu) {
152 trace_cpuhp_acpi_fw_remove_invalid_cpu(cpu_st->selector);
153 break;
155 trace_cpuhp_acpi_fw_remove_cpu(cpu_st->selector);
156 cdev->fw_remove = true;
158 break;
159 case ACPI_CPU_CMD_OFFSET_WR:
160 trace_cpuhp_acpi_write_cmd(cpu_st->selector, data);
161 if (data < CPHP_CMD_MAX) {
162 cpu_st->command = data;
163 if (cpu_st->command == CPHP_GET_NEXT_CPU_WITH_EVENT_CMD) {
164 uint32_t iter = cpu_st->selector;
166 do {
167 cdev = &cpu_st->devs[iter];
168 if (cdev->is_inserting || cdev->is_removing ||
169 cdev->fw_remove) {
170 cpu_st->selector = iter;
171 trace_cpuhp_acpi_cpu_has_events(cpu_st->selector,
172 cdev->is_inserting, cdev->is_removing);
173 break;
175 iter = iter + 1 < cpu_st->dev_count ? iter + 1 : 0;
176 } while (iter != cpu_st->selector);
179 break;
180 case ACPI_CPU_CMD_DATA_OFFSET_RW:
181 switch (cpu_st->command) {
182 case CPHP_OST_EVENT_CMD: {
183 cdev = &cpu_st->devs[cpu_st->selector];
184 cdev->ost_event = data;
185 trace_cpuhp_acpi_write_ost_ev(cpu_st->selector, cdev->ost_event);
186 break;
188 case CPHP_OST_STATUS_CMD: {
189 cdev = &cpu_st->devs[cpu_st->selector];
190 cdev->ost_status = data;
191 info = acpi_cpu_device_status(cpu_st->selector, cdev);
192 qapi_event_send_acpi_device_ost(info);
193 qapi_free_ACPIOSTInfo(info);
194 trace_cpuhp_acpi_write_ost_status(cpu_st->selector,
195 cdev->ost_status);
196 break;
198 default:
199 break;
201 break;
202 default:
203 break;
207 static const MemoryRegionOps cpu_hotplug_ops = {
208 .read = cpu_hotplug_rd,
209 .write = cpu_hotplug_wr,
210 .endianness = DEVICE_LITTLE_ENDIAN,
211 .valid = {
212 .min_access_size = 1,
213 .max_access_size = 4,
217 void cpu_hotplug_hw_init(MemoryRegion *as, Object *owner,
218 CPUHotplugState *state, hwaddr base_addr)
220 MachineState *machine = MACHINE(qdev_get_machine());
221 MachineClass *mc = MACHINE_GET_CLASS(machine);
222 const CPUArchIdList *id_list;
223 int i;
225 assert(mc->possible_cpu_arch_ids);
226 id_list = mc->possible_cpu_arch_ids(machine);
227 state->dev_count = id_list->len;
228 state->devs = g_new0(typeof(*state->devs), state->dev_count);
229 for (i = 0; i < id_list->len; i++) {
230 state->devs[i].cpu = CPU(id_list->cpus[i].cpu);
231 state->devs[i].arch_id = id_list->cpus[i].arch_id;
233 memory_region_init_io(&state->ctrl_reg, owner, &cpu_hotplug_ops, state,
234 "acpi-cpu-hotplug", ACPI_CPU_HOTPLUG_REG_LEN);
235 memory_region_add_subregion(as, base_addr, &state->ctrl_reg);
238 static AcpiCpuStatus *get_cpu_status(CPUHotplugState *cpu_st, DeviceState *dev)
240 CPUClass *k = CPU_GET_CLASS(dev);
241 uint64_t cpu_arch_id = k->get_arch_id(CPU(dev));
242 int i;
244 for (i = 0; i < cpu_st->dev_count; i++) {
245 if (cpu_arch_id == cpu_st->devs[i].arch_id) {
246 return &cpu_st->devs[i];
249 return NULL;
252 void acpi_cpu_plug_cb(HotplugHandler *hotplug_dev,
253 CPUHotplugState *cpu_st, DeviceState *dev, Error **errp)
255 AcpiCpuStatus *cdev;
257 cdev = get_cpu_status(cpu_st, dev);
258 if (!cdev) {
259 return;
262 cdev->cpu = CPU(dev);
263 if (dev->hotplugged) {
264 cdev->is_inserting = true;
265 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
269 void acpi_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
270 CPUHotplugState *cpu_st,
271 DeviceState *dev, Error **errp)
273 AcpiCpuStatus *cdev;
275 cdev = get_cpu_status(cpu_st, dev);
276 if (!cdev) {
277 return;
280 cdev->is_removing = true;
281 acpi_send_event(DEVICE(hotplug_dev), ACPI_CPU_HOTPLUG_STATUS);
284 void acpi_cpu_unplug_cb(CPUHotplugState *cpu_st,
285 DeviceState *dev, Error **errp)
287 AcpiCpuStatus *cdev;
289 cdev = get_cpu_status(cpu_st, dev);
290 if (!cdev) {
291 return;
294 cdev->cpu = NULL;
297 static const VMStateDescription vmstate_cpuhp_sts = {
298 .name = "CPU hotplug device state",
299 .version_id = 1,
300 .minimum_version_id = 1,
301 .minimum_version_id_old = 1,
302 .fields = (VMStateField[]) {
303 VMSTATE_BOOL(is_inserting, AcpiCpuStatus),
304 VMSTATE_BOOL(is_removing, AcpiCpuStatus),
305 VMSTATE_UINT32(ost_event, AcpiCpuStatus),
306 VMSTATE_UINT32(ost_status, AcpiCpuStatus),
307 VMSTATE_END_OF_LIST()
311 const VMStateDescription vmstate_cpu_hotplug = {
312 .name = "CPU hotplug state",
313 .version_id = 1,
314 .minimum_version_id = 1,
315 .minimum_version_id_old = 1,
316 .fields = (VMStateField[]) {
317 VMSTATE_UINT32(selector, CPUHotplugState),
318 VMSTATE_UINT8(command, CPUHotplugState),
319 VMSTATE_STRUCT_VARRAY_POINTER_UINT32(devs, CPUHotplugState, dev_count,
320 vmstate_cpuhp_sts, AcpiCpuStatus),
321 VMSTATE_END_OF_LIST()
325 #define CPU_NAME_FMT "C%.03X"
326 #define CPUHP_RES_DEVICE "PRES"
327 #define CPU_LOCK "CPLK"
328 #define CPU_STS_METHOD "CSTA"
329 #define CPU_SCAN_METHOD "CSCN"
330 #define CPU_NOTIFY_METHOD "CTFY"
331 #define CPU_EJECT_METHOD "CEJ0"
332 #define CPU_OST_METHOD "COST"
333 #define CPU_ADDED_LIST "CNEW"
335 #define CPU_ENABLED "CPEN"
336 #define CPU_SELECTOR "CSEL"
337 #define CPU_COMMAND "CCMD"
338 #define CPU_DATA "CDAT"
339 #define CPU_INSERT_EVENT "CINS"
340 #define CPU_REMOVE_EVENT "CRMV"
341 #define CPU_EJECT_EVENT "CEJ0"
342 #define CPU_FW_EJECT_EVENT "CEJF"
344 void build_cpus_aml(Aml *table, MachineState *machine, CPUHotplugFeatures opts,
345 hwaddr io_base,
346 const char *res_root,
347 const char *event_handler_method)
349 Aml *ifctx;
350 Aml *field;
351 Aml *method;
352 Aml *cpu_ctrl_dev;
353 Aml *cpus_dev;
354 Aml *zero = aml_int(0);
355 Aml *one = aml_int(1);
356 Aml *sb_scope = aml_scope("_SB");
357 MachineClass *mc = MACHINE_GET_CLASS(machine);
358 const CPUArchIdList *arch_ids = mc->possible_cpu_arch_ids(machine);
359 char *cphp_res_path = g_strdup_printf("%s." CPUHP_RES_DEVICE, res_root);
360 Object *obj = object_resolve_path_type("", TYPE_ACPI_DEVICE_IF, NULL);
361 AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(obj);
362 AcpiDeviceIf *adev = ACPI_DEVICE_IF(obj);
364 cpu_ctrl_dev = aml_device("%s", cphp_res_path);
366 Aml *crs;
368 aml_append(cpu_ctrl_dev,
369 aml_name_decl("_HID", aml_eisaid("PNP0A06")));
370 aml_append(cpu_ctrl_dev,
371 aml_name_decl("_UID", aml_string("CPU Hotplug resources")));
372 aml_append(cpu_ctrl_dev, aml_mutex(CPU_LOCK, 0));
374 crs = aml_resource_template();
375 aml_append(crs, aml_io(AML_DECODE16, io_base, io_base, 1,
376 ACPI_CPU_HOTPLUG_REG_LEN));
377 aml_append(cpu_ctrl_dev, aml_name_decl("_CRS", crs));
379 /* declare CPU hotplug MMIO region with related access fields */
380 aml_append(cpu_ctrl_dev,
381 aml_operation_region("PRST", AML_SYSTEM_IO, aml_int(io_base),
382 ACPI_CPU_HOTPLUG_REG_LEN));
384 field = aml_field("PRST", AML_BYTE_ACC, AML_NOLOCK,
385 AML_WRITE_AS_ZEROS);
386 aml_append(field, aml_reserved_field(ACPI_CPU_FLAGS_OFFSET_RW * 8));
387 /* 1 if enabled, read only */
388 aml_append(field, aml_named_field(CPU_ENABLED, 1));
389 /* (read) 1 if has a insert event. (write) 1 to clear event */
390 aml_append(field, aml_named_field(CPU_INSERT_EVENT, 1));
391 /* (read) 1 if has a remove event. (write) 1 to clear event */
392 aml_append(field, aml_named_field(CPU_REMOVE_EVENT, 1));
393 /* initiates device eject, write only */
394 aml_append(field, aml_named_field(CPU_EJECT_EVENT, 1));
395 /* tell firmware to do device eject, write only */
396 aml_append(field, aml_named_field(CPU_FW_EJECT_EVENT, 1));
397 aml_append(field, aml_reserved_field(3));
398 aml_append(field, aml_named_field(CPU_COMMAND, 8));
399 aml_append(cpu_ctrl_dev, field);
401 field = aml_field("PRST", AML_DWORD_ACC, AML_NOLOCK, AML_PRESERVE);
402 /* CPU selector, write only */
403 aml_append(field, aml_named_field(CPU_SELECTOR, 32));
404 /* flags + cmd + 2byte align */
405 aml_append(field, aml_reserved_field(4 * 8));
406 aml_append(field, aml_named_field(CPU_DATA, 32));
407 aml_append(cpu_ctrl_dev, field);
409 if (opts.has_legacy_cphp) {
410 method = aml_method("_INI", 0, AML_SERIALIZED);
411 /* switch off legacy CPU hotplug HW and use new one,
412 * on reboot system is in new mode and writing 0
413 * in CPU_SELECTOR selects BSP, which is NOP at
414 * the time _INI is called */
415 aml_append(method, aml_store(zero, aml_name(CPU_SELECTOR)));
416 aml_append(cpu_ctrl_dev, method);
419 aml_append(sb_scope, cpu_ctrl_dev);
421 cpus_dev = aml_device("\\_SB.CPUS");
423 int i;
424 Aml *ctrl_lock = aml_name("%s.%s", cphp_res_path, CPU_LOCK);
425 Aml *cpu_selector = aml_name("%s.%s", cphp_res_path, CPU_SELECTOR);
426 Aml *is_enabled = aml_name("%s.%s", cphp_res_path, CPU_ENABLED);
427 Aml *cpu_cmd = aml_name("%s.%s", cphp_res_path, CPU_COMMAND);
428 Aml *cpu_data = aml_name("%s.%s", cphp_res_path, CPU_DATA);
429 Aml *ins_evt = aml_name("%s.%s", cphp_res_path, CPU_INSERT_EVENT);
430 Aml *rm_evt = aml_name("%s.%s", cphp_res_path, CPU_REMOVE_EVENT);
431 Aml *ej_evt = aml_name("%s.%s", cphp_res_path, CPU_EJECT_EVENT);
432 Aml *fw_ej_evt = aml_name("%s.%s", cphp_res_path, CPU_FW_EJECT_EVENT);
434 aml_append(cpus_dev, aml_name_decl("_HID", aml_string("ACPI0010")));
435 aml_append(cpus_dev, aml_name_decl("_CID", aml_eisaid("PNP0A05")));
437 method = aml_method(CPU_NOTIFY_METHOD, 2, AML_NOTSERIALIZED);
438 for (i = 0; i < arch_ids->len; i++) {
439 Aml *cpu = aml_name(CPU_NAME_FMT, i);
440 Aml *uid = aml_arg(0);
441 Aml *event = aml_arg(1);
443 ifctx = aml_if(aml_equal(uid, aml_int(i)));
445 aml_append(ifctx, aml_notify(cpu, event));
447 aml_append(method, ifctx);
449 aml_append(cpus_dev, method);
451 method = aml_method(CPU_STS_METHOD, 1, AML_SERIALIZED);
453 Aml *idx = aml_arg(0);
454 Aml *sta = aml_local(0);
456 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
457 aml_append(method, aml_store(idx, cpu_selector));
458 aml_append(method, aml_store(zero, sta));
459 ifctx = aml_if(aml_equal(is_enabled, one));
461 aml_append(ifctx, aml_store(aml_int(0xF), sta));
463 aml_append(method, ifctx);
464 aml_append(method, aml_release(ctrl_lock));
465 aml_append(method, aml_return(sta));
467 aml_append(cpus_dev, method);
469 method = aml_method(CPU_EJECT_METHOD, 1, AML_SERIALIZED);
471 Aml *idx = aml_arg(0);
473 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
474 aml_append(method, aml_store(idx, cpu_selector));
475 if (opts.fw_unplugs_cpu) {
476 aml_append(method, aml_store(one, fw_ej_evt));
477 aml_append(method, aml_store(aml_int(OVMF_CPUHP_SMI_CMD),
478 aml_name("%s", opts.smi_path)));
479 } else {
480 aml_append(method, aml_store(one, ej_evt));
482 aml_append(method, aml_release(ctrl_lock));
484 aml_append(cpus_dev, method);
486 method = aml_method(CPU_SCAN_METHOD, 0, AML_SERIALIZED);
488 const uint8_t max_cpus_per_pass = 255;
489 Aml *else_ctx;
490 Aml *while_ctx, *while_ctx2;
491 Aml *has_event = aml_local(0);
492 Aml *dev_chk = aml_int(1);
493 Aml *eject_req = aml_int(3);
494 Aml *next_cpu_cmd = aml_int(CPHP_GET_NEXT_CPU_WITH_EVENT_CMD);
495 Aml *num_added_cpus = aml_local(1);
496 Aml *cpu_idx = aml_local(2);
497 Aml *uid = aml_local(3);
498 Aml *has_job = aml_local(4);
499 Aml *new_cpus = aml_name(CPU_ADDED_LIST);
501 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
504 * Windows versions newer than XP (including Windows 10/Windows
505 * Server 2019), do support* VarPackageOp but, it is cripled to hold
506 * the same elements number as old PackageOp.
507 * For compatibility with Windows XP (so it won't crash) use ACPI1.0
508 * PackageOp which can hold max 255 elements.
510 * use named package as old Windows don't support it in local var
512 aml_append(method, aml_name_decl(CPU_ADDED_LIST,
513 aml_package(max_cpus_per_pass)));
515 aml_append(method, aml_store(zero, uid));
516 aml_append(method, aml_store(one, has_job));
518 * CPU_ADDED_LIST can hold limited number of elements, outer loop
519 * allows to process CPUs in batches which let us to handle more
520 * CPUs than CPU_ADDED_LIST can hold.
522 while_ctx2 = aml_while(aml_equal(has_job, one));
524 aml_append(while_ctx2, aml_store(zero, has_job));
526 aml_append(while_ctx2, aml_store(one, has_event));
527 aml_append(while_ctx2, aml_store(zero, num_added_cpus));
530 * Scan CPUs, till there are CPUs with events or
531 * CPU_ADDED_LIST capacity is exhausted
533 while_ctx = aml_while(aml_land(aml_equal(has_event, one),
534 aml_lless(uid, aml_int(arch_ids->len))));
537 * clear loop exit condition, ins_evt/rm_evt checks will
538 * set it to 1 while next_cpu_cmd returns a CPU with events
540 aml_append(while_ctx, aml_store(zero, has_event));
542 aml_append(while_ctx, aml_store(uid, cpu_selector));
543 aml_append(while_ctx, aml_store(next_cpu_cmd, cpu_cmd));
546 * wrap around case, scan is complete, exit loop.
547 * It happens since events are not cleared in scan loop,
548 * so next_cpu_cmd continues to find already processed CPUs
550 ifctx = aml_if(aml_lless(cpu_data, uid));
552 aml_append(ifctx, aml_break());
554 aml_append(while_ctx, ifctx);
557 * if CPU_ADDED_LIST is full, exit inner loop and process
558 * collected CPUs
560 ifctx = aml_if(
561 aml_equal(num_added_cpus, aml_int(max_cpus_per_pass)));
563 aml_append(ifctx, aml_store(one, has_job));
564 aml_append(ifctx, aml_break());
566 aml_append(while_ctx, ifctx);
568 aml_append(while_ctx, aml_store(cpu_data, uid));
569 ifctx = aml_if(aml_equal(ins_evt, one));
571 /* cache added CPUs to Notify/Wakeup later */
572 aml_append(ifctx, aml_store(uid,
573 aml_index(new_cpus, num_added_cpus)));
574 aml_append(ifctx, aml_increment(num_added_cpus));
575 aml_append(ifctx, aml_store(one, has_event));
577 aml_append(while_ctx, ifctx);
578 else_ctx = aml_else();
579 ifctx = aml_if(aml_equal(rm_evt, one));
581 aml_append(ifctx,
582 aml_call2(CPU_NOTIFY_METHOD, uid, eject_req));
583 aml_append(ifctx, aml_store(one, rm_evt));
584 aml_append(ifctx, aml_store(one, has_event));
586 aml_append(else_ctx, ifctx);
587 aml_append(while_ctx, else_ctx);
588 aml_append(while_ctx, aml_increment(uid));
590 aml_append(while_ctx2, while_ctx);
593 * in case FW negotiated ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT,
594 * make upcall to FW, so it can pull in new CPUs before
595 * OS is notified and wakes them up
597 if (opts.smi_path) {
598 ifctx = aml_if(aml_lgreater(num_added_cpus, zero));
600 aml_append(ifctx, aml_store(aml_int(OVMF_CPUHP_SMI_CMD),
601 aml_name("%s", opts.smi_path)));
603 aml_append(while_ctx2, ifctx);
606 /* Notify OSPM about new CPUs and clear insert events */
607 aml_append(while_ctx2, aml_store(zero, cpu_idx));
608 while_ctx = aml_while(aml_lless(cpu_idx, num_added_cpus));
610 aml_append(while_ctx,
611 aml_store(aml_derefof(aml_index(new_cpus, cpu_idx)),
612 uid));
613 aml_append(while_ctx,
614 aml_call2(CPU_NOTIFY_METHOD, uid, dev_chk));
615 aml_append(while_ctx, aml_store(uid, aml_debug()));
616 aml_append(while_ctx, aml_store(uid, cpu_selector));
617 aml_append(while_ctx, aml_store(one, ins_evt));
618 aml_append(while_ctx, aml_increment(cpu_idx));
620 aml_append(while_ctx2, while_ctx);
622 * If another batch is needed, then it will resume scanning
623 * exactly at -- and not after -- the last CPU that's currently
624 * in CPU_ADDED_LIST. In other words, the last CPU in
625 * CPU_ADDED_LIST is going to be re-checked. That's OK: we've
626 * just cleared the insert event for *all* CPUs in
627 * CPU_ADDED_LIST, including the last one. So the scan will
628 * simply seek past it.
631 aml_append(method, while_ctx2);
632 aml_append(method, aml_release(ctrl_lock));
634 aml_append(cpus_dev, method);
636 method = aml_method(CPU_OST_METHOD, 4, AML_SERIALIZED);
638 Aml *uid = aml_arg(0);
639 Aml *ev_cmd = aml_int(CPHP_OST_EVENT_CMD);
640 Aml *st_cmd = aml_int(CPHP_OST_STATUS_CMD);
642 aml_append(method, aml_acquire(ctrl_lock, 0xFFFF));
643 aml_append(method, aml_store(uid, cpu_selector));
644 aml_append(method, aml_store(ev_cmd, cpu_cmd));
645 aml_append(method, aml_store(aml_arg(1), cpu_data));
646 aml_append(method, aml_store(st_cmd, cpu_cmd));
647 aml_append(method, aml_store(aml_arg(2), cpu_data));
648 aml_append(method, aml_release(ctrl_lock));
650 aml_append(cpus_dev, method);
652 /* build Processor object for each processor */
653 for (i = 0; i < arch_ids->len; i++) {
654 Aml *dev;
655 Aml *uid = aml_int(i);
656 GArray *madt_buf = g_array_new(0, 1, 1);
657 int arch_id = arch_ids->cpus[i].arch_id;
659 if (opts.acpi_1_compatible && arch_id < 255) {
660 dev = aml_processor(i, 0, 0, CPU_NAME_FMT, i);
661 } else {
662 dev = aml_device(CPU_NAME_FMT, i);
663 aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0007")));
664 aml_append(dev, aml_name_decl("_UID", uid));
667 method = aml_method("_STA", 0, AML_SERIALIZED);
668 aml_append(method, aml_return(aml_call1(CPU_STS_METHOD, uid)));
669 aml_append(dev, method);
671 /* build _MAT object */
672 assert(adevc && adevc->madt_cpu);
673 adevc->madt_cpu(adev, i, arch_ids, madt_buf);
674 switch (madt_buf->data[0]) {
675 case ACPI_APIC_PROCESSOR: {
676 AcpiMadtProcessorApic *apic = (void *)madt_buf->data;
677 apic->flags = cpu_to_le32(1);
678 break;
680 case ACPI_APIC_LOCAL_X2APIC: {
681 AcpiMadtProcessorX2Apic *apic = (void *)madt_buf->data;
682 apic->flags = cpu_to_le32(1);
683 break;
685 default:
686 assert(0);
688 aml_append(dev, aml_name_decl("_MAT",
689 aml_buffer(madt_buf->len, (uint8_t *)madt_buf->data)));
690 g_array_free(madt_buf, true);
692 if (CPU(arch_ids->cpus[i].cpu) != first_cpu) {
693 method = aml_method("_EJ0", 1, AML_NOTSERIALIZED);
694 aml_append(method, aml_call1(CPU_EJECT_METHOD, uid));
695 aml_append(dev, method);
698 method = aml_method("_OST", 3, AML_SERIALIZED);
699 aml_append(method,
700 aml_call4(CPU_OST_METHOD, uid, aml_arg(0),
701 aml_arg(1), aml_arg(2))
703 aml_append(dev, method);
705 /* Linux guests discard SRAT info for non-present CPUs
706 * as a result _PXM is required for all CPUs which might
707 * be hot-plugged. For simplicity, add it for all CPUs.
709 if (arch_ids->cpus[i].props.has_node_id) {
710 aml_append(dev, aml_name_decl("_PXM",
711 aml_int(arch_ids->cpus[i].props.node_id)));
714 aml_append(cpus_dev, dev);
717 aml_append(sb_scope, cpus_dev);
718 aml_append(table, sb_scope);
720 method = aml_method(event_handler_method, 0, AML_NOTSERIALIZED);
721 aml_append(method, aml_call0("\\_SB.CPUS." CPU_SCAN_METHOD));
722 aml_append(table, method);
724 g_free(cphp_res_path);