2 * Target-specific parts of the CPU object
4 * Copyright (c) 2003 Fabrice Bellard
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
20 #include "qemu/osdep.h"
21 #include "qemu-common.h"
22 #include "qapi/error.h"
24 #include "exec/target_page.h"
25 #include "hw/qdev-core.h"
26 #include "hw/qdev-properties.h"
27 #include "qemu/error-report.h"
28 #include "migration/vmstate.h"
29 #ifdef CONFIG_USER_ONLY
32 #include "hw/core/sysemu-cpu-ops.h"
33 #include "exec/address-spaces.h"
35 #include "sysemu/tcg.h"
36 #include "sysemu/kvm.h"
37 #include "sysemu/replay.h"
38 #include "exec/translate-all.h"
40 #include "hw/core/accel-cpu.h"
42 uintptr_t qemu_host_page_size
;
43 intptr_t qemu_host_page_mask
;
45 #ifndef CONFIG_USER_ONLY
46 static int cpu_common_post_load(void *opaque
, int version_id
)
48 CPUState
*cpu
= opaque
;
50 /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
51 version_id is increased. */
52 cpu
->interrupt_request
&= ~0x01;
55 /* loadvm has just updated the content of RAM, bypassing the
56 * usual mechanisms that ensure we flush TBs for writes to
57 * memory we've translated code from. So we must flush all TBs,
58 * which will now be stale.
65 static int cpu_common_pre_load(void *opaque
)
67 CPUState
*cpu
= opaque
;
69 cpu
->exception_index
= -1;
74 static bool cpu_common_exception_index_needed(void *opaque
)
76 CPUState
*cpu
= opaque
;
78 return tcg_enabled() && cpu
->exception_index
!= -1;
81 static const VMStateDescription vmstate_cpu_common_exception_index
= {
82 .name
= "cpu_common/exception_index",
84 .minimum_version_id
= 1,
85 .needed
= cpu_common_exception_index_needed
,
86 .fields
= (VMStateField
[]) {
87 VMSTATE_INT32(exception_index
, CPUState
),
92 static bool cpu_common_crash_occurred_needed(void *opaque
)
94 CPUState
*cpu
= opaque
;
96 return cpu
->crash_occurred
;
99 static const VMStateDescription vmstate_cpu_common_crash_occurred
= {
100 .name
= "cpu_common/crash_occurred",
102 .minimum_version_id
= 1,
103 .needed
= cpu_common_crash_occurred_needed
,
104 .fields
= (VMStateField
[]) {
105 VMSTATE_BOOL(crash_occurred
, CPUState
),
106 VMSTATE_END_OF_LIST()
110 const VMStateDescription vmstate_cpu_common
= {
111 .name
= "cpu_common",
113 .minimum_version_id
= 1,
114 .pre_load
= cpu_common_pre_load
,
115 .post_load
= cpu_common_post_load
,
116 .fields
= (VMStateField
[]) {
117 VMSTATE_UINT32(halted
, CPUState
),
118 VMSTATE_UINT32(interrupt_request
, CPUState
),
119 VMSTATE_END_OF_LIST()
121 .subsections
= (const VMStateDescription
*[]) {
122 &vmstate_cpu_common_exception_index
,
123 &vmstate_cpu_common_crash_occurred
,
129 void cpu_exec_realizefn(CPUState
*cpu
, Error
**errp
)
131 #ifndef CONFIG_USER_ONLY
132 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
136 if (!accel_cpu_realizefn(cpu
, errp
)) {
140 /* NB: errp parameter is unused currently */
142 tcg_exec_realizefn(cpu
, errp
);
144 #endif /* CONFIG_TCG */
146 #ifdef CONFIG_USER_ONLY
147 assert(qdev_get_vmsd(DEVICE(cpu
)) == NULL
||
148 qdev_get_vmsd(DEVICE(cpu
))->unmigratable
);
150 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
151 vmstate_register(NULL
, cpu
->cpu_index
, &vmstate_cpu_common
, cpu
);
153 if (cc
->sysemu_ops
->legacy_vmsd
!= NULL
) {
154 vmstate_register(NULL
, cpu
->cpu_index
, cc
->sysemu_ops
->legacy_vmsd
, cpu
);
156 #endif /* CONFIG_USER_ONLY */
159 void cpu_exec_unrealizefn(CPUState
*cpu
)
161 #ifndef CONFIG_USER_ONLY
162 CPUClass
*cc
= CPU_GET_CLASS(cpu
);
164 if (cc
->sysemu_ops
->legacy_vmsd
!= NULL
) {
165 vmstate_unregister(NULL
, cc
->sysemu_ops
->legacy_vmsd
, cpu
);
167 if (qdev_get_vmsd(DEVICE(cpu
)) == NULL
) {
168 vmstate_unregister(NULL
, &vmstate_cpu_common
, cpu
);
172 /* NB: errp parameter is unused currently */
174 tcg_exec_unrealizefn(cpu
);
176 #endif /* CONFIG_TCG */
178 cpu_list_remove(cpu
);
181 void cpu_exec_initfn(CPUState
*cpu
)
186 #ifndef CONFIG_USER_ONLY
187 cpu
->thread_id
= qemu_get_thread_id();
188 cpu
->memory
= get_system_memory();
189 object_ref(OBJECT(cpu
->memory
));
193 const char *parse_cpu_option(const char *cpu_option
)
197 gchar
**model_pieces
;
198 const char *cpu_type
;
200 model_pieces
= g_strsplit(cpu_option
, ",", 2);
201 if (!model_pieces
[0]) {
202 error_report("-cpu option cannot be empty");
206 oc
= cpu_class_by_name(CPU_RESOLVING_TYPE
, model_pieces
[0]);
208 error_report("unable to find CPU model '%s'", model_pieces
[0]);
209 g_strfreev(model_pieces
);
213 cpu_type
= object_class_get_name(oc
);
215 cc
->parse_features(cpu_type
, model_pieces
[1], &error_fatal
);
216 g_strfreev(model_pieces
);
220 #if defined(CONFIG_USER_ONLY)
221 void tb_invalidate_phys_addr(target_ulong addr
)
224 tb_invalidate_phys_page_range(addr
, addr
+ 1);
228 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
230 tb_invalidate_phys_addr(pc
);
233 void tb_invalidate_phys_addr(AddressSpace
*as
, hwaddr addr
, MemTxAttrs attrs
)
239 if (!tcg_enabled()) {
243 RCU_READ_LOCK_GUARD();
244 mr
= address_space_translate(as
, addr
, &addr
, &l
, false, attrs
);
245 if (!(memory_region_is_ram(mr
)
246 || memory_region_is_romd(mr
))) {
249 ram_addr
= memory_region_get_ram_addr(mr
) + addr
;
250 tb_invalidate_phys_page_range(ram_addr
, ram_addr
+ 1);
253 static void breakpoint_invalidate(CPUState
*cpu
, target_ulong pc
)
256 * There may not be a virtual to physical translation for the pc
257 * right now, but there may exist cached TB for this pc.
258 * Flush the whole TB cache to force re-translation of such TBs.
259 * This is heavyweight, but we're debugging anyway.
265 /* Add a breakpoint. */
266 int cpu_breakpoint_insert(CPUState
*cpu
, vaddr pc
, int flags
,
267 CPUBreakpoint
**breakpoint
)
271 bp
= g_malloc(sizeof(*bp
));
276 /* keep all GDB-injected breakpoints in front */
277 if (flags
& BP_GDB
) {
278 QTAILQ_INSERT_HEAD(&cpu
->breakpoints
, bp
, entry
);
280 QTAILQ_INSERT_TAIL(&cpu
->breakpoints
, bp
, entry
);
283 breakpoint_invalidate(cpu
, pc
);
291 /* Remove a specific breakpoint. */
292 int cpu_breakpoint_remove(CPUState
*cpu
, vaddr pc
, int flags
)
296 QTAILQ_FOREACH(bp
, &cpu
->breakpoints
, entry
) {
297 if (bp
->pc
== pc
&& bp
->flags
== flags
) {
298 cpu_breakpoint_remove_by_ref(cpu
, bp
);
305 /* Remove a specific breakpoint by reference. */
306 void cpu_breakpoint_remove_by_ref(CPUState
*cpu
, CPUBreakpoint
*breakpoint
)
308 QTAILQ_REMOVE(&cpu
->breakpoints
, breakpoint
, entry
);
310 breakpoint_invalidate(cpu
, breakpoint
->pc
);
315 /* Remove all matching breakpoints. */
316 void cpu_breakpoint_remove_all(CPUState
*cpu
, int mask
)
318 CPUBreakpoint
*bp
, *next
;
320 QTAILQ_FOREACH_SAFE(bp
, &cpu
->breakpoints
, entry
, next
) {
321 if (bp
->flags
& mask
) {
322 cpu_breakpoint_remove_by_ref(cpu
, bp
);
327 /* enable or disable single step mode. EXCP_DEBUG is returned by the
328 CPU loop after each instruction */
329 void cpu_single_step(CPUState
*cpu
, int enabled
)
331 if (cpu
->singlestep_enabled
!= enabled
) {
332 cpu
->singlestep_enabled
= enabled
;
334 kvm_update_guest_debug(cpu
, 0);
336 /* must flush all the translated code to avoid inconsistencies */
337 /* XXX: only flush what is necessary */
343 void cpu_abort(CPUState
*cpu
, const char *fmt
, ...)
350 fprintf(stderr
, "qemu: fatal: ");
351 vfprintf(stderr
, fmt
, ap
);
352 fprintf(stderr
, "\n");
353 cpu_dump_state(cpu
, stderr
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
354 if (qemu_log_separate()) {
355 FILE *logfile
= qemu_log_lock();
356 qemu_log("qemu: fatal: ");
357 qemu_log_vprintf(fmt
, ap2
);
359 log_cpu_state(cpu
, CPU_DUMP_FPU
| CPU_DUMP_CCOP
);
361 qemu_log_unlock(logfile
);
367 #if defined(CONFIG_USER_ONLY)
369 struct sigaction act
;
370 sigfillset(&act
.sa_mask
);
371 act
.sa_handler
= SIG_DFL
;
373 sigaction(SIGABRT
, &act
, NULL
);
379 /* physical memory access (slow version, mainly for debug) */
380 #if defined(CONFIG_USER_ONLY)
381 int cpu_memory_rw_debug(CPUState
*cpu
, target_ulong addr
,
382 void *ptr
, target_ulong len
, bool is_write
)
385 target_ulong l
, page
;
390 page
= addr
& TARGET_PAGE_MASK
;
391 l
= (page
+ TARGET_PAGE_SIZE
) - addr
;
394 flags
= page_get_flags(page
);
395 if (!(flags
& PAGE_VALID
))
398 if (!(flags
& PAGE_WRITE
))
400 /* XXX: this code should not depend on lock_user */
401 if (!(p
= lock_user(VERIFY_WRITE
, addr
, l
, 0)))
404 unlock_user(p
, addr
, l
);
406 if (!(flags
& PAGE_READ
))
408 /* XXX: this code should not depend on lock_user */
409 if (!(p
= lock_user(VERIFY_READ
, addr
, l
, 1)))
412 unlock_user(p
, addr
, 0);
422 bool target_words_bigendian(void)
424 #if defined(TARGET_WORDS_BIGENDIAN)
431 void page_size_init(void)
433 /* NOTE: we can always suppose that qemu_host_page_size >=
435 if (qemu_host_page_size
== 0) {
436 qemu_host_page_size
= qemu_real_host_page_size
;
438 if (qemu_host_page_size
< TARGET_PAGE_SIZE
) {
439 qemu_host_page_size
= TARGET_PAGE_SIZE
;
441 qemu_host_page_mask
= -(intptr_t)qemu_host_page_size
;