trace: portable simple trace backend using glib
[qemu.git] / hw / mips_mipssim.c
blobac65555b74e24d425abc108353ae739cf749f996
1 /*
2 * QEMU/mipssim emulation
4 * Emulates a very simple machine model similiar to the one use by the
5 * proprietary MIPS emulator.
6 *
7 * Copyright (c) 2007 Thiemo Seufer
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
27 #include "hw.h"
28 #include "mips.h"
29 #include "mips_cpudevs.h"
30 #include "pc.h"
31 #include "isa.h"
32 #include "net.h"
33 #include "sysemu.h"
34 #include "boards.h"
35 #include "mips-bios.h"
36 #include "loader.h"
37 #include "elf.h"
38 #include "sysbus.h"
39 #include "exec-memory.h"
41 static struct _loaderparams {
42 int ram_size;
43 const char *kernel_filename;
44 const char *kernel_cmdline;
45 const char *initrd_filename;
46 } loaderparams;
48 typedef struct ResetData {
49 CPUState *env;
50 uint64_t vector;
51 } ResetData;
53 static int64_t load_kernel(void)
55 int64_t entry, kernel_high;
56 long kernel_size;
57 long initrd_size;
58 ram_addr_t initrd_offset;
59 int big_endian;
61 #ifdef TARGET_WORDS_BIGENDIAN
62 big_endian = 1;
63 #else
64 big_endian = 0;
65 #endif
67 kernel_size = load_elf(loaderparams.kernel_filename, cpu_mips_kseg0_to_phys,
68 NULL, (uint64_t *)&entry, NULL,
69 (uint64_t *)&kernel_high, big_endian,
70 ELF_MACHINE, 1);
71 if (kernel_size >= 0) {
72 if ((entry & ~0x7fffffffULL) == 0x80000000)
73 entry = (int32_t)entry;
74 } else {
75 fprintf(stderr, "qemu: could not load kernel '%s'\n",
76 loaderparams.kernel_filename);
77 exit(1);
80 /* load initrd */
81 initrd_size = 0;
82 initrd_offset = 0;
83 if (loaderparams.initrd_filename) {
84 initrd_size = get_image_size (loaderparams.initrd_filename);
85 if (initrd_size > 0) {
86 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
87 if (initrd_offset + initrd_size > loaderparams.ram_size) {
88 fprintf(stderr,
89 "qemu: memory too small for initial ram disk '%s'\n",
90 loaderparams.initrd_filename);
91 exit(1);
93 initrd_size = load_image_targphys(loaderparams.initrd_filename,
94 initrd_offset, loaderparams.ram_size - initrd_offset);
96 if (initrd_size == (target_ulong) -1) {
97 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
98 loaderparams.initrd_filename);
99 exit(1);
102 return entry;
105 static void main_cpu_reset(void *opaque)
107 ResetData *s = (ResetData *)opaque;
108 CPUState *env = s->env;
110 cpu_reset(env);
111 env->active_tc.PC = s->vector & ~(target_ulong)1;
112 if (s->vector & 1) {
113 env->hflags |= MIPS_HFLAG_M16;
117 static void mipsnet_init(int base, qemu_irq irq, NICInfo *nd)
119 DeviceState *dev;
120 SysBusDevice *s;
122 dev = qdev_create(NULL, "mipsnet");
123 qdev_set_nic_properties(dev, nd);
124 qdev_init_nofail(dev);
126 s = sysbus_from_qdev(dev);
127 sysbus_connect_irq(s, 0, irq);
128 memory_region_add_subregion(get_system_io(),
129 base,
130 sysbus_mmio_get_region(s, 0));
133 static void
134 mips_mipssim_init (ram_addr_t ram_size,
135 const char *boot_device,
136 const char *kernel_filename, const char *kernel_cmdline,
137 const char *initrd_filename, const char *cpu_model)
139 char *filename;
140 ram_addr_t ram_offset;
141 ram_addr_t bios_offset;
142 CPUState *env;
143 ResetData *reset_info;
144 int bios_size;
146 /* Init CPUs. */
147 if (cpu_model == NULL) {
148 #ifdef TARGET_MIPS64
149 cpu_model = "5Kf";
150 #else
151 cpu_model = "24Kf";
152 #endif
154 env = cpu_init(cpu_model);
155 if (!env) {
156 fprintf(stderr, "Unable to find CPU definition\n");
157 exit(1);
159 reset_info = g_malloc0(sizeof(ResetData));
160 reset_info->env = env;
161 reset_info->vector = env->active_tc.PC;
162 qemu_register_reset(main_cpu_reset, reset_info);
164 /* Allocate RAM. */
165 ram_offset = qemu_ram_alloc(NULL, "mips_mipssim.ram", ram_size);
166 bios_offset = qemu_ram_alloc(NULL, "mips_mipssim.bios", BIOS_SIZE);
168 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
170 /* Map the BIOS / boot exception handler. */
171 cpu_register_physical_memory(0x1fc00000LL,
172 BIOS_SIZE, bios_offset | IO_MEM_ROM);
173 /* Load a BIOS / boot exception handler image. */
174 if (bios_name == NULL)
175 bios_name = BIOS_FILENAME;
176 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
177 if (filename) {
178 bios_size = load_image_targphys(filename, 0x1fc00000LL, BIOS_SIZE);
179 g_free(filename);
180 } else {
181 bios_size = -1;
183 if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
184 /* Bail out if we have neither a kernel image nor boot vector code. */
185 fprintf(stderr,
186 "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
187 filename);
188 exit(1);
189 } else {
190 /* We have a boot vector start address. */
191 env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
194 if (kernel_filename) {
195 loaderparams.ram_size = ram_size;
196 loaderparams.kernel_filename = kernel_filename;
197 loaderparams.kernel_cmdline = kernel_cmdline;
198 loaderparams.initrd_filename = initrd_filename;
199 reset_info->vector = load_kernel();
202 /* Init CPU internal devices. */
203 cpu_mips_irq_init_cpu(env);
204 cpu_mips_clock_init(env);
206 /* Register 64 KB of ISA IO space at 0x1fd00000. */
207 isa_mmio_init(0x1fd00000, 0x00010000);
209 /* A single 16450 sits at offset 0x3f8. It is attached to
210 MIPS CPU INT2, which is interrupt 4. */
211 if (serial_hds[0])
212 serial_init(0x3f8, env->irq[4], 115200, serial_hds[0]);
214 if (nd_table[0].vlan)
215 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
216 mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
219 static QEMUMachine mips_mipssim_machine = {
220 .name = "mipssim",
221 .desc = "MIPS MIPSsim platform",
222 .init = mips_mipssim_init,
225 static void mips_mipssim_machine_init(void)
227 qemu_register_machine(&mips_mipssim_machine);
230 machine_init(mips_mipssim_machine_init);