exec: introduce memory_access_size
[qemu.git] / tests / ide-test.c
blob365e9959ffb41543f0f31cdebcf0f77d73fce377
1 /*
2 * IDE test cases
4 * Copyright (c) 2013 Kevin Wolf <kwolf@redhat.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
25 #include <stdint.h>
26 #include <string.h>
27 #include <stdio.h>
29 #include <glib.h>
31 #include "libqtest.h"
32 #include "libqos/pci-pc.h"
33 #include "libqos/malloc-pc.h"
35 #include "qemu-common.h"
36 #include "hw/pci/pci_ids.h"
37 #include "hw/pci/pci_regs.h"
39 #define TEST_IMAGE_SIZE 64 * 1024 * 1024
41 #define IDE_PCI_DEV 1
42 #define IDE_PCI_FUNC 1
44 #define IDE_BASE 0x1f0
45 #define IDE_PRIMARY_IRQ 14
47 enum {
48 reg_data = 0x0,
49 reg_nsectors = 0x2,
50 reg_lba_low = 0x3,
51 reg_lba_middle = 0x4,
52 reg_lba_high = 0x5,
53 reg_device = 0x6,
54 reg_status = 0x7,
55 reg_command = 0x7,
58 enum {
59 BSY = 0x80,
60 DRDY = 0x40,
61 DF = 0x20,
62 DRQ = 0x08,
63 ERR = 0x01,
66 enum {
67 LBA = 0x40,
70 enum {
71 bmreg_cmd = 0x0,
72 bmreg_status = 0x2,
73 bmreg_prdt = 0x4,
76 enum {
77 CMD_READ_DMA = 0xc8,
78 CMD_WRITE_DMA = 0xca,
79 CMD_IDENTIFY = 0xec,
81 CMDF_ABORT = 0x100,
84 enum {
85 BM_CMD_START = 0x1,
86 BM_CMD_WRITE = 0x8, /* write = from device to memory */
89 enum {
90 BM_STS_ACTIVE = 0x1,
91 BM_STS_ERROR = 0x2,
92 BM_STS_INTR = 0x4,
95 enum {
96 PRDT_EOT = 0x80000000,
99 #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
100 #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
102 static QPCIBus *pcibus = NULL;
103 static QGuestAllocator *guest_malloc;
105 static char tmp_path[] = "/tmp/qtest.XXXXXX";
107 static void ide_test_start(const char *cmdline_fmt, ...)
109 va_list ap;
110 char *cmdline;
112 va_start(ap, cmdline_fmt);
113 cmdline = g_strdup_vprintf(cmdline_fmt, ap);
114 va_end(ap);
116 qtest_start(cmdline);
117 qtest_irq_intercept_in(global_qtest, "ioapic");
118 guest_malloc = pc_alloc_init();
121 static void ide_test_quit(void)
123 qtest_quit(global_qtest);
126 static QPCIDevice *get_pci_device(uint16_t *bmdma_base)
128 QPCIDevice *dev;
129 uint16_t vendor_id, device_id;
131 if (!pcibus) {
132 pcibus = qpci_init_pc();
135 /* Find PCI device and verify it's the right one */
136 dev = qpci_device_find(pcibus, QPCI_DEVFN(IDE_PCI_DEV, IDE_PCI_FUNC));
137 g_assert(dev != NULL);
139 vendor_id = qpci_config_readw(dev, PCI_VENDOR_ID);
140 device_id = qpci_config_readw(dev, PCI_DEVICE_ID);
141 g_assert(vendor_id == PCI_VENDOR_ID_INTEL);
142 g_assert(device_id == PCI_DEVICE_ID_INTEL_82371SB_1);
144 /* Map bmdma BAR */
145 *bmdma_base = (uint16_t)(uintptr_t) qpci_iomap(dev, 4);
147 qpci_device_enable(dev);
149 return dev;
152 static void free_pci_device(QPCIDevice *dev)
154 /* libqos doesn't have a function for this, so free it manually */
155 g_free(dev);
158 typedef struct PrdtEntry {
159 uint32_t addr;
160 uint32_t size;
161 } QEMU_PACKED PrdtEntry;
163 #define assert_bit_set(data, mask) g_assert_cmphex((data) & (mask), ==, (mask))
164 #define assert_bit_clear(data, mask) g_assert_cmphex((data) & (mask), ==, 0)
166 static int send_dma_request(int cmd, uint64_t sector, int nb_sectors,
167 PrdtEntry *prdt, int prdt_entries)
169 QPCIDevice *dev;
170 uint16_t bmdma_base;
171 uintptr_t guest_prdt;
172 size_t len;
173 bool from_dev;
174 uint8_t status;
175 int flags;
177 dev = get_pci_device(&bmdma_base);
179 flags = cmd & ~0xff;
180 cmd &= 0xff;
182 switch (cmd) {
183 case CMD_READ_DMA:
184 from_dev = true;
185 break;
186 case CMD_WRITE_DMA:
187 from_dev = false;
188 break;
189 default:
190 g_assert_not_reached();
193 /* Select device 0 */
194 outb(IDE_BASE + reg_device, 0 | LBA);
196 /* Stop any running transfer, clear any pending interrupt */
197 outb(bmdma_base + bmreg_cmd, 0);
198 outb(bmdma_base + bmreg_status, BM_STS_INTR);
200 /* Setup PRDT */
201 len = sizeof(*prdt) * prdt_entries;
202 guest_prdt = guest_alloc(guest_malloc, len);
203 memwrite(guest_prdt, prdt, len);
204 outl(bmdma_base + bmreg_prdt, guest_prdt);
206 /* ATA DMA command */
207 outb(IDE_BASE + reg_nsectors, nb_sectors);
209 outb(IDE_BASE + reg_lba_low, sector & 0xff);
210 outb(IDE_BASE + reg_lba_middle, (sector >> 8) & 0xff);
211 outb(IDE_BASE + reg_lba_high, (sector >> 16) & 0xff);
213 outb(IDE_BASE + reg_command, cmd);
215 /* Start DMA transfer */
216 outb(bmdma_base + bmreg_cmd, BM_CMD_START | (from_dev ? BM_CMD_WRITE : 0));
218 if (flags & CMDF_ABORT) {
219 outb(bmdma_base + bmreg_cmd, 0);
222 /* Wait for the DMA transfer to complete */
223 do {
224 status = inb(bmdma_base + bmreg_status);
225 } while ((status & (BM_STS_ACTIVE | BM_STS_INTR)) == BM_STS_ACTIVE);
227 g_assert_cmpint(get_irq(IDE_PRIMARY_IRQ), ==, !!(status & BM_STS_INTR));
229 /* Check IDE status code */
230 assert_bit_set(inb(IDE_BASE + reg_status), DRDY);
231 assert_bit_clear(inb(IDE_BASE + reg_status), BSY | DRQ);
233 /* Reading the status register clears the IRQ */
234 g_assert(!get_irq(IDE_PRIMARY_IRQ));
236 /* Stop DMA transfer if still active */
237 if (status & BM_STS_ACTIVE) {
238 outb(bmdma_base + bmreg_cmd, 0);
241 free_pci_device(dev);
243 return status;
246 static void test_bmdma_simple_rw(void)
248 uint8_t status;
249 uint8_t *buf;
250 uint8_t *cmpbuf;
251 size_t len = 512;
252 uintptr_t guest_buf = guest_alloc(guest_malloc, len);
254 PrdtEntry prdt[] = {
256 .addr = cpu_to_le32(guest_buf),
257 .size = cpu_to_le32(len | PRDT_EOT),
261 buf = g_malloc(len);
262 cmpbuf = g_malloc(len);
264 /* Write 0x55 pattern to sector 0 */
265 memset(buf, 0x55, len);
266 memwrite(guest_buf, buf, len);
268 status = send_dma_request(CMD_WRITE_DMA, 0, 1, prdt, ARRAY_SIZE(prdt));
269 g_assert_cmphex(status, ==, BM_STS_INTR);
270 assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
272 /* Write 0xaa pattern to sector 1 */
273 memset(buf, 0xaa, len);
274 memwrite(guest_buf, buf, len);
276 status = send_dma_request(CMD_WRITE_DMA, 1, 1, prdt, ARRAY_SIZE(prdt));
277 g_assert_cmphex(status, ==, BM_STS_INTR);
278 assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
280 /* Read and verify 0x55 pattern in sector 0 */
281 memset(cmpbuf, 0x55, len);
283 status = send_dma_request(CMD_READ_DMA, 0, 1, prdt, ARRAY_SIZE(prdt));
284 g_assert_cmphex(status, ==, BM_STS_INTR);
285 assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
287 memread(guest_buf, buf, len);
288 g_assert(memcmp(buf, cmpbuf, len) == 0);
290 /* Read and verify 0xaa pattern in sector 1 */
291 memset(cmpbuf, 0xaa, len);
293 status = send_dma_request(CMD_READ_DMA, 1, 1, prdt, ARRAY_SIZE(prdt));
294 g_assert_cmphex(status, ==, BM_STS_INTR);
295 assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
297 memread(guest_buf, buf, len);
298 g_assert(memcmp(buf, cmpbuf, len) == 0);
301 g_free(buf);
302 g_free(cmpbuf);
305 static void test_bmdma_short_prdt(void)
307 uint8_t status;
309 PrdtEntry prdt[] = {
311 .addr = 0,
312 .size = cpu_to_le32(0x10 | PRDT_EOT),
316 /* Normal request */
317 status = send_dma_request(CMD_READ_DMA, 0, 1,
318 prdt, ARRAY_SIZE(prdt));
319 g_assert_cmphex(status, ==, 0);
320 assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
322 /* Abort the request before it completes */
323 status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1,
324 prdt, ARRAY_SIZE(prdt));
325 g_assert_cmphex(status, ==, 0);
326 assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
329 static void test_bmdma_long_prdt(void)
331 uint8_t status;
333 PrdtEntry prdt[] = {
335 .addr = 0,
336 .size = cpu_to_le32(0x1000 | PRDT_EOT),
340 /* Normal request */
341 status = send_dma_request(CMD_READ_DMA, 0, 1,
342 prdt, ARRAY_SIZE(prdt));
343 g_assert_cmphex(status, ==, BM_STS_ACTIVE | BM_STS_INTR);
344 assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
346 /* Abort the request before it completes */
347 status = send_dma_request(CMD_READ_DMA | CMDF_ABORT, 0, 1,
348 prdt, ARRAY_SIZE(prdt));
349 g_assert_cmphex(status, ==, BM_STS_INTR);
350 assert_bit_clear(inb(IDE_BASE + reg_status), DF | ERR);
353 static void test_bmdma_setup(void)
355 ide_test_start(
356 "-vnc none "
357 "-drive file=%s,if=ide,serial=%s,cache=writeback "
358 "-global ide-hd.ver=%s",
359 tmp_path, "testdisk", "version");
362 static void test_bmdma_teardown(void)
364 ide_test_quit();
367 static void string_cpu_to_be16(uint16_t *s, size_t bytes)
369 g_assert((bytes & 1) == 0);
370 bytes /= 2;
372 while (bytes--) {
373 *s = cpu_to_be16(*s);
374 s++;
378 static void test_identify(void)
380 uint8_t data;
381 uint16_t buf[256];
382 int i;
383 int ret;
385 ide_test_start(
386 "-vnc none "
387 "-drive file=%s,if=ide,serial=%s,cache=writeback "
388 "-global ide-hd.ver=%s",
389 tmp_path, "testdisk", "version");
391 /* IDENTIFY command on device 0*/
392 outb(IDE_BASE + reg_device, 0);
393 outb(IDE_BASE + reg_command, CMD_IDENTIFY);
395 /* Read in the IDENTIFY buffer and check registers */
396 data = inb(IDE_BASE + reg_device);
397 g_assert_cmpint(data & 0x10, ==, 0);
399 for (i = 0; i < 256; i++) {
400 data = inb(IDE_BASE + reg_status);
401 assert_bit_set(data, DRDY | DRQ);
402 assert_bit_clear(data, BSY | DF | ERR);
404 ((uint16_t*) buf)[i] = inw(IDE_BASE + reg_data);
407 data = inb(IDE_BASE + reg_status);
408 assert_bit_set(data, DRDY);
409 assert_bit_clear(data, BSY | DF | ERR | DRQ);
411 /* Check serial number/version in the buffer */
412 string_cpu_to_be16(&buf[10], 20);
413 ret = memcmp(&buf[10], "testdisk ", 20);
414 g_assert(ret == 0);
416 string_cpu_to_be16(&buf[23], 8);
417 ret = memcmp(&buf[23], "version ", 8);
418 g_assert(ret == 0);
420 /* Write cache enabled bit */
421 assert_bit_set(buf[85], 0x20);
423 ide_test_quit();
426 int main(int argc, char **argv)
428 const char *arch = qtest_get_arch();
429 int fd;
430 int ret;
432 /* Check architecture */
433 if (strcmp(arch, "i386") && strcmp(arch, "x86_64")) {
434 g_test_message("Skipping test for non-x86\n");
435 return 0;
438 /* Create a temporary raw image */
439 fd = mkstemp(tmp_path);
440 g_assert(fd >= 0);
441 ret = ftruncate(fd, TEST_IMAGE_SIZE);
442 g_assert(ret == 0);
443 close(fd);
445 /* Run the tests */
446 g_test_init(&argc, &argv, NULL);
448 qtest_add_func("/ide/identify", test_identify);
450 qtest_add_func("/ide/bmdma/setup", test_bmdma_setup);
451 qtest_add_func("/ide/bmdma/simple_rw", test_bmdma_simple_rw);
452 qtest_add_func("/ide/bmdma/short_prdt", test_bmdma_short_prdt);
453 qtest_add_func("/ide/bmdma/long_prdt", test_bmdma_long_prdt);
454 qtest_add_func("/ide/bmdma/teardown", test_bmdma_teardown);
456 ret = g_test_run();
458 /* Cleanup */
459 unlink(tmp_path);
461 return ret;