Fix hw/gt64xxx.c compilation with DEBUG defined
[qemu.git] / hw / pc.h
blob0e52933eebcf56c8bc8e21676a2fb73feea444e0
1 #ifndef HW_PC_H
2 #define HW_PC_H
4 #include "qemu-common.h"
5 #include "ioport.h"
6 #include "isa.h"
7 #include "fdc.h"
9 /* PC-style peripherals (also used by other machines). */
11 /* serial.c */
13 SerialState *serial_init(int base, qemu_irq irq, int baudbase,
14 CharDriverState *chr);
15 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift,
16 qemu_irq irq, int baudbase,
17 CharDriverState *chr, int ioregister,
18 int be);
19 SerialState *serial_isa_init(int index, CharDriverState *chr);
20 void serial_set_frequency(SerialState *s, uint32_t frequency);
22 /* parallel.c */
24 typedef struct ParallelState ParallelState;
25 ParallelState *parallel_init(int index, CharDriverState *chr);
26 ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr);
28 /* i8259.c */
30 typedef struct PicState2 PicState2;
31 extern PicState2 *isa_pic;
32 void pic_set_irq(int irq, int level);
33 void pic_set_irq_new(void *opaque, int irq, int level);
34 qemu_irq *i8259_init(qemu_irq parent_irq);
35 int pic_read_irq(PicState2 *s);
36 void pic_update_irq(PicState2 *s);
37 uint32_t pic_intack_read(PicState2 *s);
38 void pic_info(Monitor *mon);
39 void irq_info(Monitor *mon);
41 /* ISA */
42 typedef struct isa_irq_state {
43 qemu_irq *i8259;
44 qemu_irq *ioapic;
45 } IsaIrqState;
47 void isa_irq_handler(void *opaque, int n, int level);
49 /* i8254.c */
51 #define PIT_FREQ 1193182
53 typedef struct PITState PITState;
55 PITState *pit_init(int base, qemu_irq irq);
56 void pit_set_gate(PITState *pit, int channel, int val);
57 int pit_get_gate(PITState *pit, int channel);
58 int pit_get_initial_count(PITState *pit, int channel);
59 int pit_get_mode(PITState *pit, int channel);
60 int pit_get_out(PITState *pit, int channel, int64_t current_time);
62 void hpet_pit_disable(void);
63 void hpet_pit_enable(void);
65 /* vmport.c */
66 void vmport_init(void);
67 void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
69 /* vmmouse.c */
70 void *vmmouse_init(void *m);
72 /* pckbd.c */
74 void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
75 void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
76 target_phys_addr_t base, ram_addr_t size,
77 target_phys_addr_t mask);
78 void i8042_isa_mouse_fake_event(void *opaque);
79 void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
81 /* pc.c */
82 extern int fd_bootchk;
84 void pc_register_ferr_irq(qemu_irq irq);
85 void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
86 void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
88 void pc_cpus_init(const char *cpu_model);
89 void pc_memory_init(ram_addr_t ram_size,
90 const char *kernel_filename,
91 const char *kernel_cmdline,
92 const char *initrd_filename,
93 ram_addr_t *below_4g_mem_size_p,
94 ram_addr_t *above_4g_mem_size_p);
95 qemu_irq *pc_allocate_cpu_irq(void);
96 void pc_vga_init(PCIBus *pci_bus);
97 void pc_basic_device_init(qemu_irq *isa_irq,
98 FDCtrl **floppy_controller,
99 ISADevice **rtc_state);
100 void pc_init_ne2k_isa(NICInfo *nd);
101 #ifdef HAS_AUDIO
102 void pc_audio_init (PCIBus *pci_bus, qemu_irq *pic);
103 #endif
104 void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
105 const char *boot_device, DriveInfo **hd_table,
106 FDCtrl *floppy_controller, ISADevice *s);
107 void pc_pci_device_init(PCIBus *pci_bus);
109 typedef void (*cpu_set_smm_t)(int smm, void *arg);
110 void cpu_smm_register(cpu_set_smm_t callback, void *arg);
112 /* acpi.c */
113 extern int acpi_enabled;
114 extern char *acpi_tables;
115 extern size_t acpi_tables_len;
117 void acpi_bios_init(void);
118 int acpi_table_add(const char *table_desc);
120 /* acpi_piix.c */
122 i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
123 qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
124 int kvm_enabled);
125 void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
127 /* hpet.c */
128 extern int no_hpet;
130 /* pcspk.c */
131 void pcspk_init(PITState *);
132 int pcspk_audio_init(qemu_irq *pic);
134 /* piix_pci.c */
135 struct PCII440FXState;
136 typedef struct PCII440FXState PCII440FXState;
138 PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn, qemu_irq *pic, ram_addr_t ram_size);
139 void i440fx_init_memory_mappings(PCII440FXState *d);
141 /* piix4.c */
142 extern PCIDevice *piix4_dev;
143 int piix4_init(PCIBus *bus, int devfn);
145 /* vga.c */
146 enum vga_retrace_method {
147 VGA_RETRACE_DUMB,
148 VGA_RETRACE_PRECISE
151 extern enum vga_retrace_method vga_retrace_method;
153 int isa_vga_init(void);
154 int pci_vga_init(PCIBus *bus,
155 unsigned long vga_bios_offset, int vga_bios_size);
156 int isa_vga_mm_init(target_phys_addr_t vram_base,
157 target_phys_addr_t ctrl_base, int it_shift);
159 /* cirrus_vga.c */
160 void pci_cirrus_vga_init(PCIBus *bus);
161 void isa_cirrus_vga_init(void);
163 /* ne2000.c */
165 void isa_ne2000_init(int base, int irq, NICInfo *nd);
167 /* e820 types */
168 #define E820_RAM 1
169 #define E820_RESERVED 2
170 #define E820_ACPI 3
171 #define E820_NVS 4
172 #define E820_UNUSABLE 5
174 int e820_add_entry(uint64_t, uint64_t, uint32_t);
176 #endif