microblaze/ml605: Define macros for irq/memory maps
[qemu.git] / hw / microblaze / petalogix_ml605_mmu.c
blob48a0a3e87f25c98a5f662b9c916324a7518f5b45
1 /*
2 * Model of Petalogix linux reference design targeting Xilinx Spartan ml605
3 * board.
5 * Copyright (c) 2011 Michal Simek <monstr@monstr.eu>
6 * Copyright (c) 2011 PetaLogix
7 * Copyright (c) 2009 Edgar E. Iglesias.
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
28 #include "hw/sysbus.h"
29 #include "hw/hw.h"
30 #include "net/net.h"
31 #include "hw/block/flash.h"
32 #include "sysemu/sysemu.h"
33 #include "hw/devices.h"
34 #include "hw/boards.h"
35 #include "hw/xilinx.h"
36 #include "sysemu/blockdev.h"
37 #include "hw/char/serial.h"
38 #include "exec/address-spaces.h"
39 #include "hw/ssi.h"
41 #include "boot.h"
43 #include "hw/stream.h"
45 #define LMB_BRAM_SIZE (128 * 1024)
46 #define FLASH_SIZE (32 * 1024 * 1024)
48 #define BINARY_DEVICE_TREE_FILE "petalogix-ml605.dtb"
50 #define NUM_SPI_FLASHES 4
52 #define SPI_BASEADDR 0x40a00000
53 #define MEMORY_BASEADDR 0x50000000
54 #define FLASH_BASEADDR 0x86000000
55 #define INTC_BASEADDR 0x81800000
56 #define TIMER_BASEADDR 0x83c00000
57 #define UART16550_BASEADDR 0x83e00000
58 #define AXIENET_BASEADDR 0x82780000
59 #define AXIDMA_BASEADDR 0x84600000
61 #define AXIDMA_IRQ1 0
62 #define AXIDMA_IRQ0 1
63 #define TIMER_IRQ 2
64 #define AXIENET_IRQ 3
65 #define SPI_IRQ 4
66 #define UART16550_IRQ 5
68 static void machine_cpu_reset(MicroBlazeCPU *cpu)
70 CPUMBState *env = &cpu->env;
72 env->pvr.regs[10] = 0x0e000000; /* virtex 6 */
73 /* setup pvr to match kernel setting */
74 env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK;
75 env->pvr.regs[0] |= PVR0_USE_FPU_MASK | PVR0_ENDI;
76 env->pvr.regs[0] = (env->pvr.regs[0] & ~PVR0_VERSION_MASK) | (0x14 << 8);
77 env->pvr.regs[2] ^= PVR2_USE_FPU2_MASK;
78 env->pvr.regs[4] = 0xc56b8000;
79 env->pvr.regs[5] = 0xc56be000;
82 static void
83 petalogix_ml605_init(QEMUMachineInitArgs *args)
85 ram_addr_t ram_size = args->ram_size;
86 MemoryRegion *address_space_mem = get_system_memory();
87 DeviceState *dev, *dma, *eth0;
88 Object *ds, *cs;
89 MicroBlazeCPU *cpu;
90 SysBusDevice *busdev;
91 DriveInfo *dinfo;
92 int i;
93 hwaddr ddr_base = MEMORY_BASEADDR;
94 MemoryRegion *phys_lmb_bram = g_new(MemoryRegion, 1);
95 MemoryRegion *phys_ram = g_new(MemoryRegion, 1);
96 qemu_irq irq[32];
98 /* init CPUs */
99 cpu = MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU));
100 object_property_set_bool(OBJECT(cpu), true, "realized", &error_abort);
102 /* Attach emulated BRAM through the LMB. */
103 memory_region_init_ram(phys_lmb_bram, NULL, "petalogix_ml605.lmb_bram",
104 LMB_BRAM_SIZE);
105 vmstate_register_ram_global(phys_lmb_bram);
106 memory_region_add_subregion(address_space_mem, 0x00000000, phys_lmb_bram);
108 memory_region_init_ram(phys_ram, NULL, "petalogix_ml605.ram", ram_size);
109 vmstate_register_ram_global(phys_ram);
110 memory_region_add_subregion(address_space_mem, ddr_base, phys_ram);
112 dinfo = drive_get(IF_PFLASH, 0, 0);
113 /* 5th parameter 2 means bank-width
114 * 10th paremeter 0 means little-endian */
115 pflash_cfi01_register(FLASH_BASEADDR,
116 NULL, "petalogix_ml605.flash", FLASH_SIZE,
117 dinfo ? dinfo->bdrv : NULL, (64 * 1024),
118 FLASH_SIZE >> 16,
119 2, 0x89, 0x18, 0x0000, 0x0, 0);
122 dev = xilinx_intc_create(INTC_BASEADDR, qdev_get_gpio_in(DEVICE(cpu),
123 MB_CPU_IRQ), 4);
124 for (i = 0; i < 32; i++) {
125 irq[i] = qdev_get_gpio_in(dev, i);
128 serial_mm_init(address_space_mem, UART16550_BASEADDR + 0x1000, 2,
129 irq[UART16550_IRQ], 115200, serial_hds[0],
130 DEVICE_LITTLE_ENDIAN);
132 /* 2 timers at irq 2 @ 100 Mhz. */
133 xilinx_timer_create(TIMER_BASEADDR, irq[2], 0, 100 * 1000000);
135 /* axi ethernet and dma initialization. */
136 qemu_check_nic_model(&nd_table[0], "xlnx.axi-ethernet");
137 eth0 = qdev_create(NULL, "xlnx.axi-ethernet");
138 dma = qdev_create(NULL, "xlnx.axi-dma");
140 /* FIXME: attach to the sysbus instead */
141 object_property_add_child(qdev_get_machine(), "xilinx-eth", OBJECT(eth0),
142 NULL);
143 object_property_add_child(qdev_get_machine(), "xilinx-dma", OBJECT(dma),
144 NULL);
146 ds = object_property_get_link(OBJECT(dma),
147 "axistream-connected-target", NULL);
148 cs = object_property_get_link(OBJECT(dma),
149 "axistream-control-connected-target", NULL);
150 xilinx_axiethernet_init(eth0, &nd_table[0], STREAM_SLAVE(ds),
151 STREAM_SLAVE(cs), 0x82780000, irq[3], 0x1000,
152 0x1000);
154 ds = object_property_get_link(OBJECT(eth0),
155 "axistream-connected-target", NULL);
156 cs = object_property_get_link(OBJECT(eth0),
157 "axistream-control-connected-target", NULL);
158 xilinx_axidma_init(dma, STREAM_SLAVE(ds), STREAM_SLAVE(cs), 0x84600000,
159 irq[1], irq[0], 100 * 1000000);
162 SSIBus *spi;
164 dev = qdev_create(NULL, "xlnx.xps-spi");
165 qdev_prop_set_uint8(dev, "num-ss-bits", NUM_SPI_FLASHES);
166 qdev_init_nofail(dev);
167 busdev = SYS_BUS_DEVICE(dev);
168 sysbus_mmio_map(busdev, 0, SPI_BASEADDR);
169 sysbus_connect_irq(busdev, 0, irq[SPI_IRQ]);
171 spi = (SSIBus *)qdev_get_child_bus(dev, "spi");
173 for (i = 0; i < NUM_SPI_FLASHES; i++) {
174 qemu_irq cs_line;
176 dev = ssi_create_slave(spi, "n25q128");
177 cs_line = qdev_get_gpio_in(dev, 0);
178 sysbus_connect_irq(busdev, i+1, cs_line);
182 microblaze_load_kernel(cpu, ddr_base, ram_size,
183 args->initrd_filename,
184 BINARY_DEVICE_TREE_FILE,
185 machine_cpu_reset);
189 static QEMUMachine petalogix_ml605_machine = {
190 .name = "petalogix-ml605",
191 .desc = "PetaLogix linux refdesign for xilinx ml605 little endian",
192 .init = petalogix_ml605_init,
193 .is_default = 0,
196 static void petalogix_ml605_machine_init(void)
198 qemu_register_machine(&petalogix_ml605_machine);
201 machine_init(petalogix_ml605_machine_init);