target-moxie/helper.c

   1 /*
   2  *  Moxie helper routines.
   3  *
   4  *  Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
   5  *
   6  * This library is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU Lesser General Public
   8  * License as published by the Free Software Foundation; either
   9  * version 2 of the License, or (at your option) any later version.
  10  *
  11  * This library is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  14  * Lesser General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <stdio.h>
  21 #include <string.h>
  22 #include <assert.h>
  23
  24 #include "config.h"
  25 #include "cpu.h"
  26 #include "mmu.h"
  27 #include "exec/exec-all.h"
  28 #include "exec/softmmu_exec.h"
  29 #include "qemu/host-utils.h"
  30 #include "helper.h"
  31
  32 #define MMUSUFFIX _mmu
  33
  34 #define SHIFT 0
  35 #include "exec/softmmu_template.h"
  36
  37 #define SHIFT 1
  38 #include "exec/softmmu_template.h"
  39
  40 #define SHIFT 2
  41 #include "exec/softmmu_template.h"
  42
  43 #define SHIFT 3
  44 #include "exec/softmmu_template.h"
  45
  46 /* Try to fill the TLB and return an exception if error. If retaddr is
  47    NULL, it means that the function was called in C code (i.e. not
  48    from generated code or from helper.c) */
  49 void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
  50               uintptr_t retaddr)
  51 {
  52     int ret;
  53
  54     ret = moxie_cpu_handle_mmu_fault(cs, addr, is_write, mmu_idx);
  55     if (unlikely(ret)) {
  56         if (retaddr) {
  57             cpu_restore_state(cs, retaddr);
  58         }
  59     }
  60     cpu_loop_exit(cs);
  61 }
  62
  63 void helper_raise_exception(CPUMoxieState *env, int ex)
  64 {
  65     CPUState *cs = CPU(moxie_env_get_cpu(env));
  66
  67     cs->exception_index = ex;
  68     /* Stash the exception type.  */
  69     env->sregs[2] = ex;
  70     /* Stash the address where the exception occurred.  */
  71     cpu_restore_state(cs, GETPC());
  72     env->sregs[5] = env->pc;
  73     /* Jump the the exception handline routine.  */
  74     env->pc = env->sregs[1];
  75     cpu_loop_exit(cs);
  76 }
  77
  78 uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
  79 {
  80     if (unlikely(b == 0)) {
  81         helper_raise_exception(env, MOXIE_EX_DIV0);
  82         return 0;
  83     }
  84     if (unlikely(a == INT_MIN && b == -1)) {
  85         return INT_MIN;
  86     }
  87
  88     return (int32_t)a / (int32_t)b;
  89 }
  90
  91 uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
  92 {
  93     if (unlikely(b == 0)) {
  94         helper_raise_exception(env, MOXIE_EX_DIV0);
  95         return 0;
  96     }
  97     return a / b;
  98 }
  99
 100 void helper_debug(CPUMoxieState *env)
 101 {
 102     CPUState *cs = CPU(moxie_env_get_cpu(env));
 103
 104     cs->exception_index = EXCP_DEBUG;
 105     cpu_loop_exit(cs);
 106 }
 107
 108 #if defined(CONFIG_USER_ONLY)
 109
 110 void moxie_cpu_do_interrupt(CPUState *cs)
 111 {
 112     CPUState *cs = CPU(moxie_env_get_cpu(env));
 113
 114     cs->exception_index = -1;
 115 }
 116
 117 int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
 118                                int rw, int mmu_idx)
 119 {
 120     MoxieCPU *cpu = MOXIE_CPU(cs);
 121
 122     cs->exception_index = 0xaa;
 123     cpu->env.debug1 = address;
 124     cpu_dump_state(cs, stderr, fprintf, 0);
 125     return 1;
 126 }
 127
 128 #else /* !CONFIG_USER_ONLY */
 129
 130 int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
 131                                int rw, int mmu_idx)
 132 {
 133     MoxieCPU *cpu = MOXIE_CPU(cs);
 134     CPUMoxieState *env = &cpu->env;
 135     MoxieMMUResult res;
 136     int prot, miss;
 137     target_ulong phy;
 138     int r = 1;
 139
 140     address &= TARGET_PAGE_MASK;
 141     prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
 142     miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
 143     if (miss) {
 144         /* handle the miss.  */
 145         phy = 0;
 146         cs->exception_index = MOXIE_EX_MMU_MISS;
 147     } else {
 148         phy = res.phy;
 149         r = 0;
 150     }
 151     tlb_set_page(cs, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
 152     return r;
 153 }
 154
 155
 156 void moxie_cpu_do_interrupt(CPUState *cs)
 157 {
 158     switch (cs->exception_index) {
 159     case MOXIE_EX_BREAK:
 160         break;
 161     default:
 162         break;
 163     }
 164 }
 165
 166 hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
 167 {
 168     MoxieCPU *cpu = MOXIE_CPU(cs);
 169     uint32_t phy = addr;
 170     MoxieMMUResult res;
 171     int miss;
 172
 173     miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
 174     if (!miss) {
 175         phy = res.phy;
 176     }
 177     return phy;
 178 }
 179 #endif