2 * Channel subsystem base support.
4 * Copyright 2012 IBM Corp.
5 * Author(s): Cornelia Huck <cornelia.huck@de.ibm.com>
7 * This work is licensed under the terms of the GNU GPL, version 2 or (at
8 * your option) any later version. See the COPYING file in the top-level
13 #include "qemu/bitops.h"
14 #include "exec/address-spaces.h"
20 typedef struct CrwContainer
{
22 QTAILQ_ENTRY(CrwContainer
) sibling
;
25 typedef struct ChpInfo
{
31 typedef struct SubchSet
{
32 SubchDev
*sch
[MAX_SCHID
+ 1];
33 unsigned long schids_used
[BITS_TO_LONGS(MAX_SCHID
+ 1)];
34 unsigned long devnos_used
[BITS_TO_LONGS(MAX_SCHID
+ 1)];
37 typedef struct CssImage
{
38 SubchSet
*sch_set
[MAX_SSID
+ 1];
39 ChpInfo chpids
[MAX_CHPID
+ 1];
42 typedef struct ChannelSubSys
{
43 QTAILQ_HEAD(, CrwContainer
) pending_crws
;
50 CssImage
*css
[MAX_CSSID
+ 1];
51 uint8_t default_cssid
;
54 static ChannelSubSys
*channel_subsys
;
56 int css_create_css_image(uint8_t cssid
, bool default_image
)
58 trace_css_new_image(cssid
, default_image
? "(default)" : "");
59 if (cssid
> MAX_CSSID
) {
62 if (channel_subsys
->css
[cssid
]) {
65 channel_subsys
->css
[cssid
] = g_malloc0(sizeof(CssImage
));
67 channel_subsys
->default_cssid
= cssid
;
72 uint16_t css_build_subchannel_id(SubchDev
*sch
)
74 if (channel_subsys
->max_cssid
> 0) {
75 return (sch
->cssid
<< 8) | (1 << 3) | (sch
->ssid
<< 1) | 1;
77 return (sch
->ssid
<< 1) | 1;
80 static void css_inject_io_interrupt(SubchDev
*sch
)
82 S390CPU
*cpu
= s390_cpu_addr2state(0);
83 uint8_t isc
= (sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_ISC
) >> 11;
85 trace_css_io_interrupt(sch
->cssid
, sch
->ssid
, sch
->schid
,
86 sch
->curr_status
.pmcw
.intparm
, isc
, "");
87 s390_io_interrupt(cpu
,
88 css_build_subchannel_id(sch
),
90 sch
->curr_status
.pmcw
.intparm
,
94 void css_conditional_io_interrupt(SubchDev
*sch
)
97 * If the subchannel is not currently status pending, make it pending
100 if (!(sch
->curr_status
.scsw
.ctrl
& SCSW_STCTL_STATUS_PEND
)) {
101 S390CPU
*cpu
= s390_cpu_addr2state(0);
102 uint8_t isc
= (sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_ISC
) >> 11;
104 trace_css_io_interrupt(sch
->cssid
, sch
->ssid
, sch
->schid
,
105 sch
->curr_status
.pmcw
.intparm
, isc
,
107 sch
->curr_status
.scsw
.ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
108 sch
->curr_status
.scsw
.ctrl
|=
109 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
110 /* Inject an I/O interrupt. */
111 s390_io_interrupt(cpu
,
112 css_build_subchannel_id(sch
),
114 sch
->curr_status
.pmcw
.intparm
,
119 void css_adapter_interrupt(uint8_t isc
)
121 S390CPU
*cpu
= s390_cpu_addr2state(0);
122 uint32_t io_int_word
= (isc
<< 27) | IO_INT_WORD_AI
;
124 trace_css_adapter_interrupt(isc
);
125 s390_io_interrupt(cpu
, 0, 0, 0, io_int_word
);
128 static void sch_handle_clear_func(SubchDev
*sch
)
130 PMCW
*p
= &sch
->curr_status
.pmcw
;
131 SCSW
*s
= &sch
->curr_status
.scsw
;
134 /* Path management: In our simple css, we always choose the only path. */
137 /* Reset values prior to 'issuing the clear signal'. */
140 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
142 /* We always 'attempt to issue the clear signal', and we always succeed. */
143 sch
->channel_prog
= 0x0;
144 sch
->last_cmd_valid
= false;
145 s
->ctrl
&= ~SCSW_ACTL_CLEAR_PEND
;
146 s
->ctrl
|= SCSW_STCTL_STATUS_PEND
;
154 static void sch_handle_halt_func(SubchDev
*sch
)
157 PMCW
*p
= &sch
->curr_status
.pmcw
;
158 SCSW
*s
= &sch
->curr_status
.scsw
;
161 /* Path management: In our simple css, we always choose the only path. */
164 /* We always 'attempt to issue the halt signal', and we always succeed. */
165 sch
->channel_prog
= 0x0;
166 sch
->last_cmd_valid
= false;
167 s
->ctrl
&= ~SCSW_ACTL_HALT_PEND
;
168 s
->ctrl
|= SCSW_STCTL_STATUS_PEND
;
170 if ((s
->ctrl
& (SCSW_ACTL_SUBCH_ACTIVE
| SCSW_ACTL_DEVICE_ACTIVE
)) ||
171 !((s
->ctrl
& SCSW_ACTL_START_PEND
) ||
172 (s
->ctrl
& SCSW_ACTL_SUSP
))) {
173 s
->dstat
= SCSW_DSTAT_DEVICE_END
;
180 static void copy_sense_id_to_guest(SenseId
*dest
, SenseId
*src
)
184 dest
->reserved
= src
->reserved
;
185 dest
->cu_type
= cpu_to_be16(src
->cu_type
);
186 dest
->cu_model
= src
->cu_model
;
187 dest
->dev_type
= cpu_to_be16(src
->dev_type
);
188 dest
->dev_model
= src
->dev_model
;
189 dest
->unused
= src
->unused
;
190 for (i
= 0; i
< ARRAY_SIZE(dest
->ciw
); i
++) {
191 dest
->ciw
[i
].type
= src
->ciw
[i
].type
;
192 dest
->ciw
[i
].command
= src
->ciw
[i
].command
;
193 dest
->ciw
[i
].count
= cpu_to_be16(src
->ciw
[i
].count
);
197 static CCW1
copy_ccw_from_guest(hwaddr addr
)
202 cpu_physical_memory_read(addr
, &tmp
, sizeof(tmp
));
203 ret
.cmd_code
= tmp
.cmd_code
;
204 ret
.flags
= tmp
.flags
;
205 ret
.count
= be16_to_cpu(tmp
.count
);
206 ret
.cda
= be32_to_cpu(tmp
.cda
);
211 static int css_interpret_ccw(SubchDev
*sch
, hwaddr ccw_addr
)
222 ccw
= copy_ccw_from_guest(ccw_addr
);
224 /* Check for invalid command codes. */
225 if ((ccw
.cmd_code
& 0x0f) == 0) {
228 if (((ccw
.cmd_code
& 0x0f) == CCW_CMD_TIC
) &&
229 ((ccw
.cmd_code
& 0xf0) != 0)) {
233 if (ccw
.flags
& CCW_FLAG_SUSPEND
) {
237 check_len
= !((ccw
.flags
& CCW_FLAG_SLI
) && !(ccw
.flags
& CCW_FLAG_DC
));
239 /* Look at the command. */
240 switch (ccw
.cmd_code
) {
245 case CCW_CMD_BASIC_SENSE
:
247 if (ccw
.count
!= sizeof(sch
->sense_data
)) {
252 len
= MIN(ccw
.count
, sizeof(sch
->sense_data
));
253 cpu_physical_memory_write(ccw
.cda
, sch
->sense_data
, len
);
254 sch
->curr_status
.scsw
.count
= ccw
.count
- len
;
255 memset(sch
->sense_data
, 0, sizeof(sch
->sense_data
));
258 case CCW_CMD_SENSE_ID
:
262 copy_sense_id_to_guest(&sense_id
, &sch
->id
);
263 /* Sense ID information is device specific. */
265 if (ccw
.count
!= sizeof(sense_id
)) {
270 len
= MIN(ccw
.count
, sizeof(sense_id
));
272 * Only indicate 0xff in the first sense byte if we actually
273 * have enough place to store at least bytes 0-3.
276 sense_id
.reserved
= 0xff;
278 sense_id
.reserved
= 0;
280 cpu_physical_memory_write(ccw
.cda
, &sense_id
, len
);
281 sch
->curr_status
.scsw
.count
= ccw
.count
- len
;
286 if (sch
->last_cmd_valid
&& (sch
->last_cmd
.cmd_code
== CCW_CMD_TIC
)) {
290 if (ccw
.flags
& (CCW_FLAG_CC
| CCW_FLAG_DC
)) {
294 sch
->channel_prog
= ccw
.cda
;
299 /* Handle device specific commands. */
300 ret
= sch
->ccw_cb(sch
, ccw
);
307 sch
->last_cmd_valid
= true;
309 if (ccw
.flags
& CCW_FLAG_CC
) {
310 sch
->channel_prog
+= 8;
318 static void sch_handle_start_func(SubchDev
*sch
, ORB
*orb
)
321 PMCW
*p
= &sch
->curr_status
.pmcw
;
322 SCSW
*s
= &sch
->curr_status
.scsw
;
326 /* Path management: In our simple css, we always choose the only path. */
329 if (!(s
->ctrl
& SCSW_ACTL_SUSP
)) {
330 /* Look at the orb and try to execute the channel program. */
331 assert(orb
!= NULL
); /* resume does not pass an orb */
332 p
->intparm
= orb
->intparm
;
333 if (!(orb
->lpm
& path
)) {
334 /* Generate a deferred cc 3 condition. */
335 s
->flags
|= SCSW_FLAGS_MASK_CC
;
336 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
337 s
->ctrl
|= (SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
);
341 s
->ctrl
&= ~(SCSW_ACTL_SUSP
| SCSW_ACTL_RESUME_PEND
);
343 sch
->last_cmd_valid
= false;
345 ret
= css_interpret_ccw(sch
, sch
->channel_prog
);
348 /* ccw chain, continue processing */
352 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
353 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
354 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
355 SCSW_STCTL_STATUS_PEND
;
356 s
->dstat
= SCSW_DSTAT_CHANNEL_END
| SCSW_DSTAT_DEVICE_END
;
359 /* unsupported command, generate unit check (command reject) */
360 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
361 s
->dstat
= SCSW_DSTAT_UNIT_CHECK
;
362 /* Set sense bit 0 in ecw0. */
363 sch
->sense_data
[0] = 0x80;
364 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
365 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
366 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
369 /* memory problem, generate channel data check */
370 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
371 s
->cstat
= SCSW_CSTAT_DATA_CHECK
;
372 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
373 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
374 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
377 /* subchannel busy, generate deferred cc 1 */
378 s
->flags
&= ~SCSW_FLAGS_MASK_CC
;
379 s
->flags
|= (1 << 8);
380 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
381 s
->ctrl
|= SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
384 /* channel program has been suspended */
385 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
386 s
->ctrl
|= SCSW_ACTL_SUSP
;
389 /* error, generate channel program check */
390 s
->ctrl
&= ~SCSW_ACTL_START_PEND
;
391 s
->cstat
= SCSW_CSTAT_PROG_CHECK
;
392 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
393 s
->ctrl
|= SCSW_STCTL_PRIMARY
| SCSW_STCTL_SECONDARY
|
394 SCSW_STCTL_ALERT
| SCSW_STCTL_STATUS_PEND
;
397 } while (ret
== -EAGAIN
);
402 * On real machines, this would run asynchronously to the main vcpus.
403 * We might want to make some parts of the ssch handling (interpreting
404 * read/writes) asynchronous later on if we start supporting more than
405 * our current very simple devices.
407 static void do_subchannel_work(SubchDev
*sch
, ORB
*orb
)
410 SCSW
*s
= &sch
->curr_status
.scsw
;
412 if (s
->ctrl
& SCSW_FCTL_CLEAR_FUNC
) {
413 sch_handle_clear_func(sch
);
414 } else if (s
->ctrl
& SCSW_FCTL_HALT_FUNC
) {
415 sch_handle_halt_func(sch
);
416 } else if (s
->ctrl
& SCSW_FCTL_START_FUNC
) {
417 sch_handle_start_func(sch
, orb
);
422 css_inject_io_interrupt(sch
);
425 static void copy_pmcw_to_guest(PMCW
*dest
, const PMCW
*src
)
429 dest
->intparm
= cpu_to_be32(src
->intparm
);
430 dest
->flags
= cpu_to_be16(src
->flags
);
431 dest
->devno
= cpu_to_be16(src
->devno
);
432 dest
->lpm
= src
->lpm
;
433 dest
->pnom
= src
->pnom
;
434 dest
->lpum
= src
->lpum
;
435 dest
->pim
= src
->pim
;
436 dest
->mbi
= cpu_to_be16(src
->mbi
);
437 dest
->pom
= src
->pom
;
438 dest
->pam
= src
->pam
;
439 for (i
= 0; i
< ARRAY_SIZE(dest
->chpid
); i
++) {
440 dest
->chpid
[i
] = src
->chpid
[i
];
442 dest
->chars
= cpu_to_be32(src
->chars
);
445 static void copy_scsw_to_guest(SCSW
*dest
, const SCSW
*src
)
447 dest
->flags
= cpu_to_be16(src
->flags
);
448 dest
->ctrl
= cpu_to_be16(src
->ctrl
);
449 dest
->cpa
= cpu_to_be32(src
->cpa
);
450 dest
->dstat
= src
->dstat
;
451 dest
->cstat
= src
->cstat
;
452 dest
->count
= cpu_to_be16(src
->count
);
455 static void copy_schib_to_guest(SCHIB
*dest
, const SCHIB
*src
)
459 copy_pmcw_to_guest(&dest
->pmcw
, &src
->pmcw
);
460 copy_scsw_to_guest(&dest
->scsw
, &src
->scsw
);
461 dest
->mba
= cpu_to_be64(src
->mba
);
462 for (i
= 0; i
< ARRAY_SIZE(dest
->mda
); i
++) {
463 dest
->mda
[i
] = src
->mda
[i
];
467 int css_do_stsch(SubchDev
*sch
, SCHIB
*schib
)
469 /* Use current status. */
470 copy_schib_to_guest(schib
, &sch
->curr_status
);
474 static void copy_pmcw_from_guest(PMCW
*dest
, const PMCW
*src
)
478 dest
->intparm
= be32_to_cpu(src
->intparm
);
479 dest
->flags
= be16_to_cpu(src
->flags
);
480 dest
->devno
= be16_to_cpu(src
->devno
);
481 dest
->lpm
= src
->lpm
;
482 dest
->pnom
= src
->pnom
;
483 dest
->lpum
= src
->lpum
;
484 dest
->pim
= src
->pim
;
485 dest
->mbi
= be16_to_cpu(src
->mbi
);
486 dest
->pom
= src
->pom
;
487 dest
->pam
= src
->pam
;
488 for (i
= 0; i
< ARRAY_SIZE(dest
->chpid
); i
++) {
489 dest
->chpid
[i
] = src
->chpid
[i
];
491 dest
->chars
= be32_to_cpu(src
->chars
);
494 static void copy_scsw_from_guest(SCSW
*dest
, const SCSW
*src
)
496 dest
->flags
= be16_to_cpu(src
->flags
);
497 dest
->ctrl
= be16_to_cpu(src
->ctrl
);
498 dest
->cpa
= be32_to_cpu(src
->cpa
);
499 dest
->dstat
= src
->dstat
;
500 dest
->cstat
= src
->cstat
;
501 dest
->count
= be16_to_cpu(src
->count
);
504 static void copy_schib_from_guest(SCHIB
*dest
, const SCHIB
*src
)
508 copy_pmcw_from_guest(&dest
->pmcw
, &src
->pmcw
);
509 copy_scsw_from_guest(&dest
->scsw
, &src
->scsw
);
510 dest
->mba
= be64_to_cpu(src
->mba
);
511 for (i
= 0; i
< ARRAY_SIZE(dest
->mda
); i
++) {
512 dest
->mda
[i
] = src
->mda
[i
];
516 int css_do_msch(SubchDev
*sch
, SCHIB
*orig_schib
)
518 SCSW
*s
= &sch
->curr_status
.scsw
;
519 PMCW
*p
= &sch
->curr_status
.pmcw
;
523 if (!(sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_DNV
)) {
528 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
534 (SCSW_FCTL_START_FUNC
|SCSW_FCTL_HALT_FUNC
|SCSW_FCTL_CLEAR_FUNC
)) {
539 copy_schib_from_guest(&schib
, orig_schib
);
540 /* Only update the program-modifiable fields. */
541 p
->intparm
= schib
.pmcw
.intparm
;
542 p
->flags
&= ~(PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
543 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
545 p
->flags
|= schib
.pmcw
.flags
&
546 (PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
547 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
549 p
->lpm
= schib
.pmcw
.lpm
;
550 p
->mbi
= schib
.pmcw
.mbi
;
551 p
->pom
= schib
.pmcw
.pom
;
552 p
->chars
&= ~(PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_CSENSE
);
553 p
->chars
|= schib
.pmcw
.chars
&
554 (PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_CSENSE
);
555 sch
->curr_status
.mba
= schib
.mba
;
563 int css_do_xsch(SubchDev
*sch
)
565 SCSW
*s
= &sch
->curr_status
.scsw
;
566 PMCW
*p
= &sch
->curr_status
.pmcw
;
569 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
574 if (!(s
->ctrl
& SCSW_CTRL_MASK_FCTL
) ||
575 ((s
->ctrl
& SCSW_CTRL_MASK_FCTL
) != SCSW_FCTL_START_FUNC
) ||
577 (SCSW_ACTL_RESUME_PEND
| SCSW_ACTL_START_PEND
| SCSW_ACTL_SUSP
))) ||
578 (s
->ctrl
& SCSW_ACTL_SUBCH_ACTIVE
)) {
583 if (s
->ctrl
& SCSW_CTRL_MASK_STCTL
) {
588 /* Cancel the current operation. */
589 s
->ctrl
&= ~(SCSW_FCTL_START_FUNC
|
590 SCSW_ACTL_RESUME_PEND
|
591 SCSW_ACTL_START_PEND
|
593 sch
->channel_prog
= 0x0;
594 sch
->last_cmd_valid
= false;
603 int css_do_csch(SubchDev
*sch
)
605 SCSW
*s
= &sch
->curr_status
.scsw
;
606 PMCW
*p
= &sch
->curr_status
.pmcw
;
609 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
614 /* Trigger the clear function. */
615 s
->ctrl
&= ~(SCSW_CTRL_MASK_FCTL
| SCSW_CTRL_MASK_ACTL
);
616 s
->ctrl
|= SCSW_FCTL_CLEAR_FUNC
| SCSW_FCTL_CLEAR_FUNC
;
618 do_subchannel_work(sch
, NULL
);
625 int css_do_hsch(SubchDev
*sch
)
627 SCSW
*s
= &sch
->curr_status
.scsw
;
628 PMCW
*p
= &sch
->curr_status
.pmcw
;
631 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
636 if (((s
->ctrl
& SCSW_CTRL_MASK_STCTL
) == SCSW_STCTL_STATUS_PEND
) ||
637 (s
->ctrl
& (SCSW_STCTL_PRIMARY
|
638 SCSW_STCTL_SECONDARY
|
639 SCSW_STCTL_ALERT
))) {
644 if (s
->ctrl
& (SCSW_FCTL_HALT_FUNC
| SCSW_FCTL_CLEAR_FUNC
)) {
649 /* Trigger the halt function. */
650 s
->ctrl
|= SCSW_FCTL_HALT_FUNC
;
651 s
->ctrl
&= ~SCSW_FCTL_START_FUNC
;
652 if (((s
->ctrl
& SCSW_CTRL_MASK_ACTL
) ==
653 (SCSW_ACTL_SUBCH_ACTIVE
| SCSW_ACTL_DEVICE_ACTIVE
)) &&
654 ((s
->ctrl
& SCSW_CTRL_MASK_STCTL
) == SCSW_STCTL_INTERMEDIATE
)) {
655 s
->ctrl
&= ~SCSW_STCTL_STATUS_PEND
;
657 s
->ctrl
|= SCSW_ACTL_HALT_PEND
;
659 do_subchannel_work(sch
, NULL
);
666 static void css_update_chnmon(SubchDev
*sch
)
668 if (!(sch
->curr_status
.pmcw
.flags
& PMCW_FLAGS_MASK_MME
)) {
672 /* The counter is conveniently located at the beginning of the struct. */
673 if (sch
->curr_status
.pmcw
.chars
& PMCW_CHARS_MASK_MBFC
) {
674 /* Format 1, per-subchannel area. */
677 count
= ldl_phys(&address_space_memory
, sch
->curr_status
.mba
);
679 stl_phys(&address_space_memory
, sch
->curr_status
.mba
, count
);
681 /* Format 0, global area. */
685 offset
= sch
->curr_status
.pmcw
.mbi
<< 5;
686 count
= lduw_phys(&address_space_memory
,
687 channel_subsys
->chnmon_area
+ offset
);
689 stw_phys(&address_space_memory
,
690 channel_subsys
->chnmon_area
+ offset
, count
);
694 int css_do_ssch(SubchDev
*sch
, ORB
*orb
)
696 SCSW
*s
= &sch
->curr_status
.scsw
;
697 PMCW
*p
= &sch
->curr_status
.pmcw
;
700 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
705 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
710 if (s
->ctrl
& (SCSW_FCTL_START_FUNC
|
711 SCSW_FCTL_HALT_FUNC
|
712 SCSW_FCTL_CLEAR_FUNC
)) {
717 /* If monitoring is active, update counter. */
718 if (channel_subsys
->chnmon_active
) {
719 css_update_chnmon(sch
);
721 sch
->channel_prog
= orb
->cpa
;
722 /* Trigger the start function. */
723 s
->ctrl
|= (SCSW_FCTL_START_FUNC
| SCSW_ACTL_START_PEND
);
724 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
726 do_subchannel_work(sch
, orb
);
733 static void copy_irb_to_guest(IRB
*dest
, const IRB
*src
)
737 copy_scsw_to_guest(&dest
->scsw
, &src
->scsw
);
739 for (i
= 0; i
< ARRAY_SIZE(dest
->esw
); i
++) {
740 dest
->esw
[i
] = cpu_to_be32(src
->esw
[i
]);
742 for (i
= 0; i
< ARRAY_SIZE(dest
->ecw
); i
++) {
743 dest
->ecw
[i
] = cpu_to_be32(src
->ecw
[i
]);
745 for (i
= 0; i
< ARRAY_SIZE(dest
->emw
); i
++) {
746 dest
->emw
[i
] = cpu_to_be32(src
->emw
[i
]);
750 int css_do_tsch(SubchDev
*sch
, IRB
*target_irb
)
752 SCSW
*s
= &sch
->curr_status
.scsw
;
753 PMCW
*p
= &sch
->curr_status
.pmcw
;
760 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
765 stctl
= s
->ctrl
& SCSW_CTRL_MASK_STCTL
;
766 fctl
= s
->ctrl
& SCSW_CTRL_MASK_FCTL
;
767 actl
= s
->ctrl
& SCSW_CTRL_MASK_ACTL
;
769 /* Prepare the irb for the guest. */
770 memset(&irb
, 0, sizeof(IRB
));
772 /* Copy scsw from current status. */
773 memcpy(&irb
.scsw
, s
, sizeof(SCSW
));
774 if (stctl
& SCSW_STCTL_STATUS_PEND
) {
775 if (s
->cstat
& (SCSW_CSTAT_DATA_CHECK
|
776 SCSW_CSTAT_CHN_CTRL_CHK
|
777 SCSW_CSTAT_INTF_CTRL_CHK
)) {
778 irb
.scsw
.flags
|= SCSW_FLAGS_MASK_ESWF
;
779 irb
.esw
[0] = 0x04804000;
781 irb
.esw
[0] = 0x00800000;
783 /* If a unit check is pending, copy sense data. */
784 if ((s
->dstat
& SCSW_DSTAT_UNIT_CHECK
) &&
785 (p
->chars
& PMCW_CHARS_MASK_CSENSE
)) {
786 irb
.scsw
.flags
|= SCSW_FLAGS_MASK_ESWF
| SCSW_FLAGS_MASK_ECTL
;
787 memcpy(irb
.ecw
, sch
->sense_data
, sizeof(sch
->sense_data
));
788 irb
.esw
[1] = 0x01000000 | (sizeof(sch
->sense_data
) << 8);
791 /* Store the irb to the guest. */
792 copy_irb_to_guest(target_irb
, &irb
);
794 /* Clear conditions on subchannel, if applicable. */
795 if (stctl
& SCSW_STCTL_STATUS_PEND
) {
796 s
->ctrl
&= ~SCSW_CTRL_MASK_STCTL
;
797 if ((stctl
!= (SCSW_STCTL_INTERMEDIATE
| SCSW_STCTL_STATUS_PEND
)) ||
798 ((fctl
& SCSW_FCTL_HALT_FUNC
) &&
799 (actl
& SCSW_ACTL_SUSP
))) {
800 s
->ctrl
&= ~SCSW_CTRL_MASK_FCTL
;
802 if (stctl
!= (SCSW_STCTL_INTERMEDIATE
| SCSW_STCTL_STATUS_PEND
)) {
803 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
804 s
->ctrl
&= ~(SCSW_ACTL_RESUME_PEND
|
805 SCSW_ACTL_START_PEND
|
806 SCSW_ACTL_HALT_PEND
|
807 SCSW_ACTL_CLEAR_PEND
|
810 if ((actl
& SCSW_ACTL_SUSP
) &&
811 (fctl
& SCSW_FCTL_START_FUNC
)) {
812 s
->flags
&= ~SCSW_FLAGS_MASK_PNO
;
813 if (fctl
& SCSW_FCTL_HALT_FUNC
) {
814 s
->ctrl
&= ~(SCSW_ACTL_RESUME_PEND
|
815 SCSW_ACTL_START_PEND
|
816 SCSW_ACTL_HALT_PEND
|
817 SCSW_ACTL_CLEAR_PEND
|
820 s
->ctrl
&= ~SCSW_ACTL_RESUME_PEND
;
824 /* Clear pending sense data. */
825 if (p
->chars
& PMCW_CHARS_MASK_CSENSE
) {
826 memset(sch
->sense_data
, 0 , sizeof(sch
->sense_data
));
830 ret
= ((stctl
& SCSW_STCTL_STATUS_PEND
) == 0);
836 static void copy_crw_to_guest(CRW
*dest
, const CRW
*src
)
838 dest
->flags
= cpu_to_be16(src
->flags
);
839 dest
->rsid
= cpu_to_be16(src
->rsid
);
842 int css_do_stcrw(CRW
*crw
)
844 CrwContainer
*crw_cont
;
847 crw_cont
= QTAILQ_FIRST(&channel_subsys
->pending_crws
);
849 QTAILQ_REMOVE(&channel_subsys
->pending_crws
, crw_cont
, sibling
);
850 copy_crw_to_guest(crw
, &crw_cont
->crw
);
854 /* List was empty, turn crw machine checks on again. */
855 memset(crw
, 0, sizeof(*crw
));
856 channel_subsys
->do_crw_mchk
= true;
863 int css_do_tpi(IOIntCode
*int_code
, int lowcore
)
865 /* No pending interrupts for !KVM. */
869 int css_collect_chp_desc(int m
, uint8_t cssid
, uint8_t f_chpid
, uint8_t l_chpid
,
874 uint32_t chpid_type_word
;
878 css
= channel_subsys
->css
[channel_subsys
->default_cssid
];
880 css
= channel_subsys
->css
[cssid
];
886 for (i
= f_chpid
; i
<= l_chpid
; i
++) {
887 if (css
->chpids
[i
].in_use
) {
888 chpid_type_word
= 0x80000000 | (css
->chpids
[i
].type
<< 8) | i
;
890 words
[0] = cpu_to_be32(chpid_type_word
);
892 memcpy(buf
+ desc_size
, words
, 8);
894 } else if (rfmt
== 1) {
895 words
[0] = cpu_to_be32(chpid_type_word
);
903 memcpy(buf
+ desc_size
, words
, 32);
911 void css_do_schm(uint8_t mbk
, int update
, int dct
, uint64_t mbo
)
913 /* dct is currently ignored (not really meaningful for our devices) */
914 /* TODO: Don't ignore mbk. */
915 if (update
&& !channel_subsys
->chnmon_active
) {
916 /* Enable measuring. */
917 channel_subsys
->chnmon_area
= mbo
;
918 channel_subsys
->chnmon_active
= true;
920 if (!update
&& channel_subsys
->chnmon_active
) {
921 /* Disable measuring. */
922 channel_subsys
->chnmon_area
= 0;
923 channel_subsys
->chnmon_active
= false;
927 int css_do_rsch(SubchDev
*sch
)
929 SCSW
*s
= &sch
->curr_status
.scsw
;
930 PMCW
*p
= &sch
->curr_status
.pmcw
;
933 if (!(p
->flags
& (PMCW_FLAGS_MASK_DNV
| PMCW_FLAGS_MASK_ENA
))) {
938 if (s
->ctrl
& SCSW_STCTL_STATUS_PEND
) {
943 if (((s
->ctrl
& SCSW_CTRL_MASK_FCTL
) != SCSW_FCTL_START_FUNC
) ||
944 (s
->ctrl
& SCSW_ACTL_RESUME_PEND
) ||
945 (!(s
->ctrl
& SCSW_ACTL_SUSP
))) {
950 /* If monitoring is active, update counter. */
951 if (channel_subsys
->chnmon_active
) {
952 css_update_chnmon(sch
);
955 s
->ctrl
|= SCSW_ACTL_RESUME_PEND
;
956 do_subchannel_work(sch
, NULL
);
963 int css_do_rchp(uint8_t cssid
, uint8_t chpid
)
967 if (cssid
> channel_subsys
->max_cssid
) {
970 if (channel_subsys
->max_cssid
== 0) {
971 real_cssid
= channel_subsys
->default_cssid
;
975 if (!channel_subsys
->css
[real_cssid
]) {
979 if (!channel_subsys
->css
[real_cssid
]->chpids
[chpid
].in_use
) {
983 if (!channel_subsys
->css
[real_cssid
]->chpids
[chpid
].is_virtual
) {
985 "rchp unsupported for non-virtual chpid %x.%02x!\n",
990 /* We don't really use a channel path, so we're done here. */
991 css_queue_crw(CRW_RSC_CHP
, CRW_ERC_INIT
,
992 channel_subsys
->max_cssid
> 0 ? 1 : 0, chpid
);
993 if (channel_subsys
->max_cssid
> 0) {
994 css_queue_crw(CRW_RSC_CHP
, CRW_ERC_INIT
, 0, real_cssid
<< 8);
999 bool css_schid_final(int m
, uint8_t cssid
, uint8_t ssid
, uint16_t schid
)
1004 real_cssid
= (!m
&& (cssid
== 0)) ? channel_subsys
->default_cssid
: cssid
;
1005 if (real_cssid
> MAX_CSSID
|| ssid
> MAX_SSID
||
1006 !channel_subsys
->css
[real_cssid
] ||
1007 !channel_subsys
->css
[real_cssid
]->sch_set
[ssid
]) {
1010 set
= channel_subsys
->css
[real_cssid
]->sch_set
[ssid
];
1011 return schid
> find_last_bit(set
->schids_used
,
1012 (MAX_SCHID
+ 1) / sizeof(unsigned long));
1015 static int css_add_virtual_chpid(uint8_t cssid
, uint8_t chpid
, uint8_t type
)
1019 trace_css_chpid_add(cssid
, chpid
, type
);
1020 if (cssid
> MAX_CSSID
) {
1023 css
= channel_subsys
->css
[cssid
];
1027 if (css
->chpids
[chpid
].in_use
) {
1030 css
->chpids
[chpid
].in_use
= 1;
1031 css
->chpids
[chpid
].type
= type
;
1032 css
->chpids
[chpid
].is_virtual
= 1;
1034 css_generate_chp_crws(cssid
, chpid
);
1039 void css_sch_build_virtual_schib(SubchDev
*sch
, uint8_t chpid
, uint8_t type
)
1041 PMCW
*p
= &sch
->curr_status
.pmcw
;
1042 SCSW
*s
= &sch
->curr_status
.scsw
;
1044 CssImage
*css
= channel_subsys
->css
[sch
->cssid
];
1046 assert(css
!= NULL
);
1047 memset(p
, 0, sizeof(PMCW
));
1048 p
->flags
|= PMCW_FLAGS_MASK_DNV
;
1049 p
->devno
= sch
->devno
;
1054 p
->chpid
[0] = chpid
;
1055 if (!css
->chpids
[chpid
].in_use
) {
1056 css_add_virtual_chpid(sch
->cssid
, chpid
, type
);
1059 memset(s
, 0, sizeof(SCSW
));
1060 sch
->curr_status
.mba
= 0;
1061 for (i
= 0; i
< ARRAY_SIZE(sch
->curr_status
.mda
); i
++) {
1062 sch
->curr_status
.mda
[i
] = 0;
1066 SubchDev
*css_find_subch(uint8_t m
, uint8_t cssid
, uint8_t ssid
, uint16_t schid
)
1070 real_cssid
= (!m
&& (cssid
== 0)) ? channel_subsys
->default_cssid
: cssid
;
1072 if (!channel_subsys
->css
[real_cssid
]) {
1076 if (!channel_subsys
->css
[real_cssid
]->sch_set
[ssid
]) {
1080 return channel_subsys
->css
[real_cssid
]->sch_set
[ssid
]->sch
[schid
];
1083 bool css_subch_visible(SubchDev
*sch
)
1085 if (sch
->ssid
> channel_subsys
->max_ssid
) {
1089 if (sch
->cssid
!= channel_subsys
->default_cssid
) {
1090 return (channel_subsys
->max_cssid
> 0);
1096 bool css_present(uint8_t cssid
)
1098 return (channel_subsys
->css
[cssid
] != NULL
);
1101 bool css_devno_used(uint8_t cssid
, uint8_t ssid
, uint16_t devno
)
1103 if (!channel_subsys
->css
[cssid
]) {
1106 if (!channel_subsys
->css
[cssid
]->sch_set
[ssid
]) {
1110 return !!test_bit(devno
,
1111 channel_subsys
->css
[cssid
]->sch_set
[ssid
]->devnos_used
);
1114 void css_subch_assign(uint8_t cssid
, uint8_t ssid
, uint16_t schid
,
1115 uint16_t devno
, SubchDev
*sch
)
1120 trace_css_assign_subch(sch
? "assign" : "deassign", cssid
, ssid
, schid
,
1122 if (!channel_subsys
->css
[cssid
]) {
1124 "Suspicious call to %s (%x.%x.%04x) for non-existing css!\n",
1125 __func__
, cssid
, ssid
, schid
);
1128 css
= channel_subsys
->css
[cssid
];
1130 if (!css
->sch_set
[ssid
]) {
1131 css
->sch_set
[ssid
] = g_malloc0(sizeof(SubchSet
));
1133 s_set
= css
->sch_set
[ssid
];
1135 s_set
->sch
[schid
] = sch
;
1137 set_bit(schid
, s_set
->schids_used
);
1138 set_bit(devno
, s_set
->devnos_used
);
1140 clear_bit(schid
, s_set
->schids_used
);
1141 clear_bit(devno
, s_set
->devnos_used
);
1145 void css_queue_crw(uint8_t rsc
, uint8_t erc
, int chain
, uint16_t rsid
)
1147 CrwContainer
*crw_cont
;
1149 trace_css_crw(rsc
, erc
, rsid
, chain
? "(chained)" : "");
1150 /* TODO: Maybe use a static crw pool? */
1151 crw_cont
= g_try_malloc0(sizeof(CrwContainer
));
1153 channel_subsys
->crws_lost
= true;
1156 crw_cont
->crw
.flags
= (rsc
<< 8) | erc
;
1158 crw_cont
->crw
.flags
|= CRW_FLAGS_MASK_C
;
1160 crw_cont
->crw
.rsid
= rsid
;
1161 if (channel_subsys
->crws_lost
) {
1162 crw_cont
->crw
.flags
|= CRW_FLAGS_MASK_R
;
1163 channel_subsys
->crws_lost
= false;
1166 QTAILQ_INSERT_TAIL(&channel_subsys
->pending_crws
, crw_cont
, sibling
);
1168 if (channel_subsys
->do_crw_mchk
) {
1169 S390CPU
*cpu
= s390_cpu_addr2state(0);
1171 channel_subsys
->do_crw_mchk
= false;
1172 /* Inject crw pending machine check. */
1177 void css_generate_sch_crws(uint8_t cssid
, uint8_t ssid
, uint16_t schid
,
1178 int hotplugged
, int add
)
1180 uint8_t guest_cssid
;
1183 if (add
&& !hotplugged
) {
1186 if (channel_subsys
->max_cssid
== 0) {
1187 /* Default cssid shows up as 0. */
1188 guest_cssid
= (cssid
== channel_subsys
->default_cssid
) ? 0 : cssid
;
1190 /* Show real cssid to the guest. */
1191 guest_cssid
= cssid
;
1194 * Only notify for higher subchannel sets/channel subsystems if the
1195 * guest has enabled it.
1197 if ((ssid
> channel_subsys
->max_ssid
) ||
1198 (guest_cssid
> channel_subsys
->max_cssid
) ||
1199 ((channel_subsys
->max_cssid
== 0) &&
1200 (cssid
!= channel_subsys
->default_cssid
))) {
1203 chain_crw
= (channel_subsys
->max_ssid
> 0) ||
1204 (channel_subsys
->max_cssid
> 0);
1205 css_queue_crw(CRW_RSC_SUBCH
, CRW_ERC_IPI
, chain_crw
? 1 : 0, schid
);
1207 css_queue_crw(CRW_RSC_SUBCH
, CRW_ERC_IPI
, 0,
1208 (guest_cssid
<< 8) | (ssid
<< 4));
1212 void css_generate_chp_crws(uint8_t cssid
, uint8_t chpid
)
1217 int css_enable_mcsse(void)
1219 trace_css_enable_facility("mcsse");
1220 channel_subsys
->max_cssid
= MAX_CSSID
;
1224 int css_enable_mss(void)
1226 trace_css_enable_facility("mss");
1227 channel_subsys
->max_ssid
= MAX_SSID
;
1231 static void css_init(void)
1233 channel_subsys
= g_malloc0(sizeof(*channel_subsys
));
1234 QTAILQ_INIT(&channel_subsys
->pending_crws
);
1235 channel_subsys
->do_crw_mchk
= true;
1236 channel_subsys
->crws_lost
= false;
1237 channel_subsys
->chnmon_active
= false;
1239 machine_init(css_init
);
1241 void css_reset_sch(SubchDev
*sch
)
1243 PMCW
*p
= &sch
->curr_status
.pmcw
;
1246 p
->flags
&= ~(PMCW_FLAGS_MASK_ISC
| PMCW_FLAGS_MASK_ENA
|
1247 PMCW_FLAGS_MASK_LM
| PMCW_FLAGS_MASK_MME
|
1248 PMCW_FLAGS_MASK_MP
| PMCW_FLAGS_MASK_TF
);
1249 p
->flags
|= PMCW_FLAGS_MASK_DNV
;
1250 p
->devno
= sch
->devno
;
1258 p
->chars
&= ~(PMCW_CHARS_MASK_MBFC
| PMCW_CHARS_MASK_XMWME
|
1259 PMCW_CHARS_MASK_CSENSE
);
1261 memset(&sch
->curr_status
.scsw
, 0, sizeof(sch
->curr_status
.scsw
));
1262 sch
->curr_status
.mba
= 0;
1264 sch
->channel_prog
= 0x0;
1265 sch
->last_cmd_valid
= false;
1266 sch
->thinint_active
= false;
1269 void css_reset(void)
1271 CrwContainer
*crw_cont
;
1273 /* Clean up monitoring. */
1274 channel_subsys
->chnmon_active
= false;
1275 channel_subsys
->chnmon_area
= 0;
1277 /* Clear pending CRWs. */
1278 while ((crw_cont
= QTAILQ_FIRST(&channel_subsys
->pending_crws
))) {
1279 QTAILQ_REMOVE(&channel_subsys
->pending_crws
, crw_cont
, sibling
);
1282 channel_subsys
->do_crw_mchk
= true;
1283 channel_subsys
->crws_lost
= false;
1285 /* Reset maximum ids. */
1286 channel_subsys
->max_cssid
= 0;
1287 channel_subsys
->max_ssid
= 0;