block: Accept device model name for block_set_io_throttle
[qemu.git] / hw / i2c / versatile_i2c.c
blobda9f298ee550caa7ccb202efbe22b127c183b1ad
1 /*
2 * ARM Versatile I2C controller
4 * Copyright (c) 2006-2007 CodeSourcery.
5 * Copyright (c) 2012 Oskar Andero <oskar.andero@gmail.com>
7 * This file is derived from hw/realview.c by Paul Brook
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version 2
12 * of the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, see <http://www.gnu.org/licenses/>.
24 #include "qemu/osdep.h"
25 #include "hw/sysbus.h"
26 #include "bitbang_i2c.h"
27 #include "qemu/log.h"
29 #define TYPE_VERSATILE_I2C "versatile_i2c"
30 #define VERSATILE_I2C(obj) \
31 OBJECT_CHECK(VersatileI2CState, (obj), TYPE_VERSATILE_I2C)
33 typedef struct VersatileI2CState {
34 SysBusDevice parent_obj;
36 MemoryRegion iomem;
37 bitbang_i2c_interface *bitbang;
38 int out;
39 int in;
40 } VersatileI2CState;
42 static uint64_t versatile_i2c_read(void *opaque, hwaddr offset,
43 unsigned size)
45 VersatileI2CState *s = (VersatileI2CState *)opaque;
47 if (offset == 0) {
48 return (s->out & 1) | (s->in << 1);
49 } else {
50 qemu_log_mask(LOG_GUEST_ERROR,
51 "%s: Bad offset 0x%x\n", __func__, (int)offset);
52 return -1;
56 static void versatile_i2c_write(void *opaque, hwaddr offset,
57 uint64_t value, unsigned size)
59 VersatileI2CState *s = (VersatileI2CState *)opaque;
61 switch (offset) {
62 case 0:
63 s->out |= value & 3;
64 break;
65 case 4:
66 s->out &= ~value;
67 break;
68 default:
69 qemu_log_mask(LOG_GUEST_ERROR,
70 "%s: Bad offset 0x%x\n", __func__, (int)offset);
72 bitbang_i2c_set(s->bitbang, BITBANG_I2C_SCL, (s->out & 1) != 0);
73 s->in = bitbang_i2c_set(s->bitbang, BITBANG_I2C_SDA, (s->out & 2) != 0);
76 static const MemoryRegionOps versatile_i2c_ops = {
77 .read = versatile_i2c_read,
78 .write = versatile_i2c_write,
79 .endianness = DEVICE_NATIVE_ENDIAN,
82 static void versatile_i2c_init(Object *obj)
84 DeviceState *dev = DEVICE(obj);
85 VersatileI2CState *s = VERSATILE_I2C(obj);
86 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
87 I2CBus *bus;
89 bus = i2c_init_bus(dev, "i2c");
90 s->bitbang = bitbang_i2c_init(bus);
91 memory_region_init_io(&s->iomem, obj, &versatile_i2c_ops, s,
92 "versatile_i2c", 0x1000);
93 sysbus_init_mmio(sbd, &s->iomem);
96 static const TypeInfo versatile_i2c_info = {
97 .name = TYPE_VERSATILE_I2C,
98 .parent = TYPE_SYS_BUS_DEVICE,
99 .instance_size = sizeof(VersatileI2CState),
100 .instance_init = versatile_i2c_init,
103 static void versatile_i2c_register_types(void)
105 type_register_static(&versatile_i2c_info);
108 type_init(versatile_i2c_register_types)