virtio-ccw: support ring size changes
[qemu.git] / disas.c
blob0ae70c22f7275f4ca4ea6a40592615bcaebd6983
1 /* General "disassemble this chunk" code. Used for debugging. */
2 #include "config.h"
3 #include "qemu-common.h"
4 #include "disas/bfd.h"
5 #include "elf.h"
6 #include <errno.h>
8 #include "cpu.h"
9 #include "disas/disas.h"
11 typedef struct CPUDebug {
12 struct disassemble_info info;
13 CPUState *cpu;
14 } CPUDebug;
16 /* Filled in by elfload.c. Simplistic, but will do for now. */
17 struct syminfo *syminfos = NULL;
19 /* Get LENGTH bytes from info's buffer, at target address memaddr.
20 Transfer them to myaddr. */
21 int
22 buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
23 struct disassemble_info *info)
25 if (memaddr < info->buffer_vma
26 || memaddr + length > info->buffer_vma + info->buffer_length)
27 /* Out of bounds. Use EIO because GDB uses it. */
28 return EIO;
29 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
30 return 0;
33 /* Get LENGTH bytes from info's buffer, at target address memaddr.
34 Transfer them to myaddr. */
35 static int
36 target_read_memory (bfd_vma memaddr,
37 bfd_byte *myaddr,
38 int length,
39 struct disassemble_info *info)
41 CPUDebug *s = container_of(info, CPUDebug, info);
43 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
44 return 0;
47 /* Print an error message. We can assume that this is in response to
48 an error return from buffer_read_memory. */
49 void
50 perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
52 if (status != EIO)
53 /* Can't happen. */
54 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
55 else
56 /* Actually, address between memaddr and memaddr + len was
57 out of bounds. */
58 (*info->fprintf_func) (info->stream,
59 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
62 /* This could be in a separate file, to save minuscule amounts of space
63 in statically linked executables. */
65 /* Just print the address is hex. This is included for completeness even
66 though both GDB and objdump provide their own (to print symbolic
67 addresses). */
69 void
70 generic_print_address (bfd_vma addr, struct disassemble_info *info)
72 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
75 /* Print address in hex, truncated to the width of a host virtual address. */
76 static void
77 generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
79 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
80 generic_print_address(addr & mask, info);
83 /* Just return the given address. */
85 int
86 generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
88 return 1;
91 bfd_vma bfd_getl64 (const bfd_byte *addr)
93 unsigned long long v;
95 v = (unsigned long long) addr[0];
96 v |= (unsigned long long) addr[1] << 8;
97 v |= (unsigned long long) addr[2] << 16;
98 v |= (unsigned long long) addr[3] << 24;
99 v |= (unsigned long long) addr[4] << 32;
100 v |= (unsigned long long) addr[5] << 40;
101 v |= (unsigned long long) addr[6] << 48;
102 v |= (unsigned long long) addr[7] << 56;
103 return (bfd_vma) v;
106 bfd_vma bfd_getl32 (const bfd_byte *addr)
108 unsigned long v;
110 v = (unsigned long) addr[0];
111 v |= (unsigned long) addr[1] << 8;
112 v |= (unsigned long) addr[2] << 16;
113 v |= (unsigned long) addr[3] << 24;
114 return (bfd_vma) v;
117 bfd_vma bfd_getb32 (const bfd_byte *addr)
119 unsigned long v;
121 v = (unsigned long) addr[0] << 24;
122 v |= (unsigned long) addr[1] << 16;
123 v |= (unsigned long) addr[2] << 8;
124 v |= (unsigned long) addr[3];
125 return (bfd_vma) v;
128 bfd_vma bfd_getl16 (const bfd_byte *addr)
130 unsigned long v;
132 v = (unsigned long) addr[0];
133 v |= (unsigned long) addr[1] << 8;
134 return (bfd_vma) v;
137 bfd_vma bfd_getb16 (const bfd_byte *addr)
139 unsigned long v;
141 v = (unsigned long) addr[0] << 24;
142 v |= (unsigned long) addr[1] << 16;
143 return (bfd_vma) v;
146 static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
147 const char *prefix)
149 int i, n = info->buffer_length;
150 uint8_t *buf = g_malloc(n);
152 info->read_memory_func(pc, buf, n, info);
154 for (i = 0; i < n; ++i) {
155 if (i % 32 == 0) {
156 info->fprintf_func(info->stream, "\n%s: ", prefix);
158 info->fprintf_func(info->stream, "%02x", buf[i]);
161 g_free(buf);
162 return n;
165 static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
167 return print_insn_objdump(pc, info, "OBJD-H");
170 static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
172 return print_insn_objdump(pc, info, "OBJD-T");
175 /* Disassemble this for me please... (debugging). 'flags' has the following
176 values:
177 i386 - 1 means 16 bit code, 2 means 64 bit code
178 ppc - bits 0:15 specify (optionally) the machine instruction set;
179 bit 16 indicates little endian.
180 other targets - unused
182 void target_disas(FILE *out, CPUState *cpu, target_ulong code,
183 target_ulong size, int flags)
185 CPUClass *cc = CPU_GET_CLASS(cpu);
186 target_ulong pc;
187 int count;
188 CPUDebug s;
190 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
192 s.cpu = cpu;
193 s.info.read_memory_func = target_read_memory;
194 s.info.buffer_vma = code;
195 s.info.buffer_length = size;
196 s.info.print_address_func = generic_print_address;
198 #ifdef TARGET_WORDS_BIGENDIAN
199 s.info.endian = BFD_ENDIAN_BIG;
200 #else
201 s.info.endian = BFD_ENDIAN_LITTLE;
202 #endif
204 if (cc->disas_set_info) {
205 cc->disas_set_info(cpu, &s.info);
208 #if defined(TARGET_I386)
209 if (flags == 2) {
210 s.info.mach = bfd_mach_x86_64;
211 } else if (flags == 1) {
212 s.info.mach = bfd_mach_i386_i8086;
213 } else {
214 s.info.mach = bfd_mach_i386_i386;
216 s.info.print_insn = print_insn_i386;
217 #elif defined(TARGET_SPARC)
218 s.info.print_insn = print_insn_sparc;
219 #ifdef TARGET_SPARC64
220 s.info.mach = bfd_mach_sparc_v9b;
221 #endif
222 #elif defined(TARGET_PPC)
223 if ((flags >> 16) & 1) {
224 s.info.endian = BFD_ENDIAN_LITTLE;
226 if (flags & 0xFFFF) {
227 /* If we have a precise definition of the instruction set, use it. */
228 s.info.mach = flags & 0xFFFF;
229 } else {
230 #ifdef TARGET_PPC64
231 s.info.mach = bfd_mach_ppc64;
232 #else
233 s.info.mach = bfd_mach_ppc;
234 #endif
236 s.info.disassembler_options = (char *)"any";
237 s.info.print_insn = print_insn_ppc;
238 #elif defined(TARGET_M68K)
239 s.info.print_insn = print_insn_m68k;
240 #elif defined(TARGET_MIPS)
241 #ifdef TARGET_WORDS_BIGENDIAN
242 s.info.print_insn = print_insn_big_mips;
243 #else
244 s.info.print_insn = print_insn_little_mips;
245 #endif
246 #elif defined(TARGET_SH4)
247 s.info.mach = bfd_mach_sh4;
248 s.info.print_insn = print_insn_sh;
249 #elif defined(TARGET_ALPHA)
250 s.info.mach = bfd_mach_alpha_ev6;
251 s.info.print_insn = print_insn_alpha;
252 #elif defined(TARGET_S390X)
253 s.info.mach = bfd_mach_s390_64;
254 s.info.print_insn = print_insn_s390;
255 #elif defined(TARGET_MOXIE)
256 s.info.mach = bfd_arch_moxie;
257 s.info.print_insn = print_insn_moxie;
258 #elif defined(TARGET_LM32)
259 s.info.mach = bfd_mach_lm32;
260 s.info.print_insn = print_insn_lm32;
261 #endif
262 if (s.info.print_insn == NULL) {
263 s.info.print_insn = print_insn_od_target;
266 for (pc = code; size > 0; pc += count, size -= count) {
267 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
268 count = s.info.print_insn(pc, &s.info);
269 #if 0
271 int i;
272 uint8_t b;
273 fprintf(out, " {");
274 for(i = 0; i < count; i++) {
275 target_read_memory(pc + i, &b, 1, &s.info);
276 fprintf(out, " %02x", b);
278 fprintf(out, " }");
280 #endif
281 fprintf(out, "\n");
282 if (count < 0)
283 break;
284 if (size < count) {
285 fprintf(out,
286 "Disassembler disagrees with translator over instruction "
287 "decoding\n"
288 "Please report this to qemu-devel@nongnu.org\n");
289 break;
294 /* Disassemble this for me please... (debugging). */
295 void disas(FILE *out, void *code, unsigned long size)
297 uintptr_t pc;
298 int count;
299 CPUDebug s;
300 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
302 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
303 s.info.print_address_func = generic_print_host_address;
305 s.info.buffer = code;
306 s.info.buffer_vma = (uintptr_t)code;
307 s.info.buffer_length = size;
309 #ifdef HOST_WORDS_BIGENDIAN
310 s.info.endian = BFD_ENDIAN_BIG;
311 #else
312 s.info.endian = BFD_ENDIAN_LITTLE;
313 #endif
314 #if defined(CONFIG_TCG_INTERPRETER)
315 print_insn = print_insn_tci;
316 #elif defined(__i386__)
317 s.info.mach = bfd_mach_i386_i386;
318 print_insn = print_insn_i386;
319 #elif defined(__x86_64__)
320 s.info.mach = bfd_mach_x86_64;
321 print_insn = print_insn_i386;
322 #elif defined(_ARCH_PPC)
323 s.info.disassembler_options = (char *)"any";
324 print_insn = print_insn_ppc;
325 #elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
326 print_insn = print_insn_arm_a64;
327 #elif defined(__alpha__)
328 print_insn = print_insn_alpha;
329 #elif defined(__sparc__)
330 print_insn = print_insn_sparc;
331 s.info.mach = bfd_mach_sparc_v9b;
332 #elif defined(__arm__)
333 print_insn = print_insn_arm;
334 #elif defined(__MIPSEB__)
335 print_insn = print_insn_big_mips;
336 #elif defined(__MIPSEL__)
337 print_insn = print_insn_little_mips;
338 #elif defined(__m68k__)
339 print_insn = print_insn_m68k;
340 #elif defined(__s390__)
341 print_insn = print_insn_s390;
342 #elif defined(__hppa__)
343 print_insn = print_insn_hppa;
344 #elif defined(__ia64__)
345 print_insn = print_insn_ia64;
346 #endif
347 if (print_insn == NULL) {
348 print_insn = print_insn_od_host;
350 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
351 fprintf(out, "0x%08" PRIxPTR ": ", pc);
352 count = print_insn(pc, &s.info);
353 fprintf(out, "\n");
354 if (count < 0)
355 break;
359 /* Look up symbol for debugging purpose. Returns "" if unknown. */
360 const char *lookup_symbol(target_ulong orig_addr)
362 const char *symbol = "";
363 struct syminfo *s;
365 for (s = syminfos; s; s = s->next) {
366 symbol = s->lookup_symbol(s, orig_addr);
367 if (symbol[0] != '\0') {
368 break;
372 return symbol;
375 #if !defined(CONFIG_USER_ONLY)
377 #include "monitor/monitor.h"
379 static int monitor_disas_is_physical;
381 static int
382 monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
383 struct disassemble_info *info)
385 CPUDebug *s = container_of(info, CPUDebug, info);
387 if (monitor_disas_is_physical) {
388 cpu_physical_memory_read(memaddr, myaddr, length);
389 } else {
390 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
392 return 0;
395 static int GCC_FMT_ATTR(2, 3)
396 monitor_fprintf(FILE *stream, const char *fmt, ...)
398 va_list ap;
399 va_start(ap, fmt);
400 monitor_vprintf((Monitor *)stream, fmt, ap);
401 va_end(ap);
402 return 0;
405 /* Disassembler for the monitor.
406 See target_disas for a description of flags. */
407 void monitor_disas(Monitor *mon, CPUState *cpu,
408 target_ulong pc, int nb_insn, int is_physical, int flags)
410 CPUClass *cc = CPU_GET_CLASS(cpu);
411 int count, i;
412 CPUDebug s;
414 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
416 s.cpu = cpu;
417 monitor_disas_is_physical = is_physical;
418 s.info.read_memory_func = monitor_read_memory;
419 s.info.print_address_func = generic_print_address;
421 s.info.buffer_vma = pc;
423 #ifdef TARGET_WORDS_BIGENDIAN
424 s.info.endian = BFD_ENDIAN_BIG;
425 #else
426 s.info.endian = BFD_ENDIAN_LITTLE;
427 #endif
429 if (cc->disas_set_info) {
430 cc->disas_set_info(cpu, &s.info);
433 #if defined(TARGET_I386)
434 if (flags == 2) {
435 s.info.mach = bfd_mach_x86_64;
436 } else if (flags == 1) {
437 s.info.mach = bfd_mach_i386_i8086;
438 } else {
439 s.info.mach = bfd_mach_i386_i386;
441 s.info.print_insn = print_insn_i386;
442 #elif defined(TARGET_ALPHA)
443 s.info.print_insn = print_insn_alpha;
444 #elif defined(TARGET_SPARC)
445 s.info.print_insn = print_insn_sparc;
446 #ifdef TARGET_SPARC64
447 s.info.mach = bfd_mach_sparc_v9b;
448 #endif
449 #elif defined(TARGET_PPC)
450 if (flags & 0xFFFF) {
451 /* If we have a precise definition of the instruction set, use it. */
452 s.info.mach = flags & 0xFFFF;
453 } else {
454 #ifdef TARGET_PPC64
455 s.info.mach = bfd_mach_ppc64;
456 #else
457 s.info.mach = bfd_mach_ppc;
458 #endif
460 if ((flags >> 16) & 1) {
461 s.info.endian = BFD_ENDIAN_LITTLE;
463 s.info.print_insn = print_insn_ppc;
464 #elif defined(TARGET_M68K)
465 s.info.print_insn = print_insn_m68k;
466 #elif defined(TARGET_MIPS)
467 #ifdef TARGET_WORDS_BIGENDIAN
468 s.info.print_insn = print_insn_big_mips;
469 #else
470 s.info.print_insn = print_insn_little_mips;
471 #endif
472 #elif defined(TARGET_SH4)
473 s.info.mach = bfd_mach_sh4;
474 s.info.print_insn = print_insn_sh;
475 #elif defined(TARGET_S390X)
476 s.info.mach = bfd_mach_s390_64;
477 s.info.print_insn = print_insn_s390;
478 #elif defined(TARGET_MOXIE)
479 s.info.mach = bfd_arch_moxie;
480 s.info.print_insn = print_insn_moxie;
481 #elif defined(TARGET_LM32)
482 s.info.mach = bfd_mach_lm32;
483 s.info.print_insn = print_insn_lm32;
484 #endif
485 if (!s.info.print_insn) {
486 monitor_printf(mon, "0x" TARGET_FMT_lx
487 ": Asm output not supported on this arch\n", pc);
488 return;
491 for(i = 0; i < nb_insn; i++) {
492 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
493 count = s.info.print_insn(pc, &s.info);
494 monitor_printf(mon, "\n");
495 if (count < 0)
496 break;
497 pc += count;
500 #endif