hw/core/ptimer.c

   1 /*
   2  * General purpose implementation of a simple periodic countdown timer.
   3  *
   4  * Copyright (c) 2007 CodeSourcery.
   5  *
   6  * This code is licensed under the GNU LGPL.
   7  */
   8 #include "qemu/osdep.h"
   9 #include "hw/hw.h"
  10 #include "qemu/timer.h"
  11 #include "hw/ptimer.h"
  12 #include "qemu/host-utils.h"
  13 #include "sysemu/replay.h"
  14
  15 struct ptimer_state
  16 {
  17     uint8_t enabled; /* 0 = disabled, 1 = periodic, 2 = oneshot.  */
  18     uint64_t limit;
  19     uint64_t delta;
  20     uint32_t period_frac;
  21     int64_t period;
  22     int64_t last_event;
  23     int64_t next_event;
  24     QEMUBH *bh;
  25     QEMUTimer *timer;
  26 };
  27
  28 /* Use a bottom-half routine to avoid reentrancy issues.  */
  29 static void ptimer_trigger(ptimer_state *s)
  30 {
  31     if (s->bh) {
  32         replay_bh_schedule_event(s->bh);
  33     }
  34 }
  35
  36 static void ptimer_reload(ptimer_state *s)
  37 {
  38     uint32_t period_frac = s->period_frac;
  39     uint64_t period = s->period;
  40
  41     if (s->delta == 0) {
  42         ptimer_trigger(s);
  43         s->delta = s->limit;
  44     }
  45     if (s->delta == 0 || s->period == 0) {
  46         fprintf(stderr, "Timer with period zero, disabling\n");
  47         timer_del(s->timer);
  48         s->enabled = 0;
  49         return;
  50     }
  51
  52     /*
  53      * Artificially limit timeout rate to something
  54      * achievable under QEMU.  Otherwise, QEMU spends all
  55      * its time generating timer interrupts, and there
  56      * is no forward progress.
  57      * About ten microseconds is the fastest that really works
  58      * on the current generation of host machines.
  59      */
  60
  61     if (s->enabled == 1 && (s->delta * period < 10000) && !use_icount) {
  62         period = 10000 / s->delta;
  63         period_frac = 0;
  64     }
  65
  66     s->last_event = s->next_event;
  67     s->next_event = s->last_event + s->delta * period;
  68     if (period_frac) {
  69         s->next_event += ((int64_t)period_frac * s->delta) >> 32;
  70     }
  71     timer_mod(s->timer, s->next_event);
  72 }
  73
  74 static void ptimer_tick(void *opaque)
  75 {
  76     ptimer_state *s = (ptimer_state *)opaque;
  77     ptimer_trigger(s);
  78     s->delta = 0;
  79     if (s->enabled == 2) {
  80         s->enabled = 0;
  81     } else {
  82         ptimer_reload(s);
  83     }
  84 }
  85
  86 uint64_t ptimer_get_count(ptimer_state *s)
  87 {
  88     uint64_t counter;
  89
  90     if (s->enabled) {
  91         int64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  92         int64_t next = s->next_event;
  93         bool expired = (now - next >= 0);
  94         bool oneshot = (s->enabled == 2);
  95
  96         /* Figure out the current counter value.  */
  97         if (expired) {
  98             /* Prevent timer underflowing if it should already have
  99                triggered.  */
 100             counter = 0;
 101         } else {
 102             uint64_t rem;
 103             uint64_t div;
 104             int clz1, clz2;
 105             int shift;
 106             uint32_t period_frac = s->period_frac;
 107             uint64_t period = s->period;
 108
 109             if (!oneshot && (s->delta * period < 10000) && !use_icount) {
 110                 period = 10000 / s->delta;
 111                 period_frac = 0;
 112             }
 113
 114             /* We need to divide time by period, where time is stored in
 115                rem (64-bit integer) and period is stored in period/period_frac
 116                (64.32 fixed point).
 117
 118                Doing full precision division is hard, so scale values and
 119                do a 64-bit division.  The result should be rounded down,
 120                so that the rounding error never causes the timer to go
 121                backwards.
 122             */
 123
 124             rem = next - now;
 125             div = period;
 126
 127             clz1 = clz64(rem);
 128             clz2 = clz64(div);
 129             shift = clz1 < clz2 ? clz1 : clz2;
 130
 131             rem <<= shift;
 132             div <<= shift;
 133             if (shift >= 32) {
 134                 div |= ((uint64_t)period_frac << (shift - 32));
 135             } else {
 136                 if (shift != 0)
 137                     div |= (period_frac >> (32 - shift));
 138                 /* Look at remaining bits of period_frac and round div up if
 139                    necessary.  */
 140                 if ((uint32_t)(period_frac << shift))
 141                     div += 1;
 142             }
 143             counter = rem / div;
 144         }
 145     } else {
 146         counter = s->delta;
 147     }
 148     return counter;
 149 }
 150
 151 void ptimer_set_count(ptimer_state *s, uint64_t count)
 152 {
 153     s->delta = count;
 154     if (s->enabled) {
 155         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 156         ptimer_reload(s);
 157     }
 158 }
 159
 160 void ptimer_run(ptimer_state *s, int oneshot)
 161 {
 162     bool was_disabled = !s->enabled;
 163
 164     if (was_disabled && s->period == 0) {
 165         fprintf(stderr, "Timer with period zero, disabling\n");
 166         return;
 167     }
 168     s->enabled = oneshot ? 2 : 1;
 169     if (was_disabled) {
 170         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 171         ptimer_reload(s);
 172     }
 173 }
 174
 175 /* Pause a timer.  Note that this may cause it to "lose" time, even if it
 176    is immediately restarted.  */
 177 void ptimer_stop(ptimer_state *s)
 178 {
 179     if (!s->enabled)
 180         return;
 181
 182     s->delta = ptimer_get_count(s);
 183     timer_del(s->timer);
 184     s->enabled = 0;
 185 }
 186
 187 /* Set counter increment interval in nanoseconds.  */
 188 void ptimer_set_period(ptimer_state *s, int64_t period)
 189 {
 190     s->delta = ptimer_get_count(s);
 191     s->period = period;
 192     s->period_frac = 0;
 193     if (s->enabled) {
 194         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 195         ptimer_reload(s);
 196     }
 197 }
 198
 199 /* Set counter frequency in Hz.  */
 200 void ptimer_set_freq(ptimer_state *s, uint32_t freq)
 201 {
 202     s->delta = ptimer_get_count(s);
 203     s->period = 1000000000ll / freq;
 204     s->period_frac = (1000000000ll << 32) / freq;
 205     if (s->enabled) {
 206         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 207         ptimer_reload(s);
 208     }
 209 }
 210
 211 /* Set the initial countdown value.  If reload is nonzero then also set
 212    count = limit.  */
 213 void ptimer_set_limit(ptimer_state *s, uint64_t limit, int reload)
 214 {
 215     s->limit = limit;
 216     if (reload)
 217         s->delta = limit;
 218     if (s->enabled && reload) {
 219         s->next_event = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
 220         ptimer_reload(s);
 221     }
 222 }
 223
 224 uint64_t ptimer_get_limit(ptimer_state *s)
 225 {
 226     return s->limit;
 227 }
 228
 229 const VMStateDescription vmstate_ptimer = {
 230     .name = "ptimer",
 231     .version_id = 1,
 232     .minimum_version_id = 1,
 233     .fields = (VMStateField[]) {
 234         VMSTATE_UINT8(enabled, ptimer_state),
 235         VMSTATE_UINT64(limit, ptimer_state),
 236         VMSTATE_UINT64(delta, ptimer_state),
 237         VMSTATE_UINT32(period_frac, ptimer_state),
 238         VMSTATE_INT64(period, ptimer_state),
 239         VMSTATE_INT64(last_event, ptimer_state),
 240         VMSTATE_INT64(next_event, ptimer_state),
 241         VMSTATE_TIMER_PTR(timer, ptimer_state),
 242         VMSTATE_END_OF_LIST()
 243     }
 244 };
 245
 246 ptimer_state *ptimer_init(QEMUBH *bh)
 247 {
 248     ptimer_state *s;
 249
 250     s = (ptimer_state *)g_malloc0(sizeof(ptimer_state));
 251     s->bh = bh;
 252     s->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, ptimer_tick, s);
 253     return s;
 254 }