target-m68k/cpu.h

   1 /*
   2  * m68k virtual CPU header
   3  *
   4  *  Copyright (c) 2005-2007 CodeSourcery
   5  *  Written by Paul Brook
   6  *
   7  * This library is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU Lesser General Public
   9  * License as published by the Free Software Foundation; either
  10  * version 2 of the License, or (at your option) any later version.
  11  *
  12  * This library is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  * General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU Lesser General Public
  18  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
  19  */
  20 #ifndef CPU_M68K_H
  21 #define CPU_M68K_H
  22
  23 #define TARGET_LONG_BITS 32
  24
  25 #define CPUArchState struct CPUM68KState
  26
  27 #include "config.h"
  28 #include "qemu-common.h"
  29 #include "exec/cpu-defs.h"
  30
  31 #include "fpu/softfloat.h"
  32
  33 #define MAX_QREGS 32
  34
  35 #define EXCP_ACCESS         2   /* Access (MMU) error.  */
  36 #define EXCP_ADDRESS        3   /* Address error.  */
  37 #define EXCP_ILLEGAL        4   /* Illegal instruction.  */
  38 #define EXCP_DIV0           5   /* Divide by zero */
  39 #define EXCP_PRIVILEGE      8   /* Privilege violation.  */
  40 #define EXCP_TRACE          9
  41 #define EXCP_LINEA          10  /* Unimplemented line-A (MAC) opcode.  */
  42 #define EXCP_LINEF          11  /* Unimplemented line-F (FPU) opcode.  */
  43 #define EXCP_DEBUGNBP       12  /* Non-breakpoint debug interrupt.  */
  44 #define EXCP_DEBEGBP        13  /* Breakpoint debug interrupt.  */
  45 #define EXCP_FORMAT         14  /* RTE format error.  */
  46 #define EXCP_UNINITIALIZED  15
  47 #define EXCP_TRAP0          32   /* User trap #0.  */
  48 #define EXCP_TRAP15         47   /* User trap #15.  */
  49 #define EXCP_UNSUPPORTED    61
  50 #define EXCP_ICE            13
  51
  52 #define EXCP_RTE            0x100
  53 #define EXCP_HALT_INSN      0x101
  54
  55 #define NB_MMU_MODES 2
  56
  57 typedef struct CPUM68KState {
  58     uint32_t dregs[8];
  59     uint32_t aregs[8];
  60     uint32_t pc;
  61     uint32_t sr;
  62
  63     /* SSP and USP.  The current_sp is stored in aregs[7], the other here.  */
  64     int current_sp;
  65     uint32_t sp[2];
  66
  67     /* Condition flags.  */
  68     uint32_t cc_op;
  69     uint32_t cc_dest;
  70     uint32_t cc_src;
  71     uint32_t cc_x;
  72
  73     float64 fregs[8];
  74     float64 fp_result;
  75     uint32_t fpcr;
  76     uint32_t fpsr;
  77     float_status fp_status;
  78
  79     uint64_t mactmp;
  80     /* EMAC Hardware deals with 48-bit values composed of one 32-bit and
  81        two 8-bit parts.  We store a single 64-bit value and
  82        rearrange/extend this when changing modes.  */
  83     uint64_t macc[4];
  84     uint32_t macsr;
  85     uint32_t mac_mask;
  86
  87     /* Temporary storage for DIV helpers.  */
  88     uint32_t div1;
  89     uint32_t div2;
  90
  91     /* MMU status.  */
  92     struct {
  93         uint32_t ar;
  94     } mmu;
  95
  96     /* Control registers.  */
  97     uint32_t vbr;
  98     uint32_t mbar;
  99     uint32_t rambar0;
 100     uint32_t cacr;
 101
 102     int pending_vector;
 103     int pending_level;
 104
 105     uint32_t qregs[MAX_QREGS];
 106
 107     CPU_COMMON
 108
 109     /* Fields from here on are preserved across CPU reset. */
 110     uint32_t features;
 111 } CPUM68KState;
 112
 113 #include "cpu-qom.h"
 114
 115 void m68k_tcg_init(void);
 116 void m68k_cpu_init_gdb(M68kCPU *cpu);
 117 M68kCPU *cpu_m68k_init(const char *cpu_model);
 118 int cpu_m68k_exec(CPUState *cpu);
 119 /* you can call this signal handler from your SIGBUS and SIGSEGV
 120    signal handlers to inform the virtual CPU of exceptions. non zero
 121    is returned if the signal was handled by the virtual CPU.  */
 122 int cpu_m68k_signal_handler(int host_signum, void *pinfo,
 123                            void *puc);
 124 void cpu_m68k_flush_flags(CPUM68KState *, int);
 125
 126 enum {
 127     CC_OP_DYNAMIC, /* Use env->cc_op  */
 128     CC_OP_FLAGS, /* CC_DEST = CVZN, CC_SRC = unused */
 129     CC_OP_LOGIC, /* CC_DEST = result, CC_SRC = unused */
 130     CC_OP_ADD,   /* CC_DEST = result, CC_SRC = source */
 131     CC_OP_SUB,   /* CC_DEST = result, CC_SRC = source */
 132     CC_OP_CMPB,  /* CC_DEST = result, CC_SRC = source */
 133     CC_OP_CMPW,  /* CC_DEST = result, CC_SRC = source */
 134     CC_OP_ADDX,  /* CC_DEST = result, CC_SRC = source */
 135     CC_OP_SUBX,  /* CC_DEST = result, CC_SRC = source */
 136     CC_OP_SHIFT, /* CC_DEST = result, CC_SRC = carry */
 137 };
 138
 139 #define CCF_C 0x01
 140 #define CCF_V 0x02
 141 #define CCF_Z 0x04
 142 #define CCF_N 0x08
 143 #define CCF_X 0x10
 144
 145 #define SR_I_SHIFT 8
 146 #define SR_I  0x0700
 147 #define SR_M  0x1000
 148 #define SR_S  0x2000
 149 #define SR_T  0x8000
 150
 151 #define M68K_SSP    0
 152 #define M68K_USP    1
 153
 154 /* CACR fields are implementation defined, but some bits are common.  */
 155 #define M68K_CACR_EUSP  0x10
 156
 157 #define MACSR_PAV0  0x100
 158 #define MACSR_OMC   0x080
 159 #define MACSR_SU    0x040
 160 #define MACSR_FI    0x020
 161 #define MACSR_RT    0x010
 162 #define MACSR_N     0x008
 163 #define MACSR_Z     0x004
 164 #define MACSR_V     0x002
 165 #define MACSR_EV    0x001
 166
 167 void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector);
 168 void m68k_set_macsr(CPUM68KState *env, uint32_t val);
 169 void m68k_switch_sp(CPUM68KState *env);
 170
 171 #define M68K_FPCR_PREC (1 << 6)
 172
 173 void do_m68k_semihosting(CPUM68KState *env, int nr);
 174
 175 /* There are 4 ColdFire core ISA revisions: A, A+, B and C.
 176    Each feature covers the subset of instructions common to the
 177    ISA revisions mentioned.  */
 178
 179 enum m68k_features {
 180     M68K_FEATURE_CF_ISA_A,
 181     M68K_FEATURE_CF_ISA_B, /* (ISA B or C).  */
 182     M68K_FEATURE_CF_ISA_APLUSC, /* BIT/BITREV, FF1, STRLDSR (ISA A+ or C).  */
 183     M68K_FEATURE_BRAL, /* Long unconditional branch.  (ISA A+ or B).  */
 184     M68K_FEATURE_CF_FPU,
 185     M68K_FEATURE_CF_MAC,
 186     M68K_FEATURE_CF_EMAC,
 187     M68K_FEATURE_CF_EMAC_B, /* Revision B EMAC (dual accumulate).  */
 188     M68K_FEATURE_USP, /* User Stack Pointer.  (ISA A+, B or C).  */
 189     M68K_FEATURE_EXT_FULL, /* 68020+ full extension word.  */
 190     M68K_FEATURE_WORD_INDEX /* word sized address index registers.  */
 191 };
 192
 193 static inline int m68k_feature(CPUM68KState *env, int feature)
 194 {
 195     return (env->features & (1u << feature)) != 0;
 196 }
 197
 198 void m68k_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 199
 200 void register_m68k_insns (CPUM68KState *env);
 201
 202 #ifdef CONFIG_USER_ONLY
 203 /* Linux uses 8k pages.  */
 204 #define TARGET_PAGE_BITS 13
 205 #else
 206 /* Smallest TLB entry size is 1k.  */
 207 #define TARGET_PAGE_BITS 10
 208 #endif
 209
 210 #define TARGET_PHYS_ADDR_SPACE_BITS 32
 211 #define TARGET_VIRT_ADDR_SPACE_BITS 32
 212
 213 #define cpu_init(cpu_model) CPU(cpu_m68k_init(cpu_model))
 214
 215 #define cpu_exec cpu_m68k_exec
 216 #define cpu_signal_handler cpu_m68k_signal_handler
 217 #define cpu_list m68k_cpu_list
 218
 219 /* MMU modes definitions */
 220 #define MMU_MODE0_SUFFIX _kernel
 221 #define MMU_MODE1_SUFFIX _user
 222 #define MMU_USER_IDX 1
 223 static inline int cpu_mmu_index (CPUM68KState *env, bool ifetch)
 224 {
 225     return (env->sr & SR_S) == 0 ? 1 : 0;
 226 }
 227
 228 int m68k_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw,
 229                               int mmu_idx);
 230
 231 #include "exec/cpu-all.h"
 232
 233 static inline void cpu_get_tb_cpu_state(CPUM68KState *env, target_ulong *pc,
 234                                         target_ulong *cs_base, int *flags)
 235 {
 236     *pc = env->pc;
 237     *cs_base = 0;
 238     *flags = (env->fpcr & M68K_FPCR_PREC)       /* Bit  6 */
 239             | (env->sr & SR_S)                  /* Bit  13 */
 240             | ((env->macsr >> 4) & 0xf);        /* Bits 0-3 */
 241 }
 242
 243 #include "exec/exec-all.h"
 244
 245 #endif